Modem hardware modelling -Sr Eng Qualcomm

1 - 5 years

14 - 18 Lacs

Bengaluru

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Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: QCT's Bangalore Wireless R&D HW team is looking out for experienced Wireless Modem HW model developers to work on Qualcomm"™s best in class chipsets in modem WWAN IPs Roles and Responsibilities You will be contributing to flagship modem core IP development covering 5G(NR) & 4G (LTE) technologies. You will be part of team defining and developing next generation multi-mode 5G modems. You will be working on development and verification of HW models of modem core IP. The models are developed on C++/SystemC platform and used as golden reference for RTL verification and pre Silicon FW development ( virtual proto...

Posted 4 months ago

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DSP Design Verification Sr Lead Engineer Qualcomm

4 - 9 years

19 - 25 Lacs

Bengaluru

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Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Summary: Position for 5-8 years of experience in design verification of complex Qualcomm propriety DSP/NPU IP DSP team is responsible for delivering high-performance DSP/NPU cores which are at the heart of Qualcomm's multi-tier SoC roadmap targeted for mobile space, AI, Automotive and more. Qualcomm is one of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property. Job Responsibilities: Drive design verification of DSP IP by working with a global DSP design team involving architecture, impleme...

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DSP / NPU Design Verification Sr Engineer Qualcomm

4.0 - 9.0 years

16 - 20 Lacs

bengaluru

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Posted Date not available

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Design Verification Engineer MosChip

2.0 - 4.0 years

3 - 6 Lacs

hyderabad

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Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Specification Required Skills Hands-on experience of complete verification cycle with strong verification concepts Strong knowledge of Verilog, SystemVerilog and UVM Experience in UVM based Verification IP development Experience i...

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Immediate Position For Design Engineer -Perpheral To Bangalore Creeno Solutions

5.0 - 10.0 years

16 - 30 Lacs

bangalore rural, bengaluru

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Greetings from Creeno Job Role: Design Verification Engineer - Peripheral Location: Bangalore Experience : 5 to 10 years Job Type: Full Time Job Description: • Pre Silicon DV of Peripheral - SDIO, UART, SPI, QSPI, WDT, GPT, eUSB and could be other low speed peripherals • Test plan development, Test development, RTL verification • Regression, coverage, use case closure • Support power and performance tests development for same peripherals • GLS and timing simulation of the same Thanks Arun.M Email-ID : Arun.m@creenosolutions.com Con Num:9392352955

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Peripheral DV (SI100FT RM 3484) Sourceright Technologies

10.0 - 15.0 years

35 - 40 Lacs

bengaluru

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Position: Peripheral DV (SI100FT RM 3484) Job Description: Pre Silicon DV of Peripheral SDIO, UART, SPI, QSPI, WDT, GPT, eUSB and could be other low speed peripherals Test plan development, Test development, RTL verification Regression, coverage, use case closure Support power and performance tests development for same peripherals GLS and timing simulation of the same Experience: Lead : 10+ years exp. 2 team members: 5+ years exp. Job Category: Others Job Type: Full Time Job Location: Bangalore Experience: 10+ Years Notice period: 0-30 days

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