14 Rtl Synthesis Jobs

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Front-End Silicon Design & Integration (FEINT) Manager The Role A Front-End Silicon Design ...

As a Synthesis & STA engineer, you will be responsible for performing RTL Synthesis to optimize the Performance/Power/Area of the designs. Your role will involve DFT insertions such as MBIST and SCAN, setting up Timing Constraints for functional and Test Modes, and Validation. You will be expected to create Power Intent for the designs, verify power intent on RTL, run static Low-Power checks on gate level netlists, and ensure Logic Equivalency Checks between RTL to Gates and Gates to Gates. Collaborating with the Design/DFT/PD teams, you will set up signoff Static Timing Analysis and ECO flows to achieve timing closure. Additionally, you will be involved in Power Analysis, estimating power a...

Description We are seeking a skilled Physical Design Engineer to join our team in India. The ideal candidate will be responsible for the physical design and layout of integrated circuits, ensuring they meet performance, timing, and power specifications. This role requires a strong technical background in VLSI design, as well as experience with various EDA tools. Job Description Working experience of Physical Design Implementation Working experience of Physical Verification, Timing Signoff. Good attitude to learn and deliver. Work from office only. Lower technology node experience. Experience in writing scripts and automation. Working knowledge of Low Power ASIC

Synthesis & STA Engineers: Synthesis & STA engineers will perform RTL Synthesis to achieve the best Performance/ Power/ Area of the designs, DFT insertions that include MBIST and SCAN, setup Timing Constraints for functional and Test Modes, and Validation. Proven hands-on experience on Design compiler/ Genus/ Fusioncompiler Experience timing analysis/debug and driving the timing convergence for complex blocks and release the netlists to PD team Ability to own and release the complex blocks from RTL to netlist with timing QOR, CLP cleanup, Check timing, DFT constraint integration. Ability to work with RTL design team to identify the must changes in RTL to coverge the timing and work with PD t...

The ideal candidate for this role should possess a strong understanding of RTL design and microarchitecture of IPs, with the ability to integrate them into sub-systems and SoCs. Responsibilities include defining the Uarch of SoC IPs, conducting RTL development, and ensuring the quality of RTL through checks such as Clock Domain Crossing (CDC) check, Lint, Design for Testability (DFT), and Low Power Checks. Additionally, the candidate will be involved in RTL synthesis, STA support, and provide pre and post-silicon functional verification support. Collaboration with different domain teams is essential for successful execution of tasks, along with a solid understanding of DDR knowledge. The can...

As a candidate for this role, you will have the opportunity to work directly with customers in the development of RTL code, quality checks, and bug fixing. You should possess 4-7 years of experience and be well-versed in micro-architecture and design of digital IPs and subsystems. Your responsibilities will include understanding the RTL design and microarchitecture of IPs, integrating them into sub-systems, defining SoC IP architecture, and developing RTL. In this position, you will be responsible for conducting RTL Quality Checks such as Clock Domain Crossing (CDC) check, Lint, Design for Testability (DFT) checks, Low Power Checks, as well as RTL Synthesis and STA support. Your expertise in...

Are you ready to take the next step in your career and contribute to cutting-edge ASIC and IP/SoC development We are looking for an experienced Design Engineer to join our team in Hyderabad. This is an exciting opportunity to work with a talented team on high-impact projects, pushing the boundaries of digital design in a collaborative and fast-paced environment. As a key technical contributor, you will work closely with ASIC engineering management to define and implement digital IP/SoC designs, and integrate these with third-party designs into customer ASICs and SoCs. You'll be part of a multi-site development team, ensuring the delivery of high-quality designs that meet customer requirement...

Siemens EDA is a global technology leader in Electronic Design Automation software, enabling companies worldwide to develop innovative electronic products efficiently. Customers utilize Siemens EDA's tools to drive technological advancements in chip, board, and system design within a complex landscape. Based in Bengaluru, this role offers opportunities to travel to various locations in India and globally, providing exposure to diverse projects that impact cities, countries, and future innovations. As part of the team, your responsibilities include deploying Siemens EDA ProFPGA prototyping software and hardware solutions at customer sites, ensuring successful design implementation. Collaborat...

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the worlds leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide...

Responsibilities for this role include: We are working on the next generation RTL-to-GDSII solution. You should be able to completely own and drive the design and development of various pieces of the RTL synthesis technology, logic optimizations and low power synthesis. Experience and Qualifications: 5-8 years of proven experience in software development. B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Good knowledge of C/C++, algorithm and data structures. Good problem solving and analytical skills. Ability to guide and lead others, towards project completion. Desirable: We are looking for an individual with previous experience in RTL synthesis tool development. Knowledge...

8-12 years of proven experience in software development. Guide and lead team members towards successful project completion. Work with algorithms and data structures to design efficient solutions. Ensure high-quality code delivery through problem-solving and analytical skills. Collaborate effectively in a multi-functional team environment. Qualifications B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Good knowledge of C/C++, algorithms, and data structures. Strong problem-solving and analytical skills. Proven ability to guide and lead teams towards project completion. Desirable Previous experience in RTL synthesis tool development. Knowledge of Verilog, VHDL, and formal ve...

Job Title : FPGA Backend Engineer Experience : 3 to 6 Years Location : Bangalore Notice Period : Immediate to 15 Days Job Description : We are looking for a highly motivated FPGA Backend Engineer with 36 years of experience to join our engineering team in Bangalore . The ideal candidate will be responsible for implementing and optimizing FPGA designs from synthesis to bitstream generation, with a strong focus on timing closure and physical design. Key Responsibilities : Perform RTL synthesis and optimization using industry-standard tools (Vivado, Quartus, Synplify). Execute floorplanning, place & route (P&R) , and static timing analysis (STA) . Manage XDC/SDC constraint development for timin...

A minimum of 8 years of related experience. Excellent Software development experience with C / C++ on UNIX/Linux platforms Broad understanding of data structures, algorithms and their applications. Should have experience working in a multi-person product development environment with high dependencies and tight schedules. It is essential that the applicant is highly motivated and has solid desire to learn and explore new technologies. Demonstrated history of good analytical, debugging and problem-solving skills. Experience with complex software tool development and usage with legacy code base Exercise of judgment in developing methods, techniques, and evaluation criteria to meet project goals...

Looking for Siemens EDA ambassadors This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lea...