6 Rtl Simulators Jobs

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated ASIC Digital Design Engineer with a relentless passion for innovation and a commitment to excellence. Your deep expertise in digital design and verification is matched by your curiosity and willingness to tackle complex challenges. You have a solid foundation in microprocessor architectures and are adept at developing and maintaining hardware-software co-simulation environments. Your analytical mindset enables you to create comprehensive functional and code coverage models, and you handle regression testing with precision and care. Your technical toolkit is robust: you are fluent in HDL and verification languages such as SystemVerilog and Verilog, and you bring strong programming skills in C, C++, assembly, Python, and Perl. You are comfortable using RTL simulators and verification tools and are always eager to expand your technical horizons by learning new methodologies. Collaboration is second nature to youyou thrive in multi-cultural, multi-time zone teams and foster inclusive teamwork. Your excellent communication skills ensure that your ideas are heard and understood, and you enjoy sharing your knowledge while learning from others. You take pride in delivering high-quality, reliable work, and you are driven by the opportunity to make a meaningful impact on the future of technology. What Youll Be Doing: Developing and automating advanced testbenches for ARC processor verification processes. Creating and maintaining functional coverage models and analyzing coverage reports for completeness and effectiveness. Performing comprehensive code coverage analysis to ensure thorough verification and identify potential gaps. Integrating both third-party and internal verification IPs into verification environments. Managing regression testing cycles, analyzing results, and ensuring robust test coverage across all features. Collaborating with multi-site and multi-cultural teams to drive next-generation ARC processor verification projects. Contributing to the improvement of verification methodologies and automation flows. The Impact You Will Have: Ensuring the reliability and high performance of next-generation ARC-V processors. Contributing to the delivery of cutting-edge silicon IP solutions that power industry-leading products. Enhancing the efficiency and effectiveness of verification techniques and processes. Reducing time-to-market for high-performance, low-risk products through rigorous verification. Championing collaboration and knowledge sharing across global engineering teams. Helping Synopsys maintain and strengthen its leadership position in the semiconductor industry. What Youll Need: Bachelors degree in engineering or a related technical field (required). 4+ years of experience in digital design and verification, with a proven track record of success. Strong knowledge of digital design principles and methodologies. Proficiency in SystemVerilog, Verilog, C, C++, assembly, Python, and Perl. Hands-on experience with RTL simulators and verification tools. Experience with microprocessor architectures (RISC-V experience is a significant plus). Who You Are: An excellent communicator with strong verbal and written skills. A collaborative team player who thrives in a multi-cultural, multi-time zone environment. Analytically minded with exceptional problem-solving skills and attention to detail. Adaptable and eager to learn new technologies, tools, and methodologies. Self-driven, proactive, and passionate about delivering high-quality, reliable results. The Team Youll Be A Part Of: You will be a key member of the Synopsys DesignWare ARC Processor hardware team, working alongside talented engineers on next-generation ARC processor verification. The team is dedicated to developing and maintaining advanced verification environments, ensuring the high performance and reliability of our silicon IP solutions. You will collaborate with colleagues across various locations and time zones, contributing to innovative projects that drive the semiconductor industry forward. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Deploy and support front-end tools, such as RTL simulators , low-power tools , and static RTL checkers (e.g., Lint, CDC/RDC/SDC/DFT), and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) . Streamline the utilization of compute infrastructure using load distribution tools. Identify and prioritize the needs of internal users and develop capabilities for them. Proficiently use scripts to integrate tools, repositories, and compute infrastructure. Configure and maintain project progress Dashboards. Interface with EDA vendors for license and tool installations. Deploy tools and methodologies across different geographies for global teams. Education B.Tech/B.E in Computer Engineering (or allied disciplines like Electrical or Electronics). Experience 10+ years of relevant experience in CAD or allied disciplines. 4+ years in a CAD role for a several 100 million gate Silicon ASIC project . Knowledge and understanding of the ASIC flow . Required Skills Proficiency in Python , Bash , C , and Makefiles .

Deploy and support front-end tools, such as RTL simulators , low-power tools , and static RTL checkers (e.g., Lint, CDC/RDC/SDC/DFT), and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) . Streamline the utilization of compute infrastructure using load distribution tools. Identify and prioritize the needs of internal users and develop capabilities for them. Proficiently use scripts to integrate tools, repositories, and compute infrastructure. Configure and maintain project progress Dashboards. Interface with EDA vendors for license and tool installations. Deploy tools and methodologies across different geographies for global teams. Education B.Tech/B.E in Computer Engineering (or allied disciplines like Electrical or Electronics). Experience 10+ years of relevant experience in CAD or allied disciplines. 4+ years in a CAD role for a several 100 million gate Silicon ASIC project . Knowledge and understanding of the ASIC flow . Required Skills Proficiency in Python , Bash , C , and Makefiles .

Deploy and support front-end tools, such as RTL simulators , low-power tools , and static RTL checkers (e.g., Lint, CDC/RDC/SDC/DFT), and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) . Streamline the utilization of compute infrastructure using load distribution tools. Identify and prioritize the needs of internal users and develop capabilities for them. Proficiently use scripts to integrate tools, repositories, and compute infrastructure. Configure and maintain project progress Dashboards. Interface with EDA vendors for license and tool installations. Deploy tools and methodologies across different geographies for global teams. Education B.Tech/B.E in Computer Engineering (or allied disciplines like Electrical or Electronics). Experience 10+ years of relevant experience in CAD or allied disciplines. 4+ years in a CAD role for a several 100 million gate Silicon ASIC project . Knowledge and understanding of the ASIC flow . Required Skills Proficiency in Python , Bash , C , and Makefiles .

Deploy and support front-end tools, such as RTL simulators , low-power tools , and static RTL checkers (e.g., Lint, CDC/RDC/SDC/DFT), and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) . Streamline the utilization of compute infrastructure using load distribution tools. Identify and prioritize the needs of internal users and develop capabilities for them. Proficiently use scripts to integrate tools, repositories, and compute infrastructure. Configure and maintain project progress Dashboards. Interface with EDA vendors for license and tool installations. Deploy tools and methodologies across different geographies for global teams. Education B.Tech/B.E in Computer Engineering (or allied disciplines like Electrical or Electronics). Experience 10+ years of relevant experience in CAD or allied disciplines. 4+ years in a CAD role for a several 100 million gate Silicon ASIC project . Knowledge and understanding of the ASIC flow . Required Skills Proficiency in Python , Bash , C , and Makefiles .

Deploy and support front-end tools, such as, RTL simulators, low power tools, static RTL checkers such as Lint, CDC/RDC/SDC/DFT, and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) Streamline utilization of compute infrastructure using load distribution tools Identify and prioritize needs of internal users and develop capabilities for them Proficiently use scripts to integrate tools, repos and compute infrastructure Configure and maintain project progress Dashboards. Interface with EDA vendors for license and tool installations Deploy tools and methodologies across geographies for global teams working together Location- Remote, Delhi NCR, Bangalore, Chennai, Pune, Kolkata, Ahmedabad, Mumbai, Hyderabad Education- B.Tech/B.E in Computer Engineering (or allied discipline e.g. Electrical, Electronics) 10+ years of relevant experience in CAD or allied disciplines 4+ years in a CAD role for a several 100 million gate Silicon ASIC project Knowledge and understanding of ASIC flow Proficiency in python, bash, c, Makefiles