1168 Rtl Jobs - Page 35

Become a member of one of the largest engineering companies in the world! The PSG IP and Solutions Engineering team is seeking an experienced IP Design Lead to help define and lead the next generation Transceiver solutions for PCIe, Ethernet, SmartNIC, Networking and Communications segments for programmable logic products. This forward-looking dynamic role provides unique opportunities to influence future product direction requiring a strong technical leader with strong leadership, personal communication and collaboration skills. The successful candidate will bring design solutions experience for Data Center, and/or Communications, Networking, and/or Wireless domains, ideally covering both h...

Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces . Strategize, brainstorm, and propose a DV (Design Verification) environment . Develop test bench . Own test plan . Debug all RTL artefacts . Achieve all signoff matrices . Collaborate with worldwide architecture, design, and systems teams to achieve all project goals. Required Skills & Qualifications (matching one or more profiles) Strong knowledge in developing UVM based System Verilog TBs and assertion/coverage driven verification methodologies. Strong communication skills (both written and verbal). Ability to learn, improve and deliver. Preferred Skills & Experience ...

Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles. Key Responsibilities and Skills: Synthesis, Static Timing Analysis and LEC of SoC/Cores. Full chip and block level timing closure, IO budgeting for blocks. Logical equivalence check between RTL to Netlist and Netlist to Netlist. Knowledge of low-power techniques including clock gating, power gating and MV designs. ECO timing flow. Proficient in scripting languages (TCL and Perl). Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Eng...

15+ years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Desig...

12+ years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Desig...

We are seeking highy motivated individuas with a BS, MS, or PhD degree in Computer Science, Computer Engineering/ECE, ready to hande the chaenging probems in future technoogies and designs. We are aso ooking for candidates with Strong C/C++background to ead our eading-edge agorithmswithin our EDA soutions to increase our design team’s productivity and chip quaity and performance. Our dynamic goba team is ooking to enist enthusiastic professionas to join word-cass hardware design teams responsibe for deveoping the most chaenging and compex systems in the word. We are seeking energetic, highy motivated individuas wiing to go the extra mie with the aim of heping the overa IBM deveopment team. S...

As a Logic Design Engineer in the IBM Systems division, you wi be responsibe for the microarchitecture design and deveopment of features to meet Secure, high performance & ow power targets of the Mainframe and / or POWER customers. Deep expertise in the impementation of functiona units within the core / cache / Memory controer / Interrupt / crypto / PCIE / DLL Additiona responsibiities: ogic (RTL) design, timing cosure, CDC anaysis etc. Understand and Design Power efficient ogic. Agie project panning and execution. Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Require...

As a Logic design Engineer in the IBM Systems division, you wi be responsibe for the microarchitecture design and deveopment of features to meet Secure, high performance & ow power targets of the Mainframe and / or POWER customers.Deep expertise in the impementation of functiona units within the core / cache / Memory controer / Interrupt / crypto / PCIE / DLLAdditiona responsibiities:ogic (RTL) design, timing cosure, CDC anaysis etc.Understand and Design Power efficient ogic.Agie project panning and execution.Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required educ...

As a DFT Engineer, you will be responsible for developing and implementing Design for Test methodologies for complex VLSI designs. You will ensure the testability and manufacturability of our products by working closely with design, verification, and physical design teams, while employing state-of-the-art techniques to optimize coverage, cost, and performance. Responsibilities: 1. Develop and implement DFT architectures and strategies for complex SoC designs. 2. Insert and verify DFT features such as scan chains, Built-In Self-Test (BIST) for memory and logic, and boundary scan (IEEE 1149.1/1149.6). 3. Perform ATPG (Automatic Test Pattern Generation) and analyze coverage metrics to ensure hi...

Role: FPGA Engineer Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in FPGA design and development, with a focus on RTL coding using Verilog or VHDL. Deep understanding of computer architecture, digital design principles, and hardware/software co-design concepts. Experience with high-frequency trading systems and ultra-low latency design techniques is highly desirable. Proficiency in FPGA development tools and workflows, such as Xilinx Vivado or Intel Quartus. Strong analytical and problem-solving skills, with the ability to optimize designs for performance, power, and resource utilization. Excellent communication and colla...

raja.a@honeybeetechsolutions.com resume to Client Name: Proxelera Client SPOC: NA Industry: SEMICON HBTS SPOC: Shilpa Gajjala Client Req ID: ZR_116_JOB Position Name RTL Engineer Job No : PROX-14075 Position type: Permanent Total Exp: 4 to 5 years HBTS Budget: Open No of Position: 1 Notice Period: Immediate Asset: Laptop Mandatory for interview Work Location: Hyderabad Work Type: WFO Job Type: Full-time CVR Type: Internal CVR CVR Panel Name: Shilpa Gajjala Interview Rounds: 2 Rounds Interview Mode: Virtual in Teams Job Description Must have: Must Have RTL coding knowledge Must Have Top-level (SOC) level basic industry standard Arch knowledge Must Have SoC & IP level Integration knowledge Mus...

#Hiring FPGA Design Engineer Exp-5- 8Years Notice Period- 0 to 15Days Location- Bangalore Job Description: RTL and FPGA design, implementation, and timing closure using Xilinx & Synopsys development tools. Bring up and validate the design in the lab and generate test reports. Perform hardware validation tasks and debug IPs. Read, understand, and modify software drivers and scripts. Skills RTL Design & FPGA Implementation: Verilog, System Verilog, Vivado , ISE, Synplify, Design Compiler FPGA Platforms: Xilinx 7-series, Ultrascale/Ultrascale+, Zynq Toolchain Expertise: Xilinx Vivado, Synopsys DC/PT, ModelSim, VCS Hardware Validation: Bitstream generation, on-board debugging, performance tuning...

GlobalFoundries is looking for highly motivated Test Chip Architect for Foundational IP's in the Global Organization, based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires a close working relationship and collaboration with internal IP teams, technology, test and product engineering teams. The roles and responsibilities will include architecture definition and design of Test Chips and also Post Silicon Debug till Silicon Report Generation Activities. Your Job: ? Well versed in Verilog and SV with good understanding of RTL design, verification and synthesis practices. Prior work experience in the RTL and or gate level verif...

Position: RTL Verification Experience: 5+ Years Location: Hyderabad Skill Required: System Verilog and UVM, HW Testing, PCIe/SPI/I2C/, Perl, Python or TCL If interested to send your updated resume to irfanai@canvendor.com / reach out to 9585544407

- Lead the architecture, design and development of Processor Core Vector- Scalar Execution unit for high-performance IBM Systems. - Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Pa...

4+ years of experience in RTL design and verification. Proven experience with digital logic design using Verilog, VHDL, or System Verilog. Experience with simulation tools such as VCS, QuestaSim, or similar. Hands-on experience with RTL design tools (e.g., Synopsys Design Compiler, Cadence Genus). Develop RTL code based on system-level specifications using Verilog, VHDL, or SystemVerilog. Implement complex digital functions and algorithms in RTL. Create and execute detailed test plans to verify RTL designs. Proficiency in writing and debugging RTL code. Experience with synthesis, static timing analysis, and linting tools.

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make real...

Bachelors or Masters degree in Electrical, Electronics or VLSI Engineering Expertise in DFX Verification preferred Expertise in DFT / ASIC Verification Expertise in System Verilog Expertise in UVM Expertise in python or perl scripting Expertise in verifying JTAG, scan chains, MBIST, LBIST, boundary scan and related test logic for large complex SoCs. Expertise in simulation tools like VCS, Questa, XSIM Excellent knowledge on RTL and DFT concepts Prior experience in Post-silicon validation is an added advantage Prior experience on automotive or AI SoCs is an added advantage Preferred resources with valid regional work permit

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 1-3 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC ver...

As a Logic design lead in the IBM Systems division, you will be responsible for the micro architecture, design and development of a high-bandwidth, low-latency on-chip interconnect (NoC) and chip-to-chip interconnect and integration into high-performance IBM Systems. Design and architect different interconnect topologies as driven by bandwidth, latency and RAS requirements Develop the features, present the proposed architecture in the High level design discussion Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW teams to develop the feature Signoff the Pre-silicon Design that meets all the functional, area and timing goals Participate in ...

Responsible for high performance microprocessor blocks RTL to GDSII implementation Perform block level synthesis, floor-planning, placement and routing. Close the design to meet timing, power budget and area. Implement ECO's to address functional bugs and timing violations. Team player, with good problem solving and communication skills. Required education Bachelor's Degree Required technical and professional expertise 5-8 years industry experience in physical design methodology. Good knowledge andhands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing . Should be knowledgeable in physical verification ( LVS,DRC. etc), Noise a...

-Lead the Architecture, Design and development of processor L2 and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in g...

Job Details: : Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Participates in the definition of architecture and microarchitecture features of the block being designed. Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design fea...

Job Details: : In this position, you will be working in a team of enthusiastic engineers on High Speed Designs in P and R from RTL to GDSII. You will be part of ACE Group, in the P-Core design team driving Intels latest CPUs in the latest process technology. Your responsibilities will include but not limited to: Meet the design targets of high performance and low-power digital design.Static timing analysis. Power OptimizationDesign Convergence Experience at IP, SoC level. Ability to work in a highly dynamic environment across geographies. Back end design and implementation of new features. Post silicon performance push activities. PPA improvement and Methodology improvements Qualifications: ...

Job Details: : You will be part of ACE India , in the P- Core design team driving Intels latest CPUs in the latest process technology. In this position, you will be working in a team of enthusiastic engineers on High Speed Designs in PNR from RTL to GDSII. Your responsibilities will include but not limited to:Meet the design targets of high performance and low-power digital design.Static timing analysis.Power Optimization.Design Convergence Experience at IP, SoC level.Ability to work in a highly dynamic environment across geographies.Back end design and implementation of new features.7Post silicon performance push activities. Qualifications: You must possess a Masters Degree in Electrical or...