807 Rtl Jobs - Page 33

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics Semiconductor. Entry level graduate with limited commercial and technical work experience. Build skills and expertise in a chosen Engineering Discipline. Works to instructions and directions and delivers reliable results. Keen to understand clients business needs. Solves routine problems. Organises own time with a short time horizon. Skills (competencies)

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs), printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment. Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs), printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment. Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

We are looking for a highly experienced DFT Lead Engineer to take ownership of Design-for-Test (DFT) architecture, implementation, and sign-off for complex flat SoC designs. This role requires deep expertise in PNR (Place-and-Route) within Cadence flow. Key Responsibilities Lead DFT strategy and implementation for flat SoC designs from RTL through tape-out. Develop and integrate test architectures including scan insertion, MBIST, LBIST, JTAG, and boundary scan. Work closely with the PNR team to ensure DFT structures are timing- and placement-aware. Drive test mode constraint creation and ensure compatibility with functional modes. Perform gate-level simulations for test logic verification. Own ATPG pattern generation and coverage analysis for manufacturing test. Lead reviews and mentor junior DFT engineers in best practices. Qualifications Must-Have: Bachelor s or Master s degree in Electrical/Electronics/Computer Engineering or related field. 10 12 years of hands-on DFT experience in ASIC/SoC projects. Proven PNR experience to handle flat SoC designs in Cadence flow Strong knowledge of scan insertion, MBIST, LBIST, boundary scan, JTAG, and related standards (IEEE 1149.x). Experience with Synopsys DFT Compiler, Tessent, or equivalent DFT tools. Good understanding of STA and SDC constraints for test modes. Familiarity with ECO flows in post-PNR stages for DFT fixes. Nice-to-Have: Automotive semiconductor industry experience Proficiency in scripting ( Tcl, Perl, Python ) for automation. Low-power DFT experience with UPF/CPF. Exposure to signal integrity considerations for test structures. Prior technical leadership or mentoring experience.

Builds emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools. Develops, integrates, tests, and debugs hardware and software collateral in simulation, emulation, and FPGA models for testing new features. Writes directed tests, develops the test environment and hybrid emulation environment, and supports verification of hardware and software/firmware. Defines and develops new capabilities and tools to achieve better verification through improved emulation and FPGA model usability. Enables acceleration of RTL development and improve emulation/FPGA model usability for pre-silicon verification, post-silicon validation, and software development. Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform and interfaces with and provides guidance to verification teams for optimizing pre-silicon verification environments, test suites, and methodologies for emulation efficiency. Develops and utilizes automation aids, flows, and scripts in support of emulation utilization. Applies understanding of emulation and FPGA prototyping tools and methodologies, SoC integration, emulation transactors, emulation performance and optimization techniques, RTL simulation, and hybrid emulation environments (virtual platform and FPGA/emulation model). Collaborates with design, power and performance, silicon validation, and software teams, and participates in SoC and IP bring up, root causes testbench issues, IP and SoC testcases, and emulator/FPGA environment issues. Qualifications: Bachelor of Engineering with 12+ years of experience

Position: Synthesis + STA Engineer (SI80FF RM 3488) Responsibilities & Required Experience: Strong understanding of timing closure for multi-clock, high-frequency timing, congestion, crosstalk, and area-sensitive designs. Collaborate with RTL designers for constraint development and cleanup. Proficient in Synopsys/Cadence tools with hands-on experience in advance features of Design compiler and PrimeTime SI. Deep expertise in low-power design (UPF/CPF), clock gating, logic optimization, and integration of high-speed interfaces like DDR and PCIe Provide technical leadership to successful tape outs at advanced technology nodes (7nm, 5nm and 3nm). Good scripting, communication and debugging skills. Job Category: Others Job Type: Full Time Job Location: Bangalore Experience: 8+ years Notice period: 0-15 days

Position Title D&T Associate Analyst Supply Chain - Product Information Capabilities Function/Group Digital & Technology Location Mumbai Shift Timing Regular Role Reports to D&T Manager - Supply Chain Product Information Capabilities Remote/Hybrid/in-Office Hybrid JOB OVERVIEW Function Overview The Digital and Technology team at General Mills stands as the largest and foremost unit, dedicated to exploring the latest trends and innovations in technology while leading the adoption of cutting-edge technologies across the organization. Collaborating closely with global business teams, the focus is on understanding business models and identifying opportunities to leverage technology for increased efficiency and disruption. The teams expertise spans a wide range of areas, including AI/ML, Data Science, IoT, NLP, Cloud, Infrastructure, RPA and Automation, Digital Transformation, Cyber Security, Blockchain, SAP S4 HANA and Enterprise Architecture. The MillsWorks initiative embodies an agile@scale delivery model, where business and technology teams operate cohesively in pods with a unified mission to deliver value for the company. Employees working on significant technology projects are recognized as Digital Transformation change agents. The team places a strong emphasis on service partnerships and employee engagement with a commitment to advancing equity and supporting communities. In fostering an inclusive culture, the team values individuals passionate about learning and growing with technology, exemplified by the Work with Heartphilosophy, emphasizing results over facetime. Those intrigued by the prospect of contributing to the digital transformation journey of a Fortune 500 company are encouraged to explore more details about the function through the following Link Purpose of the role This is an exciting time to work in General Mills Supply Chain & ITQ Organization! We are accelerating Digital Transformation of our Product Information Capabilities (PIC) capabilities to provide a competitive advantage to our business. To this end, we are looking for a D&T Associate Analyst, with passion for Product Information Management (PIM) and (Master Data Management) MDM to join our Product Information Capabilities team. The PIM / MDM Engineering team requires agile team members who can support ecommerce by creating the systems of records and developing rightful integrations which would help in sourcing, validating, publishing, and quality checking the data that our customers use to create the digital shelf and our product s detail pages. This would need a team which is well versed with managing Product Master Data. The vision is to expand the platform further to benefit other business areas KEY ACCOUNTABILITIES Onboarding of Product information - Manage or support the processes which collect, groom, publish, validate, audit and assure quality product data for our customers Engage with internal customer teams and/or ecommerce teams on product information support Support RTL and the aligned processes Establish, monitor and report on KPIs around PIM and MDM Manage stakeholder expectations and communication Working in an International, multi-cultural environment Good problem-solving skills, bias for action, decisive, strong time management skills MINIMUM QUALIFICATIONS Bachelors in computer (BE or BSc) or STEM fields Working knowledge of PIM and MDM tools Experience with PIM workflows, data quality error analysis and workbench error resolution Good Business Analysis Skills or engineering skills willing to take up BA roles High level experience of Data Syndication Experience in FMCG industry will be a plus PREFERRED QUALIFICATIONS Product Information Management / Master Data Management Business Analysis skills Stibo or similar MDM platform SQL, Cloud GCP Agile / SCRUM Delivery