1323 Rtl Design Jobs - Page 6

Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, youll contribute to developing next-generation networking chips. Responsibilities include: Being a member of design team who oversees fullchip SDCs and w...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the worlds most important challenges We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives, AMD together we advance_ Custom Analog Design Engineer The Role The focus of this role is to plan, build, and execute the v...

Role Overview: As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. Key Responsibilities: - Possess 6 to 9 years of experience in Synthesis, Constraints, and interface timing Challenges with a strong knowledge of Power being preferable. - Demonstrate expertise in...

As an Implementation Engineer at Kinara, a Bay Area-based venture backed company, you will play a crucial role in leading and executing Synthesis and Static Timing Analysis (STA) for complex AI SoC designs with multi-mode and multi-power domain functionalities. Your responsibilities will include: - Conducting Synthesis and STA to ensure the quality and reliability of our products - Optimizing designs for low power and high performance with logically equivalent RTL - Implementing ECOs for functional and timing closure - Working with multi-clock, multi-power domain designs and multi-mode timing constraints - Inserting DFT and collaborating with different functional teams like RTL Design, DFT, ...

As an ASIC Design Engineer at AMD, you will be part of the AMD IOHUB Team within the NBIO organization. Your primary responsibility will be to contribute to the development of cutting-edge I/O connectivity and virtualization technologies that power data center and machine learning workloads. This role involves working on various aspects of IP design, from architecture to execution. Your contributions will play a key role in ensuring the highest quality and industry-leading technologies are delivered to the market. Key Responsibilities: - Design complex IPs including control and datapath components. - Understand the functional and performance requirements of IOHUB in different SOCs. - Ensure ...

You have an exciting opportunity at Manipal Dot Net Pvt Ltd as a Hardware Engineer. As part of the role, you will be responsible for the prototype, production, and manufacturing of electronic products. Your key responsibilities will include: - Component sourcing, inventory maintenance, product packaging, and shipping. - Schematic capture, PCB layout, and design using state-of-the-art tools. - Board-level troubleshooting, debugging, and re-working. - Electronic component assembly and soldering. - Knowledge of RTL design and MCU programming skills would be a plus. - Preparation of design specifications, requirement documents, and user manuals. Desirable Skill Set: - Knowledge of Hardware engin...

Role Overview: Eridu AI India Private Limited, a subsidiary of Eridu Corporation in Saratoga, California, USA, is seeking experienced RTL designers to join their R&D center in Bengaluru. As an RTL designer at Eridu AI, you will have the unique opportunity to define and implement industry-leading Networking ASICs. Your role will involve working on microarchitecture and design implementation of high-speed networking ASICs, optimizing latency, and supporting quality of service. You will collaborate with cross-functional teams to troubleshoot and resolve complex networking issues. Key Responsibilities: - Packet buffering, queuing, and scheduling: Focus on microarchitecture and design implementat...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and accomplished digital design engineer with an unyielding drive for excellence. You thrive in technically challenging environments, where your deep understanding of RTL design and system architecture allows you to craft innovative solutions for complex probl...

As an experienced chip design engineer, you will be responsible for the following key domains: - Power Optimization: Utilize low-power design techniques and methodologies, including expertise in the Unified Power Format (UPF). - Timing Optimization: Demonstrate proficiency in static timing analysis (STA) and implement design constraints using the Synopsys Design Constraints (SDC) format. - Functional Safety Analysis: Apply a deep understanding of functional safety concepts and standards (e.g., ISO 26262), employing analysis techniques such as FMEDA and FTA. - Utilize industry-standard Electronic Design Automation (EDA) tools from vendors like Synopsys, Cadence, or Siemens EDA. - Proficiency ...

You have a Job opportunity with eInfochips for the position of ASIC RTL DESIGN ENGINEERS based in Bangalore or Ahmedabad. **Role Overview:** You should have at least 5 years of experience in RTL design with expertise in Verilog/VHDL. Experience with simulation tools such as Modeslim/VCS and familiarity with basic protocols like I2C, UART, PCIe, and SPI are required. Knowledge of micro-architecture and CDC/Lint tools will be beneficial. Exposure to timing analysis, CDC design, and ISO26262 standards will be an added advantage. **Key Responsibilities:** - Experience in RTL design - Proficiency in Verilog/VHDL - Working with simulation tools like Modeslim/VCS - Understanding of basic protocols ...

Role Overview: You are expected to execute any sized customer projects independently with minimum supervision and guide team members technically in any field of VLSI Frontend Backend or Analog design. As an Individual contributor, you will take ownership of any one or more tasks/modules related to RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc. and lead the team to achieve results. Your responsibilities will include completing assigned tasks successfully and on-time within the defined domain(s), anticipating, diagnosing, and resolving problems, coordinating with cross-functional teams as necessary, ensuring on-time quality...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The responsibility includes:-. -Independent planning and execution of Netlist-to-GDSII. -Good understanding of basics of static timing analysis. -Well versed with the Block level and SOC level timing closure (STA) methodologies, ECO generation and predictable convergence. -Should be able work in close collaboration with design, DFT and PNR team and resolve issues wrt constraints validation, verification, STA, Physical design, etc. -Should have good exposure to high frequency multi voltage design convergence. -Good understanding of clock networks. -Circuit level comprehension of timing critical paths in the...

You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology. As a DFT engineer direct responsibilities of the role, but not limited to, working on various aspects of PCORE DFT including Spyglass DFT, RTL implementation, Verification, Scan, and ATPG. The candidate must be able to drive the DFT implementation for various features incl Scan, MBIST, TAP, etc. Previous experience working with manufacturing engineering, pattern delivery, and post-silicon support is a definite plus. Qualifications: Candidate must possess a Master's degree in Electronics or Computer Engineering with at least 7 or more years of experience or a bachelor's de...

Why Join QFAI? Join a passionate team, dedicated to making a difference. We are a close-knit team, with strong mission, vision and values that guide our day-to-day. Recognition of work, respect, and our multicultural community are key aspects of the employee experience and contribute to our continued success. Would you like to be part of our story? Don't hesitate, come and join us! About this opportunity We are seeking a highly skilled and passionate Formal Verification Engineer to join our team working with the best in the Industry, developing innovative ASIC solutions for data center and AI Infrastructure. The ideal candidate will develop comprehensive formal test plans and be responsible ...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ...

-Verification of RTL designs -Block/subsystem/chip level functional verification -Implement verification environment independently in SV using UVM methodology -Feature extraction and coverage driven verification plan development -Development and execution of test cases -Report test results and assist in RTL debug using simulation -8 - 10 years of hands-on experience of verification in customer projects -Bachelors/Masters in Electronics Engineering -Strong communication skills mandatory

Job Title FPGA RTL Design Engineer Wireless ORAN Domain Location BLR client site Experience 10 to 12 years 2 Engineers 6 to 10 years 2 Engineers Total number of positions 4 About the Role RTL Design Engineers with deep expertise in telecom domain with exposure in ORAN. You will work closely with the customer to develop cutting edge ORAN equipment to cater to control plane and data plane implementations. Key Responsibilities Work with system architect to understand the requirements and design efficient RTL implementations targeting FPGAs. Translate MATLAB models to RTL for hardware realization MATLAB Simulink based modelling simulation and conversion to RTL Develop RTL architecture and microa...

As a Senior Cache and Memory Design Engineer, you will be responsible for designing and developing memory subsystem solutions for the semiconductor portfolio. Working within the Cache and Memory Design Team, you will collaborate with highly skilled engineers from other teams to create efficient and high-performance memory subsystems critical for modern designs. Key Responsibilities: - Define address map, CHI and CXL protocols, cache, and bank memories - Utilize proficiency in RTL design using Verilog or VHDL - Apply knowledge of scripting languages such as Python, Perl, Bash, and TCL - Experience with Timing and Timings Constraints - Familiarity with revision control methodology and tools li...

As an ASIC Design Manager at MaxLinear, you will be part of the Digital ASIC Design group responsible for developing innovative ASIC solutions across various domains such as wired and wireless communications, storage, and networking. Your role will involve managing, mentoring, and guiding a high-performance team in architecting and designing advanced digital components like signal processing modules, network processors, hardware accelerators, and interface controllers. Your key responsibilities will include: - Leading and mentoring a team of digital ASIC designers across multiple projects and domains - Driving architecture and micro-architecture definition for complex digital blocks - Overse...