1327 Rtl Design Jobs - Page 27

We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period). The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms. The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements. The engineer will collaborate with architects, verification, and system software teams to ach...

Functional Safety Lead VLSI / SoC Email: prabhu.p@acldigital.com | WhatsApp: +91 87543 87484 Job Overview We are looking for an experienced VLSI Functional Safety Lead who will be responsible for planning and leading functional safety activities in compliance with ISO 26262 for silicon hardware design . You will work across SoC and IP development teams to drive safety analysis, audits, verification methodologies , and ensure compliance to functional safety standards. This is a key leadership role that requires a strong mix of ASIC/SoC design, verification, and ISO 26262 functional safety expertise . Key Responsibilities Lead functional safety activities for ASIC/SoC designs in compliance wit...

We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period). The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms. The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements. The engineer will collaborate with architects, verification, and system software teams to ach...

We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period). The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms. The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements. The engineer will collaborate with architects, verification, and system software teams to ach...

Job Description We are looking for an experienced Design Verification Engineer to join our team and contribute to the verification of complex SoC/ASIC designs. The ideal candidate will have strong expertise in verification methodologies, testbench development, and debugging. Key Responsibilities: Develop and implement verification plans, environments, and testbenches using SystemVerilog/UVM. Write and execute test cases for functional, regression, and coverage-driven verification. Perform debugging and root cause analysis for design and verification issues. Collaborate with RTL design, architecture, and validation teams to ensure quality deliverables. Analyze functional coverage metrics and ...

Education: Bachelors degree (BE/B.Tech)orMasters degree (ME/M.Tech) Roles & Responsibilities: Acquire knowledge microarchitecture an ASIC unit by studying the specification and interacting with the logical design team. Write and perform the test plan in close cooperation with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog C++. Write, maintain and publish the verification specification. Monitor, analyze and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Produce a maintainable and reusable code across projects Required Skills and Experience ...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Collaborate with design and verification t...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Design Verification: SV/UVM Test Bentch Developement Any Protocols: PCI Express or UCIe, CXL or NVM • AXI, ACE or CHI • Ethernet, RoCE or RDMA • DDR or LPDDR or HBM) • 6+ years of hands-on DV experience in System Verilog/UVM. •Must be able to own and drive the verification of a block / subsystem or a SOC. •Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Physical Design: •In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. - Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Floor Planning/Innovus/Fusion Compiler Experience on programming in Tcl/Tk/Perl. Physical Design Methodologies a...

Qualcomm India Private Limited is seeking talented engineers for CPU RTL development targeted at high-performance, low-power devices. As a CPU Micro-architecture and RTL Design Engineer, you will collaborate with chip architects to conceptualize the micro-architecture and contribute to architecture/product definition early in the product life-cycle. Your responsibilities will include performance exploration, microarchitecture development and specification, RTL ownership to achieve power, performance, area, and timing goals, functional verification support, performance verification support, and design delivery in coordination with a multi-functional engineering team. To excel in this role, yo...

You have an immediate job opening with one of your valuable clients in Hyderabad for FPGA with Firmware profiles. The ideal candidate should have at least 8 years of experience in FPGA, RTL Design, RTL Coding, Firmware, CDC, and Lint. The location for this position is Hyderabad and the notice period is immediate to 15 days. If you are interested in this opportunity, kindly share your updated profile with Anand Arumugam at anand.arumugam@modernchipsolutions.com or call +919900927620 for further discussion.,

The ASIC/SOC Front End Design Engineer role involves setting up ASIC QA flows for RTL design quality checks, understanding top-level interfaces, clock structure, reset structure, RAMs, CDC boundaries, and power domains. You will be responsible for executing various design steps such as Lint, Synthesis, LEC, Static timing analysis, CDC, RDC, DFT, and CLP. Additionally, you will create clock constraints, false paths, multi-cycle paths, IO delays, exceptions, and waivers while reviewing flow errors, design errors, and violations. As an ASIC/SOC Front End Design Engineer, you will debug CDC and RDC issues, provide RTL fixes, and support the DFX team for DFX controller integration, Scan insertion...

As a RTL Design Engineer for DDR Memory Controller IP development team at Cadence, your primary responsibility will be to design and support the RTL of the DDR Memory Controller solution. This entails supporting all leading DDR memory protocols including DDR4/LPDDR4. You will collaborate on working with the existing RTL, incorporating new features, ensuring customer configurations are clean during verification regressions, providing customer support, and ensuring the design adheres to LINT and CDC design guidelines. To qualify for this role, you should hold a BE/B.Tech/ME/M.Tech in Electrical/Electronics/VLSI and possess significant experience as a design and verification engineer, with a fo...

MIPS is looking for a highly experienced and motivated Engineering Manager to lead the CPU team. In this critical role, you will manage a team of skilled engineers dedicated to developing high-performance CPU cores based on the RISC-V architecture. Your responsibilities will include overseeing the entire RTL design lifecycle, ensuring technical excellence, innovation, and timely delivery. You will lead and mentor a team of microarchitecture and RTL design engineers focused on high-performance CPU core development. Your role will involve driving the design execution of CPU subsystems, meeting performance, power, area, and quality goals. You will be responsible for creating and refining microa...

As a Sr. Staff Software Development Engineer at Lattice, you will be part of a dynamic and energizing international community of engineers, designers, and specialists dedicated to developing cutting-edge programmable logic solutions. Our focus on research and development, product innovation, and exceptional customer service drives us to bring our total commitment and competitive spirit to every project. In this role, you will be accountable for various responsibilities, including familiarity and hands-on experience with DevOps principles such as CI/CD, Perforce/Github, and EDA tools. You will have the opportunity to innovate in GenAI applications and productivity automation, administer publi...

As an experienced Digital Design Engineer with 3+ years of experience, you will collaborate with system architects to interpret high-level specifications and requirements for digital design. Your responsibilities will include creating RTL descriptions of digital circuits using hardware description languages such as Verilog and SystemVerilog to capture the desired functionality. You will implement digital logic functions, state machines, and control units to meet design goals for performance, power, and area (PPA). In this role, you will work with synthesis tools like Synopsys Design Compiler and Cadence Genus to optimize the RTL code for efficient gate-level implementation. You will address ...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to create a smarter, connected future for all. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. You should have a Bachelor's degree in Computer Sc...

Qualcomm India Private Limited is seeking a passionate and skilled Hardware Engineer to join our Engineering Group. As a Hardware Engineer at Qualcomm, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on a wide range of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to develop cutting-edge products. Collaboration with cross-functional teams is essential to meet performance requirements and deliver innovative solutions. To be considered for this role, you should hold a Bachelor's degree, Master's degree, or PhD in Computer Science, Electrical...

Job description Meta is looking for Design Verification Engineering Manager to join our dynamic team and embark on a rewarding career journey. Lead verification strategies for complex chip designs. Oversee testbench development and execution. Ensure compliance with verification methodologies.

Job description Meta is looking for ASIC Engineer, Accelerator Systems to join our dynamic team and embark on a rewarding career journey. Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong...

Job description Meta is looking for ASIC Engineer, Design Verification to join our dynamic team and embark on a rewarding career journey. Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong...

Job description ASIC Engineer, Architecture Responsibilities Work on advanced architecture, algorithms and models targeting Machine Learning solutions. Analyze and map data center workloads to ASIC architecture, as well as develop performance and functional models to validate the architecture. Implement and analyze algorithms and enhanced architecture for the data center Machine Learning accelerators. Implement various models needed for the validation of the accelerators. Create Machine Learning kernels to analyze the ASIC Architecture, and make the architecture optimal for ML workloads. Minimum Qualifications Currently has, or is in the process of obtaining, a Bachelors degree in Electrical...

Job description ASIC Engineer, Architecture Responsibilities Work on advanced architecture, algorithms and models targeting Machine Learning solutions. Analyze and map data center workloads to ASIC architecture, as well as develop performance and functional models to validate the architecture. Implement and analyze algorithms and enhanced architecture for the data center Machine Learning accelerators. Implement various models needed for the validation of the accelerators. Create Machine Learning kernels to analyze the ASIC Architecture, and make the architecture optimal for ML workloads. Minimum Qualifications Currently has, or is in the process of obtaining, a Bachelors degree in Electrical...

Job description Meta is looking for ASIC Engineer, SoC Architect to join our dynamic team and embark on a rewarding career journey. Your role involves working on complex projects and ensuring that ASICs meet performance, power, and area requirements. Key Responsibilities : Design Planning : Collaborate with cross-functional teams to define project goals, scope, and design requirements for ASIC projects. Establish design plans, including specifications, milestones, and budgets. Architecture and Microarchitecture : Create architectural and microarchitectural specifications for ASIC designs, outlining high-level structure and functionality . RTL Design : Implement ASIC designs using hardware de...

Job description ASIC Engineer Responsibilities Design and develop firmware and tooling for next-gen data center chips, Lead the design and development of embedded software engineering activities and provide technical leadership and guidance to team members, analyze, design, develop, and debug firmware for a wide variety custom SoC for data center solutions Be a go-to person to escalate the most complex development, performance and evaluation issues that require in-depth knowledge of product-focused firmware development Support all phases of SoC development - including early architecture requirements definition for custom silicon, firmware architecture, implementation, simulation, FPGA debug,...