1323 Rtl Design Jobs - Page 13

Role Overview: As a DFT Architect at SEMIFIVE, you will be responsible for defining and owning the SoC-level DFT architecture, ensuring first-time-right silicon, and leading customer engagements by representing Semifive in technical discussions. Your role will also involve mentoring junior engineers, providing sign-off accountability for DFT across multiple SoC tapeouts, and collaborating with cross-functional teams to deliver complex SoC programs for global customers. Key Responsibilities: - Define and own the SoC-level DFT architecture including Scan, MBIST, JTAG/TAP, BISR, Compression, Boundary Scan, and LBIST. - Perform DFT RTL integration, Spyglass DFT checks, Scan insertion, ATPG gener...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work , to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do thei...

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will analyze, design, code, and test multiple components of application code across one or more clients. You will perform maintenance, enhancements, and/or development work in a dynamic environment, contributing to the success of the projects. Roles & Responsibilitie...

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's Intelligent Cloud mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for p...

Job Description In your new role you will: create and define verification plans; develop verification environments for our ICs using UniversalVerification Methodology (UVM). draw on test scenarios using SystemVerilog; verify functionality using the Constrained Random approach; develop assertions in SystemVerilog for formal verification; Interact with other disciplines, such as Concept and ApplicationEngineering, to define verification plans and strategies; provide proactive support to users of our verification flowenvironment; be responsible for our verification methods; Your Profile You are best equipped for this task if you have: You have successfully completed a university degree in Elect...

Experience Level:5+ years of RTL design and development Location: Hyderabad/Bangalore Job Description:Silicon Design Engineer Basic Job Deliverable:Silicon Design Engineer (RTL Design and Development) o Responsible for RTL design and development o Responsible for generating documents, such as requirements specification, design, user-guide, etc., o Experience: ? Experience in FPGA VHDL and/or Verilog design, Xilinx technology and tools ? Experience with Ethernet/PCIe/SPI/I2C/USB/GPIO/Memory architectures /DDR/SDRAM/DMA technologies ? Experience in HW testing, including working with test equipment logic and traffic analysers, test generators, etc. ? Strong debugging skills at device and board ...

Hi All, Job Location: Bangalore Notice Period: 15 days to 30 Days Minimum: 5+ Years 1.Experience in Low power RTL design, microarchitecture, synthesis, timing closure, Low power estimation. Should be proficient in Verilog. 2. Should have experience in optimization of microarchitecture and RTL for area and power reduction. Experience with Arithmetic units, Floating point datapath design is a plus. 3. Should have experience using ASIC design tools such as VCS, Verdi, Design Compiler. Knowledge of power estimation tools(such as Spyglass, PTPX), scripting languages (Shell, Perl, Python), C language is a plus. 4. Experience with hardware architecture exploration, performance modelling will be a b...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineering professional with a passion for tackling complex SoC challenges. With 12+ years experience, you thrive in dynamic environments and excel at leading multidisciplinary teams through the intricacies of RTL design and signoff. You possess deep expertise ...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Manager/Sr Manager - CPU Architecture and Performance Modeling THE ROLE: As member of CPU Arc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advant...

Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Design for Testability (DFT) Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your day will involve overseeing the application development process, coordinating with team members, and ensuring project milestones are met. Roles & Responsibilities:Bachelors degree in computer science, Electronics Eng...

As Logic Lead, you will be responsible for design and development of Compression, Security, and sustainability features for high performance Processors chips. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature Guide and mentor junior engineers. Represent as Design Lead in various forums. Signoff the Pre-silicon Design that meets all the functional, area and timing goals Participate in silicon bring-up and validation of the hardware Estimate the overall effort to dev...

1. RTL development and Verification for Digital subsystems, Memory Subsystems including BIST. 2. DFT Insertion and Verification signoff for IO, ARM-PNR, Memory Digital Subsystems with Tessent/Embedded MBIST 3. MBIST, ATPG, RSQ Verification and sign-off. 4. Formal verification, Cross Clock Domain checks, Power/Timing sign off 5. Verify complex Digital subsystems through OVM, UVM methodology, creating the Verification Suit Independently. Skillset: 1. Hands on Experience with RTL, Synthesis, 2. Hands on experience in defining ICC/Synthesis constraints that meets timing closure needs 3. Familiarity with DFT flows includes MBIST, ATPG, RSQ and Verification methodologies and best practices for the...

What You''ll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for ...

We are looking for a skilled SAP CDC Business Analyst (Technical) with 4 to 6 years of experience. The position is based in [location to be specified]. Roles and Responsibility Collaborate with cross-functional teams to analyze business requirements and develop solutions using SAP CDC. Design, implement, and maintain technical documentation for SAP CDC projects. Provide technical support and training to end-users on SAP CDC applications. Develop and maintain reports, dashboards, and other visualizations using SAP CDC tools. Work closely with stakeholders to identify and prioritize project requirements. Ensure compliance with industry standards and best practices in SAP CDC implementation. Jo...

Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, weve united two industry leaders to create an optical networking powerhousecombining cutting-edge technology with proven leadership to redefine the future of connectivity. Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. Work as part of a world class ASIC design team, building leading edge chips for the Coherent Optics market. Hold a Bachelor or masters degree in electrical or computer engineering Have a minimum 2 ye...

Experience with low-power ASIC design techniques and clock domain crossing Knowledge of AMS verification methodologies Exposure to silicon bring-up and lab validation Familiarity with EDA tools from Synopsys, Cadence, or Mentor Bachelors or Masters degree in Electronics Engineering, Computer Engineering, or related field 8+ years of experience in ASIC digital design, with couple of years of technical leadership role Strong expertise in RTL design, CDC, synthesis, STA, LEC.. Proven experience in mixed-signal ASICs for deep sub-micron and understanding of analog-digital interfaces Familiarity with any scripting languages Excellent problem-solving, communication, and leadership skills Key Respo...

We are seeking highly motivated DFT Engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation and delivery of DFT patterns for IBM’s chip design team. As a member of DFT team, you will be required but not restricted to insertion, pattern generation, simulation, validation, characterization, delivery to TAE, IBM’s Hardware Bring-up and Silicon Debug. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Hands-on experience in DFT on complex designs involving scan insertion, compression, MBIST, ATPG, simulations and IP integration and validation. Proven expert...

* Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. * Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. * Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. * Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. * Develop verification test plan for both functional and pe...

We are seeking highly motivated individuals with a BS, MS, Btech or Mtech degree in Electronics engineering to be part of the EDA team. Join a great team of engineering professionals who are involved in development, validation & release of IBM CAD tools & methodologies used in designing IBM P & Z microprocessor systems along with system ASICS. In this role, you are expected to enable different flavours of the backend design( RTL-GDS ) flows and assess the quality of tools. Develop automation scripts to aid tool in data analysis/visualization. You are required to have excellent debugging skills and have good understanding of RTL-GDS implementation flow for 5nm and below technologies. We are s...

- Lead the architecture, design and development of Power Management for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor) . - Develop the features, present the proposed architecture in the High level design discussions to hardware and software teams - Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Estimate the overall effort to develop the feature - Estimate the silicon area required for the feature...

As a Senior Logic Design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performanc...

Role Overview: You will be a Senior Validation Engineer based in Telangana, India, responsible for developing and executing validation protocols for pharmaceutical manufacturing. Your daily tasks will involve ensuring compliance with Good Manufacturing Practices (GMP), coordinating with cross-functional teams, conducting process validation, equipment validation, and cleaning validation. Additionally, you will be troubleshooting and debugging validation issues to uphold production efficiency and quality. Key Responsibilities: - Develop and execute validation protocols for pharmaceutical manufacturing - Ensure compliance with Good Manufacturing Practices (GMP) - Coordinate with cross-functiona...

As an RTL Micro Architect at Eximietas Design, you will be a key contributor in defining and implementing cutting-edge semiconductor designs. Your responsibilities will include: - Define and develop microarchitecture specifications for complex SoC designs. - Lead RTL design and implementation using Verilog/SystemVerilog, ensuring optimal performance, power, and area (PPA). - Collaborate with cross-functional teams to ensure successful project execution. - Perform design trade-off analysis to meet functional, performance, and power requirements. - Develop design methodologies to improve efficiency and quality. - Mentor junior engineers to foster a culture of innovation and excellence. - Parti...

Role Overview: You will be responsible for leading the architecture, design, and verification of digital blocks for mixed-signal ASICs. Your role will involve collaborating closely with Analog and System teams, guiding RTL design, optimizing power, performance, and area, and contributing to IP reuse strategy and design methodology improvements. Additionally, you will provide technical leadership across cross-functional teams and support post-silicon validation. Key Responsibilities: - Lead the architecture, design, and verification of digital blocks for mixed-signal ASICs - Collaborate closely with Analog and System teams to define specifications and ensure seamless integration - Drive RTL d...