828 Rtl Coding Jobs - Page 9

Job Details: Altera is a global leader in programmable logic and semiconductor solutions. We design cutting-edge technologies that enable innovation across AI, networking, data centers, and embedded applications. Our team is passionate about pushing the boundaries of what s possible in silicon design. Become a member of our world-class S o C architecture and development team! Position Overview We are seeking a highly motivated passionate for safety, Functional Safety Architect to join our semiconductor architecture design team. In this role, you will own the device safety architecture and lead the efforts to achieve safety goals by developing technical safety concepts including safety mechan...

Roles and Responsibilities: 1. Handling request from vessel or TSI for Adding / amending /removal of PMS routines: Amendment request from vessel is sent to TSIs approval and as technical committee member same will be forwarded to PMS DB (by referring technical manuals, makers manual, makers circular). Activation of calendar-based work order while new job is added. For counter-based work order liaising with vessel and activating the same. on completion making sure amendments are reflecting in shore end as requested and intimating the same to vessel /TSI. 2. On signers briefing: For newly joining officers briefing on Shippalm v3 for all 5 modules provide on daily basis via MS teams and physica...

Compiler development for converting SNORT rule set to state table, Regex look up in conjunction with FPGA based acceleration and result processing C++/C based compiler design and development Strong communication skills to interact with the customer,

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you will be an integral part of the Circuit Technology team, focusing on DFT Methodology/Architect/RTL execution for high-speed SERDES Phys, Next-gen Memory Phys, and Die-to-Die interconnect IPs. Your responsibilities will include defining the DFX architecture for high-speed PHYs and die-to-die connectivity IP designs, RTL coding, supporting scan stitching, developing timing constraints, assisting with ATPG, and post-silicon bringup. Join a dynamic team that delivers cutting-edge IPs crucial for every SOC developed by AMD. Key Responsibilities: - Lead and define Design for Test/Debug/Yield Features specific to PHYs....

Responsibilities: * Design RTL code using Verilog/System Verilog. * Collaborate with microarchitects on design concepts. * Ensure timing closure and area optimization. * Develop RTL designs for complex systems.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: We are seeking a highly skilled and experienced Debug IP Design Engineer/Microarchitect to focus on the development of Debug IPs. The ideal candidate will have a strong background in IP design, verification, and delivery, with specific expertise in CoreSight IP design. Key Responsibilities: Debug IP Design: Focus on the design and development of CoreSight based Debug IPs, ensuring they meet the required specifications and performance standards. RTL Design: Utilize your experience in RTL design for complex SoC development using Verilog and/or SystemVerilog to create efficient and reliable IPs. Arm-Based Desi...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G, ushering in an age of rapid acceleration in connectivity and new possibilities. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform its potential into world-changing technologies and products. In the role of GPU Functional Verification Engineer , your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Strategize, brainstorm, and propose a DV environment, develop test ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

This job might be for you if You enjoy solving problems. You love taking on difficult challenges and finding creative solutions. You dont know the answer but will dig until you find it. You communicate clearly. You write well. You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference. You can impress our customers with your enthusiasm to solve their issues (and solve them!) Job Description Required Solid RTL coding experience including Microarchitecture of design System Verilog and Verilog coding using provided coding styles. Understanding of SDC Understanding STA reports and how to ...

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse...

General Summary: Excellent Design verification domain expertise. Develop test strategy, TB architecture and test plan for new IPs/new features Develop strategies for re-useable, scalable and enhance Sub system level verification environment Excellent C/System Verilog/Verilog skills to handle C based TB environment Strong skills in debug, post silicon debug-failure re-creation and root cause analysis Scripting proficiency - PERL, Python, for developing applicable automation AMBA, AXI bus protocols Power intent verification, GLS etc. Capable of communicating effectively with all stakeholders across the globe Capable of seeding a new team for new IPs, able to hire and expand the team in experti...

Work with system architects to understand the functional and performance requirements of a unit or feature. Define micro-architecture and develop RTL for owned unit and/or feature. Work with verification and physical design teams to ensure that the unit or feature is accurately verified and implemented. Own silicon bring-up in conjunction with post silicon validation and SW teams. Mentor junior engineers and guide them in their work. What we need to see: BS / MS or equivalent experience. 2+ years of experience. Proven knowledge in implementation of complex features or units. Expertise in micro architecture definition, RTL coding using Verilog or System Verilog. Expertise in using design and ...

General Summary: Senior/Lead ASIC Verification Engineers with an experience of minimum 5+ yrs Very strong experience with Verilog, System Verilog and UVM Working experience on development of Verification IP of layered protocol High Speed peripheral Interface protocol PCIe Gen4+ onwards, PCIe Experience is a must Strong knowledge on UVM RAL and common register interfaces such as APB, AHB, AXI (ARM), RAM. Working experience on scripting and automation Strong Past experience of developing verification plan from scratch and testbench development using the detailed Specification and TestPlan from the scratch Strong base knowledge on digital design, blocks/components Strong debugging skills and Go...

Job Details: Job Description: Altera is seeking highly skilled Senior/Lead FPGA Silicon Design Engineer to ensure the excellence of next-generation Ethernet/Transceiver/Crypto for top-tier FPGAs. This role offers opportunity to make a significant impact at a tech-driven company that provides leading programmable solutions, easily deployable in applications ranging from embedded, industrial, & cloud to edge, unlocking limitless possibilities Responsibilities: Develop Micro-architecture and Design implementation for Ethernet/Transceiver/Crypto IPs and subsystems. Work closely with the Architects to come up with an optimal design, RTL code development, involvement in pre-silicon and post-silico...

NOTE- Looking for more than 7+ yrs of experience only. Job Description for RTL We are hiring a SoC Integration Engineer with strong expertise in RTL coding and SoC integration flows. The ideal candidate should have hands-on experience with SpyGlass Lint, CDC, DC Synthesis, and VCLSP, along with scripting knowledge. Key Responsibilities: Integrate IP blocks into SoC at RTL level Perform RTL coding and micro-architecture design (Verilog/VHDL) Run and debug SpyGlass Lint, CDC, and DC Synthesis flows Conduct STA and design rule checks Develop automation scripts (Perl, Python, Shell, Tcl) Collaborate with verification and physical design teams Work on VCLSP and SoC-level integration flows Primary...

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Job Specs : Expertise in ASIC RTL Design Expertise in ASIC IP Design Expertise in CDC and Lint tools Expertise in design and simulation tools Expertise in Video processing algorithms / interfaces Expertise in CXL / PCIe Protocol, 5G, Datacenter Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Vietnam are the preferred work locations Preferred resources with valid regional work permit.

We are looking for a passionate and experienced EDA Methodology Engineer to join our ASICdesign team, focusing on Spyglass lint checking using Synopsys Spyglass for CDC/RDC. In this role, you’ll work closely with design teams and EDA vendors to develop and implement robust verification flows that ensure structural correctness across design stages Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSIDesign. 5–8 years of hands-on experience with Synopsys Spyglass. Strong understanding of RTL design languages: VHDL, Verilog, SystemVerilog. Expertis...

Role & Responsibilities : Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Professional and Technical Expertise : 3-8 years of experience in Design Verification - demonstra...

About The Role This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; About The Role - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in ...

Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering. Expertise in mixed signal IC verification / design experience Expertise in analog and mixed-signal circuit topologies Define verification plan based on product specifications and application use-cases Develop top-level AMS test benches using Cadence / System Verilog / UVM framework Simulate and validate verification plan use-cases Work with design team to debug and support issues Manage bug tracking Create automated regression flows Document and organize regression results Conduct AMS waveform review master the full AMS verification process. Expert level proficiency (Oral + Written) in Chinese langu...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group.As an FPGA Verification engineer, you will be responsible for designing verification plans, developing environment/testbench, creating test scenarios for running simulations, coverage analysis and lab support during board bring up to ensure first time right quality of Infinera product. Candidate should be capable of handling projects independently and have a strong will to drive for solutions. Must have 12-16 yearsof experience in developing System Verilog UVM based test environments, developing and imp...