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2.0 - 7.0 years

6 - 16 Lacs

bengaluru

Work from Office

Role & responsibilities Design and optimization of SRAMs, ROMs, CAMs, sense amps, bitcells, decoders, and more. Development of analog/mixed-signal IPs op-amps, comparators, LDOs, bandgaps, DAC/ADC circuits. Creation of custom digital standard cells optimized for PPA. Schematic design, simulation (across PVT), layout collaboration, and sign-off (DRC/LVS/ERC). Support automation flows using TCL, Perl, Python, Shell. Work cross-functionally with architecture, layout, and technology teams . Preferred candidate profile 5+ years in analog/mixed-signal and custom circuit design. Proven tape-out experience at advanced nodes. Strong in simulation, layout-aware design, and verification best practices....

Posted 1 month ago

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8.0 - 12.0 years

0 Lacs

karnataka

On-site

Role Overview: As a Lead Memory Design Engineer, you will be responsible for driving the architecture, design, and development of advanced memory IPs including SRAMs, ROMs, CAMs, and Register Files. Your role will involve leading a team of designers, collaborating with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes. Key Responsibilities: - Define architecture and design specifications for custom memory IPs. - Optimize circuits such as memory cell arrays, sense amplifiers, and decoders. - Lead schematic-level design and simulation. - Collaborate with layout and verification teams. - Guide post-layout activi...

Posted 2 months ago

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