85 Risc Jobs

Lead the architecture, design and development of a server class, high- performance Processor CPU for IBM Systems. - Architect and design Instruction caches, Branch Predictors, Issue queues, Register Renaming, Load Store Execution and other areas of the IBM processor CPU - Research novel instruction/data prefetching and branch prediction architectures. - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise .12 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) - Hands on experience of different Branch Prediction techniques - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Knowledge of at least one object oriented or functional programming language and scripting language. - Nice to haves - Knowledge of instruction decode and handling pipeline hazards - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Responsibilities: As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL ... Good understanding of HW / SW co design / accelerators to enhance system level performance. Collaborate with the Chip development, Unit Verification, Physical design, testgen, millcode teams to develop the feature. Pre-Silicon: Signoff the Design that meets all the functional, area and timing goals. Post Silicon: Validate the hardware functionality Required Professional and Technical Expertise: Minimum 8 20 + years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core. Experience with VLSI Design in VHDL / Verilog logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Requirements : Masters in VLSI with demonstrated experience in the micro archite As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Good understanding of HW / SW co design / accelerators to enhance system level performance. Collaborate with the Chip development, Unit Verification, Physical design, testgen, millcode teams to develop the feature. Pre-Silicon: Signoff the Design that meets all the functional, area and timing goals. Post Silicon: Validate the hardware functionality cture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Required technical and professional expertise Minimum 8 20 + years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core. Experience with VLSI Design in VHDL / Verilog logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Preferred technical and professional experience Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance.

3 years of experience as an embedded software developer, well-versed in Linux kernel development, firmware, and debugging with a strong grasp of low-level device driver programming. In this role, you will be tasked with developing software components for server operating systems. Your responsibilities will include implementing and porting kernel modules, working on system-level operating system components, and performing some application-level development for Linux-based operating system 3+ Linux kernel development Experience using Yocto. Porting of packages and integrating them into the yocto framework. Expert in Linux debug skills, especially in the core kernel software stability Experience of Linux kernel & embedded systems (Memory Mgmt, Threads/Processes, IPCs & Synchronization, Interrupts, Boot sequence) Exposure to Make, GNU toolchains. Experience with ARM and RISC-V chip architectures Linux Driver customization as per customer needs Assist the Applications team with customer support as needed Produce documentation that may be used inside and outside the company. Mandatory Key SkillsKernel,Linux Kernel,Debugging,Firmware,Kernel Development,Yocto,Gnu,Arm,Risc,Linux Driver,Porting,C++,Spi,I2C,Uart,Embedded C,Embedded Systems,Rtos,Microcontroller,Device Drivers,Rs232,Gdb,Device Driver Development,Usb,Tcp,Data Structures,Linux*

Role Overview: You will be joining Persistent as a Sr. Practitioner for IT Infrastructure with expertise in creating solutions, offerings, and leading a practice with Data Center and Network technology. This full-time role is based at all PSL locations and requires 15-20 years of experience in the field. Key Responsibilities: - Develop offerings, solutions, and interact with Analysts and Industry advisors - Create technology solutions related to migration, managed services, modernization, and tech debt elimination - Demonstrate strong ability in solving RFP requirements and providing proactive proposals and responses to customer problem statements - Collaborate with Technology Partners to develop joint GTM offerings - Possess strong interpersonal skills to engage across customer hierarchy, from Technology architects to CXOs - Exhibit excellent presentation skills, content creation, and willingness to travel (~50%) - Bring expertise in a wide variety of computer solutions including x86, RISC, Windows, Linux, Unix operating systems - Demonstrate a strong understanding of Storage technologies, Middleware, DB (MSSQL, Oracle DB, Postgres SQL), Webservers, and App Servers - Showcase strong capabilities in one or multiple Cloud providers and LAN/WAN technologies including SDWAN Qualifications Required: - 15-20 years of experience in creating solutions, offerings, and leading practice with Data Center and Network technology - Proficiency in various computer solutions and operating systems - Strong understanding of Storage technologies, Middleware, and Databases - Knowledge of Cloud providers and LAN/WAN technologies Additional Company Details: Persistent Ltd. is dedicated to fostering diversity and inclusion in the workplace. They offer hybrid work options, flexible working hours, and accessible facilities for employees with disabilities. The company provides a culture focused on talent development, competitive salary and benefits package, opportunities to work with cutting-edge technologies, and various employee engagement initiatives. If you are looking to accelerate your growth professionally and personally, impact the world positively, and collaborate with industry experts in a value-driven and people-centric work environment, Persistent could be the ideal place for you to unleash your full potential.,

Description: BE/BTech/ME/MTech in Computer Science or Electronics or Electrical • Masters/ Bachelors in EE/EC/CS experience in IP/SoC/ASIC Verification. Experience in writing tests for Programmable Architectures like GPU/RISC/CPU or DSP. Experience in profiling. Experience and C++ and scripting languages. Understanding of GPU/AI/ML Processor architecture

Title: GPU Developers/ GPU validation Engineer/ Leads Location: Hyderabad or Bangalore Description: C++ programming Experience in GPU Architectures, GPU Pipelines, GPU game processing, GPU rendering image processing Experience in OpenCL, Open GL, Vulkan and profiling GFX testing, Sanity/Stability/regression and performance testing

Job Area :Engineering Group, Engineering Group > Software Engineering General Summary: Overview Qualcomm's software CPU (aka application processor) architecture group develops long-term software roadmaps (for a horizon of three to five years). It is responsible for defining architecture specifications, developing prototypes, and engaging with the software and hardware worldwide partners to influence products development. It is also acting as an operational execution team enabling commercialization of the most up-to-date worldwide CPUs integrated in Snapdragons chipsets for markets such as: Handsets, IOT devices, Automotive, Compute/Laptops, XR, etc. The team is currently looking for an experienced CPU software architect who can contribute to architecting of HW/ SW interface and design and development of low level firmware for CPU bootstrapping, power controller etc. He or she, will specifically be engaged in the following domains: a) Micro-code optimization b) Design and development of firmware of idle and active CPU power management c) CPU software/hardware design trade-offs d) Debugging of critical SW issues that are artifacts of any high-performance CPU microarchitecture (prefetching, speculation, memory ordering etc...) e) Definition of short and long-term SW architecture roadmap in accordance with Arms architecture ISA evolution f) Represent the CPU SW teams in engagements with Arm architects and third-party software partners (e.g., Google, MSFT, etc.) Since the contributions of the CPU software organization affect a large span of products, the function provides an uncommon exposure to multiple technology domains related to system-on-chip development. To fully benefit from the roles opportunities, the candidate must demonstrate a motivation to influence the products roadmap, as he or she, will directly contribute to Qualcomms most innovative products. Skills/Experience: a) 13+ years of experience in designing and developing low-level software/firmware usingC, C++, and ARM assemblyfor high-performance, resource-constrained embedded systems. b) Expert, hands-on knowledge of onARM v8/v9-A series CPU architectures. Deep knowledge of theRISC-V ISA is a significant advantage. c)Proven expertise in ARM system specifications, including hands-on implementation or extensive customization ofPSCI (Power State Coordination Interface), SCMI (System Control & Management Interface), and ARM Trusted Firmware-A (TF-A),. d) Deep understanding ofSystem on Chip (SoC) architecture, including hardware coherency (CPU-to-CPU and I/O coherency), cache management, and the intricacies ofMemory Management Units (MMU)andTranslation Lookaside Buffers (TLB). e) Extensive experience with systempower management architectures:Low Power Modes (LPM) and CPU idle/active state management. f)Mastery of the C programming languagefor writing robust, efficient, and portable firmware and system-level code. g) In-depth knowledge ofboot architecture and secure boot sequences, including hands-on experience withUEFI, ACPI specification and bootloaders. h)Proven expertise in system software fundamentals:OS kernel internals,task scheduling, atomics, synchronization primitives, and memory management. i) Expertise in embedded systems SW design, including real-time operating systems (RTOS).Proven experience with the Zephyr RTOSfor prototyping, driver development, and power management is highly desirable. j) Familiarity with the internals of OS kernels (Linux or Windows) and their interaction with CPU and SoC features. Experience in device driver development is an added advantage. k) Effective problem-solving and analytical skills, with a proven ability to debug complex, system-level issues. l) Critical thinking skills, with the ability to make architectural trade-offs and define long-term software roadmaps. m) Excellent verbal and written communication skills, with experience engaging internally and with external partners (e.g., Arm, SiFive, Google, Microsoft). Minimum Qualifications: Bachelors degree in engineering, Information Systems, Computer Science, or related field and 10+ years of Software Engineering or related work experience. OR Masters degree in engineering, Information Systems, Computer Science, or related field and 9+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 9+ years of Software Engineering or related work experience. 8+ years of work experience with Programming Language such as C, C++, ARM/ RISC-V ASM, Python, etc. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. 3+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

General Summary: Qualcomm's software CPU (aka application processor) architecture group develops long-term software roadmaps (for a horizon of three to five years). It is responsible for defining architecture specifications, developing prototypes, and engaging with the software and hardware worldwide partners to influence products development. It is also acting as an operational execution team enabling commercialization of the most up-to-date worldwide CPUs integrated in Snapdragons chipsets for markets such as: Handsets, IOT devices, Automotive, Compute/Laptops, XR, etc. The team is currently looking for an experienced CPU software architect who can contribute to architecting of HW/ SW interface and design and development of low level firmware for CPU bootstrapping, power controller etc. He or she, will specifically be engaged in the following domains: a) Micro-code optimization b) Design and development of firmware of idle and active CPU power management c) CPU software/hardware design trade-offs d) Debugging of critical SW issues that are artifacts of any high-performance CPU microarchitecture (prefetching, speculation, memory ordering etc...) e) Definition of short and long-term SW architecture roadmap in accordance with Arms architecture ISA evolution f) Represent the CPU SW teams in engagements with Arm architects and third-party software partners (e.g., Google, MSFT, etc.) Since the contributions of the CPU software organization affect a large span of products, the function provides an uncommon exposure to multiple technology domains related to system-on-chip development. To fully benefit from the roles opportunities, the candidate must demonstrate a motivation to influence the products roadmap, as he or she, will directly contribute to Qualcomms most innovative products. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. ORMaster's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. ORPhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. a) Around 4 years of experience in designing and developing software/ firmware for various embedded systems b) Knowledge of Arm CPU architecture ... especially ARMv8 architecture (RISC-V architecture expertise is a plus) c) Knowledge of various system specifications in ARM ecosystem (SCMI, PSCI, TF-A etc) d) Solid knowledge of embedded systems SW design e) Familiarity with the internals at kernel level of either Linux or Windows. Experience in device driver development is an added advantage f) Effective problem-solving analytical skills (e.g., data mining, KPI interpretation, R&D, etc.) g) Critical thinking skills h) Excellent verbal and written communications skills

General Summary: Job Description: The compiler team at Qualcomm Innovation Center is seeking talented compiler engineers to optimize LLVM for Qualcomms proprietary processors. As a member of the compiler team, you will: Research, design, and implement different compiler optimizations to improve runtime and memory characteristics of software applications Analyze software requirements, consult with architecture and HW engineers, and devise compiler solutions for Qualcomms next generation architectures Analyze and identify system level integration issues, interface with the software development, integration and test teams. Position: Engineer Location: Hyderabad Education: B.Tech/M.Tech/PhD in Computer Science Engineering Minimum Qualifications: 4+ years of academic or industrial experience in the following areas is required: Compiler development/Strong desire to work in this domain C/C++ programming Preferred Qualifications: Development experience with LLVM framework Knowledge of ARM/AArch64, RISC-V ISA Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. ORMaster's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. ORPhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc.

General Summary: 2026 Campus Hire_ Engineer_ HW Qualcomm is looking for an energetic, creative and self-driven engineer to work in Modem , Multimedia , Connectivity , Computer Vision and Image Processing , software implementation and hardware acceleration. The work will directly influence the various subsystems within the SoC. The ideal candidate would have very strong problem solving and analytical skills combined with creativity and a passion for innovation. They would be able to carry forward that new idea, concept, and/or application that will propel systems to new levels of effectiveness and efficiency. At Qualcomm you will perform detailed technical analysis, translate ideas into models, SW and/or HW and work closely with other teams to help deliver real products. At Qualcomm, the sky's the limit. College Graduates play important roles everywhere in the company. Many of our 27,000+ employees join us right out of school because we're working on the cutting edge in wireless. Complex wireless devices are only as powerful as the software that runs them. As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries from automotive to health care, from smart cities to robotics we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Educational Background:Masters, Bachelors: Electrical Engineering , VLSI , Embedded and VLSI , ECE Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skills.

General Summary: As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries from automotive to health care, from smart cities to robotics we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field.

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) - Hands on experience of different Branch Prediction techniques - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Knowledge of at least one object oriented or functional programming language and scripting language. - Nice to haves - Knowledge of instruction decode and handling pipeline hazards - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Lead the architecture, design and development of a server class, high- performance Processor CPU for IBM Systems. - Architect and design Instruction caches, Branch Predictors, Issue queues, Register Renaming, Load Store Execution and other areas of the IBM processor CPU - Research novel instruction/data prefetching and branch prediction architectures. - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Lead the architecture, design and development of Processor Core Load- Store Execution unit for high-performance IBM Systems. - Architect and design Load and Store pipelines, D-Cache, Address Translation, Out of Order Execution of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise 12 or more years of demonstrated experience in architecting and designing Load-Store Execution unit of CPU - Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and Arithmetic units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred Education

Lead the architecture, design and development of Processor Core Vector- Scalar Execution unit for high-performance IBM Systems. - Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise 12 or more years of demonstrated experience in architecting and designing Execution unit of CPU - Hands on experience of implementing Arithmetic/Crypto/SIMD functions - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and load/store units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

General Summary: Qualcomm's software CPU (aka application processor) architecture group develops long-term software roadmaps (for a horizon of three to five years). It is responsible for defining architecture specifications, developing prototypes, and engaging with the software and hardware worldwide partners to influence products development. It is also acting as an operational execution team enabling commercialization of the most up-to-date worldwide CPUs integrated in Snapdragons chipsets for markets such as: Handsets, IOT devices, Automotive, Compute/Laptops, XR, etc. The team is currently looking for an experienced CPU software architect who can contribute to architecting of HW/ SW interface and design and development of low level firmware for CPU bootstrapping, power controller etc. He or she, will specifically be engaged in the following domains: a) Micro-code optimization b) Design and development of firmware of idle and active CPU power management c) CPU software/hardware design trade-offs d) Debugging of critical SW issues that are artifacts of any high-performance CPU microarchitecture (prefetching, speculation, memory ordering etc...) e) Definition of short and long-term SW architecture roadmap in accordance with Arms architecture ISA evolution f) Represent the CPU SW teams in engagements with Arm architects and third-party software partners (e.g., Google, MSFT, etc.) Since the contributions of the CPU software organization affect a large span of products, the function provides an uncommon exposure to multiple technology domains related to system-on-chip development. To fully benefit from the roles opportunities, the candidate must demonstrate a motivation to influence the products roadmap, as he or she, will directly contribute to Qualcomms most innovative products. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. ORMaster's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. ORPhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. a) Around 4 years of experience in designing and developing software/ firmware for various embedded systems b) Knowledge of Arm CPU architecture ... especially ARMv8 architecture (RISC-V architecture expertise is a plus) c) Knowledge of various system specifications in ARM ecosystem (SCMI, PSCI, TF-A etc) d) Solid knowledge of embedded systems SW design e) Familiarity with the internals at kernel level of either Linux or Windows. Experience in device driver development is an added advantage f) Effective problem-solving analytical skills (e.g., data mining, KPI interpretation, R&D, etc.) g) Critical thinking skills h) Excellent verbal and written communications skills

- Lead the architecture, design and development of Processor Core Vector- Scalar Execution unit for high-performance IBM Systems. - Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise - 8 or more years of demonstrated experience in architecting and designing Execution unit of CPU - Hands on experience of implementing Arithmetic/Crypto/SIMD functions - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and load/store units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Master's Degree/PhD

Are you looking for a unique opportunity to be a part of something great Want to join a 20,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and a strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it has won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! The successful candidate will work with SOC/FPGA products of Microchip Technology and contribute towards Validation of Programming, Security, and Debug features of the FPGA. This role of Validation Engineer will involve deep analytical reasoning to understand, analyze, and identify root causes of the system-level failures that occur during Validation. Create System and FPGA designs to exercise all the use models targeted for each product mimicking end applications in a customer setting. Write system and product-level validation plans for new and existing silicon products and projects; execute per plan, record and communicate results. FPGA prototyping and emulation. Understanding spec, writing emulation plan, and executing per plan. Record and communicate results. Understand hardware architectures, use models, and system-level design implementations required to utilize the silicon features. Be an effective contributor in a cross-functional team-oriented environment. Write high-quality code in Verilog, VHDL, and C code for embedded processors. Maintain existing code. Learn new system designs and validation methodologies. Understand FPGA architecture. Use on-chip debug tools. Requirements/Qualifications: - Excellent verbal and written communication skills in English - Design with RTL coding in Verilog and VHDL and Verification of RTL - Possess an in-depth understanding of hardware architectures, system-level IC design implementation, knowledge of how to create end-use scenarios - Optimizing code for FPGA architectures - Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools - Basic knowledge of embedded processors such as ARM Cortex-M3 or RISC and familiarity with AMBA protocols APB, AHB, AXI, ACE - Working knowledge of embedded software C/C++ is also a plus - Strong technical background in FPGA prototype emulation and debug - Strong technical background in silicon validation, failure analysis, and debug - Excellent Board level debug capabilities in a lab environment: hands-on troubleshooting skills for digital logic and analog circuit on PCBs using oscilloscopes, digital analyzers, protocol exercisers and analyzers, integrated logic analyzers (e.g. Synopsys Identify, Xilinx Chipscope, Altera Signalscope, Lattice Reveal - Expert in validation of NIST complaint security algorithms, protection, authentication on post Si - Good knowledge of embedded processors and peripherals such as SPI, I2C, UART, and USB - Strong commitment to quality and customer satisfaction - Experience managing the work assignments for a group of junior and senior engineers - 12+ yrs of relevant work experience Travel Time: 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.,

Candidate should have experience in Software development, tools development role, firmware development role or validation tools development.Candidate shall design and develop algorithms for Post Silicon Validation of next generation IBM server processors, SOCs and ASICs. He/She will be working on processor Bringup Activities and own key debugs during the bring up/power on phase. The candidate will be expected to interface with multiple stakeholders in hardware design teams, lab teams, performance teams and characterization teams. Candidate must work on coverage closure by developing comprehensive test plans and strategies and drive to achieve coverage goals while interacting with stakeholders, verif teams and design teams. He/She must be skilled in utilizing object-oriented programming skills in C/C++ and scripting languages like Python/Perl to write complex test scenarios to automate/optimize. Candidate must possess experience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Proficiency in emulator env/FPGA validation is preferred. She/he must possess excellent communication skills and understand agile processes. The candidate must have an eagerness and curiosity to learn and be willing to code and participate hands on. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Technical ExpertiseVery proficient in C programming, Strong Scripting skills. Over 10 years experience in hands on Software development using C, C++. Computer Architecture KnowledgeIn-depth knowledge of computer architecture, including processor core design specifications, instruction set architecture, and logic verification. Multi-Processor Cache CoherencyExperience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Operating Systems and ConceptsAtleast 2 years experience with Multithreading, context switching, memory management related development Preferred technical and professional experience IO device drivers, firmware exposure(NIC controller, PCIe device controllers, ASIC FW development experience) ARM architecture RISC V architecture Spike simulator experience, QEMU simulator

Experience as an embedded software developer where you are comfortable with firmware and debugging experience who understands the low-level, device driver layer. Strong in debugging skills, especially in the core kernel, Kernel crash (oops), system software & device driver domain with experience on GDB, JTAG/T32. He/She will be responsible for the development of host software components for Embedded operating systems. Duties will include implementing kernel mode device drivers, other low-level operating system components, and some application-level development for embedded Linux. This job includes the development of new device drivers for future products as well as support of existing device drivers for deployed products. The applicant should be familiar with working in a development environment using revision control, issue tracking, and automated testing. Design and develop device drivers, middleware, and board support packages (BSP) in various embedded OS environments Experience in Linux kernel and Heavy Device Driver Experience Expert in embedded C programming debug skills, especially in the core kernel software stability & device driver domain with experience on GDB, JTAG/T32 Experience with Linux kernel & embedded systems (Memory Mgmt, Threads/Processes, IPCs & Synchronization, Interrupts, Boot sequence, etc) Exposure to Make, GNU/GCC, and toolchains Experience in related display drivers like HDMI, Display Port, HDCP, Ethernet, PCI Express, USB, etc Experience in chip ARM, RISC-V Driver customization per customer needs Assist the Applications team with customer support as needed Produce documentation that may be used inside and outside the company. Skills : - debugging, core kernel, Kernel crash (oops), system software , GDB, JTAG/T32, revision control, issue tracking, and automated testing, Linux kernel, Heavy Device Driver, embedded C programming , Make, GNU/GCC, and toolchains, HDMI, Display Port, HDCP, Ethernet, PCI Express, USB, chip ARM, RISC-V, debugging, core kernel, Kernel crash (oops), system software , GDB, JTAG/T32, revision control, issue tracking, and automated testing, Linux kernel, Heavy Device Driver, embedded C programming , Make, GNU/GCC, and toolchains, HDMI, Display Port, HDCP, Ethernet, PCI Express, USB, chip ARM, RISC-V Mandatory Key Skills embedded c,embedded software development,embedded linux,customer support,arm, firmware, device drivers,jtag,usb,HDMI*,Display Port*,HDCP*,Ethernet*,PCI Express* Keywords embedded software development,embedded linux,customer support,Ethernet,embedded c*Mandatory Key Skills embedded software development,embedded linux,customer support,Ethernet,embedded c*

Roles 1Embedded Exp on various cores like ARM,AVR,PIC with 3rd party libraries &API's using c/c++. 2Flutter Designing android app onTV&mobile,workon bug fixing&AndroidSDK in Flutter,kotlin& java 3 c&c++ developer Design build & maintain C/C++ code Required Candidate profile Candidate belongs to Meerut working outstation or open to relocate,NeedJr&Sr Developers with related Exp'ce Embedded(lifecycle),flutter(Android devel't),C+C++programming with trends&EmergingTechnolg's

3 years of experience as an embedded software developer, well-versed in Linux kernel development, firmware, and debugging with a strong grasp of low-level device driver programming. In this role, you will be tasked with developing software components for server operating systems. Your responsibilities will include implementing and porting kernel modules, working on system-level operating system components, and performing some application-level development for Linux-based operating system 3+ Linux kernel development Experience using Yocto. Porting of packages and integrating them into the yocto framework. Expert in Linux debug skills, especially in the core kernel software stability Experience of Linux kernel & embedded systems (Memory Mgmt, Threads/Processes, IPCs & Synchronization, Interrupts, Boot sequence) Exposure to Make, GNU toolchains. Experience with ARM and RISC-V chip architectures Linux Driver customization as per customer needs Assist the Applications team with customer support as needed Produce documentation that may be used inside and outside the company.

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.