ASIC/RTL Design Engineer - SoC CAPRUS IT PRIVATE LIMITED

5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

You should have experience in Logic design and RTL coding, as well as SoC design and integration for complex SoCs. Proficiency in Verilog/System-Verilog and Multi Clock designs including Asynchronous interfaces is essential. Familiarity with ASIC development tools such as Lint and CDC is required. Knowledge of Synthesis and understanding of timing concepts is a plus. Experience with ECO fixes, formal verification, and AMBA protocols like AXI, AHB, and APB, along with SoC clocking/reset architecture is necessary. Strong communication skills, proactive attitude, creativity, curiosity, motivation to learn, and good collaboration skills are expected. Your responsibilities will include understand...

Posted 2 months ago

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Technical Lead People Tech

8.0 - 12.0 years

20 - 35 Lacs

Hyderabad

Work from Office

Job Title: SoC Infrastructure Development Lead (Dev-Lead) Experience: 8+ years Location: Hyderabad Notice Period: Immediate to 15 Days Role Overview We are looking for a highly experienced and technically strong SoC Infrastructure Development Lead to drive design, integration, and verification of infrastructure IPs that form the backbone of our complex SoC platforms. This role requires deep domain knowledge of infrastructure components such as interconnects, clocks, resets, power domains, debug fabric, and system control blocks, and the ability to coordinate across silicon, firmware, verification, and physical design teams. Key Responsibilities SoC Infrastructure Planning and Development Cro...

Posted 3 months ago

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