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5.0 - 12.0 years
0 Lacs
karnataka
On-site
The ideal candidate for this role should hold a BE/B.Tech/ME/M.Tech degree in EEE/ECE/CSE with 5-12 years of relevant industry experience. You should have a strong background in verification methodology and be proficient in architecting and developing testbench components for ISA features, clock/reset/power features of processors. Your expertise should include a deep understanding of assembly and CPU architecture, particularly in x86/ARM/RISC-V. Proficiency in programming languages such as C, C++, Verilog, and scripting languages like Perl and Python is essential. You should be able to work independently and collaborate effectively across different geographies. Main responsibilities of this role include working closely with CPU architects to comprehend processor micro-architecture, developing detailed test and coverage plans for ISA and micro-architecture features, designing and implementing component, block, and core level testbenches, and building architectural tools for ISA level verification. You will be expected to create stimulus generators that can be utilized across various domains ranging from pre-silicon to emulation and post-silicon. Additionally, you will execute verification plans, conduct DV environment bring-up, enable regression for all features under your responsibility, and troubleshoot test failures. Tracking and reporting DV progress using metrics like bugs and coverage will also be a key part of your role. Preferred qualifications for this position include in-depth knowledge of processor verification function and architecture, particularly in areas like cache coherence, memory ordering and consistency, prefetching, branch prediction, renaming, speculative execution, and memory translation. Experience in Random Instruction Sequencing (RIS) and testing at block/unit and chip levels is highly valued. Leading a team of verification engineers in CPU verification, proficiency in advanced techniques like formal, assertions, and silicon bring up, and experience in writing test plans, portable benches, transactors, and assembly are also preferred. Familiarity with various verification methodologies and tools such as simulators, coverage collection, and gate-level simulation is advantageous. The ability to independently develop test benches for a block/unit of the design is a desired skill for this role.,
Posted 2 weeks ago
3.0 - 7.0 years
0 Lacs
karnataka
On-site
As a CPU Core Validation Engineer, you will be an integral part of the CPU Validation team within the CPU organization, focused on validating CPU core pipeline architecture and microarchitecture features. Your responsibilities will include developing a detailed test plan that takes into consideration the IP architecture and microarchitecture features. You will collaborate closely with CPU design and verification teams to create CPU bring-up and functional validation test plans for the IP you are responsible for. Additionally, you will design validation methodology and test content to be utilized on emulators during the pre-silicon phase as well as on actual silicon. Working with SOC bring-up and software teams, you will strategize CPU core feature bring-up and conduct end-to-end validation. In case of failures on silicon, you will be responsible for triaging and debugging issues. Furthermore, you will develop test content and testing strategies to support CPU validation on silicon and collaborate with CPU verification teams to replicate silicon failures on emulators and FPGAs. You will also engage with the design team to propose and design new debug features to enhance future CPU bring-ups. The minimum requirements for this role include a BA/BS degree in Computer Science or Electrical Engineering with at least 5 years of experience. You should have a minimum of 3 years of experience in Silicon Validation and bring-up. Proficiency in implementing assembly and C/C++ language embedded firmware is essential, along with familiarity with software toolchains such as assemblers, C compilers, Makefiles, and source code control tools. Preferred qualifications for this position include a strong understanding of microprocessor architecture, particularly in areas like Cache Coherence, Memory Ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative Execution, and Address Translation/Memory Management. Knowledge of Random Instruction Sequencing (RIS) and testing at both the Block/Unit-level and Subsystem/Chip-level is beneficial. Experience in creating test plans and writing Assembly code is desirable, as well as the ability to independently develop and work on a block/unit of the design.,
Posted 1 month ago
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