SOC Emulation Engineer 7Rays Semiconductors India Private Limited

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You will be joining 7Rays Semiconductors, a company that specializes in providing end-to-end VLSI design solutions to help clients achieve execution excellence. The team of experts at 7Rays Semiconductors focuses on architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using cutting-edge technologies and methodologies. Building effective partnerships with clients, the company delivers high-quality solutions tailored to meet specific needs, showcasing a commitment to excellence and innovation in semiconductor design. Located in Bangalore, KA, this opportunity requires a minimum of 5 years of experience in the Emulation domain. As an Emulation Engineer/Validation Engineer, your responsibilities will include building emulation models from RTL for IP/SS or SOC, bringing up emulation models, developing content, and collaborating with RTL designers and Verification engineers to resolve emulation build issues. You will also work closely with customers to address emulation challenges and partner with vendors to resolve emulation build issues. Ideal candidates should hold a B.Tech/M.Tech in Electronics/VLSI or equivalent and be familiar with SV/UVM methodology. Candidates should have hands-on experience with Emulators such as Palladium, Veloce, Zebu, etc., and demonstrate proficiency in porting ASIC RTL on the Emulators and generating Emulation builds. Additionally, expertise in domains/functions including AXI, APB, AHB, SPI, I2C, UART, PCIe, USB, Ethernet, CXL, Ucie, C2C, D2D, DDR4/5/6, LPDDR3/4/5/6, and NoC/Interconnect verification is required. Desired activities that candidates should be involved in are HW-SW co-verification, Boot, Reset, Clock verification, Low Power Verification, Regression management and debug, as well as the development of Scoreboard, Checkers, and tracker. Proficiency in scripting languages like PERL and PYTHON is also beneficial for this role.,

Posted 1 week ago

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ASIC/RTL Design Engineer - SoC CAPRUS IT PRIVATE LIMITED

5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

You should have experience in Logic design and RTL coding, as well as SoC design and integration for complex SoCs. Proficiency in Verilog/System-Verilog and Multi Clock designs including Asynchronous interfaces is essential. Familiarity with ASIC development tools such as Lint and CDC is required. Knowledge of Synthesis and understanding of timing concepts is a plus. Experience with ECO fixes, formal verification, and AMBA protocols like AXI, AHB, and APB, along with SoC clocking/reset architecture is necessary. Strong communication skills, proactive attitude, creativity, curiosity, motivation to learn, and good collaboration skills are expected. Your responsibilities will include understanding standards and specifications, developing architecture, documenting implementation details, hands-on work throughout the verification cycle, ensuring compliance with the latest methodologies, developing Verification IPs, defining Functional Coverage matrix and Comprehensive Test plan, managing regression and functional coverage closure, integrating and verifying DUT for IP delivery sign-off, leading a small team, and demonstrating hands-on experience in the complete verification cycle with strong verification concepts. You should have a strong knowledge of Verilog, SystemVerilog, and UVM, experience in UVM-based Verification IP development, familiarity with AMBA AXI/AHB/APB System buses, hands-on experience with PCIe/Eth/USB/DDR, expertise in System Verilog Assertions, scripting for automation, release processes, simulations, and regressions, and excellent written and oral communication skills. Leading the Verification IP development with junior engineers, exposure to the full verification cycle, and being a DV Engineer, Design Verification, or Verification Engineer are desirable skills and experiences.,

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