4.0 - 8.0 years

0 Lacs

karnataka

On-site

As a Static Timing Analysis (STA) Engineer at the company in Singapore, you will play a crucial role in the SoC design team, focusing on timing signoff and analysis of cutting-edge IPs and chips in advanced process nodes. Your expertise in using Synopsys NanoTime or similar tools will be essential for the success of the projects. Key Responsibilities: - Perform full-chip and block-level Static Timing Analysis using NanoTime - Collaborate with physical design and RTL teams to ensure timing closure - Apply timing constraints and execute timing ECOs as necessary - Run timing analysis across various PVT corners and modes - Provide support for design sign-off activities such as STA, SI, cross-tal...

Posted 3 days ago

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Strategic / Leadership Role Advanced Micro Devices, Inc

20.0 - 24.0 years

0 Lacs

hyderabad, telangana

On-site

Role Overview: You will be working as a Fellow Silicon Design Engineer at AMD to develop world-class Server products. Your main responsibility will be to define and drive PPA uplift methodologies, develop power optimization methodology for Physical Design Implementation, define PVT corners and frequency targets for next-generation Servers, and have a deep knowledge of micro-architecture, power optimization methodologies, and timing closure. You are expected to have very strong problem-solving skills, broad experience in methodology, and a self-motivated work ethic to provide a cohesive technical vision for PPA improvement methodology. Key Responsibilities: - Define and drive PPA uplift metho...

Posted 2 weeks ago

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