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3.0 - 8.0 years
0 Lacs
noida, uttar pradesh
On-site
As a Static Timing Analysis (STA) Engineer with 3-8 years of experience in Noida, your role will involve the following key responsibilities: - Generate, enable, and analyze block-level timing constraints across Functional and DFT modes. - Understand clocking and data flow within the design, and effectively communicate with Design (FE) and DFT teams for enhanced comprehension. - Review timing checks and Constraints Quality of Results (QoR) checks, and have a strong grasp of Constraints Validation. - Collaborate with Implementation team counterparts to achieve block timing closure. - Understand Clock Tree Synthesis (CTS) building and participate in Clock Tree specification review and closure. ...
Posted 5 days ago
3.0 - 8.0 years
0 Lacs
noida, all india
On-site
As a Static Timing Analysis (STA) Engineer with 3-8 years of experience, you will be based in Noida and expected to have expertise in PrimeTime & PT-ECO tools. Your responsibilities will include: - Generating, enabling, and analyzing block-level timing constraints across Functional & DFT modes - Understanding clocking & data flow and effectively communicating with Design (FE) & DFT teams - Reviewing timing checks, Constraints QoR checks, and validating constraints - Collaborating with Implementation team for block timing closure - Understanding CTS building and reviewing/closing Clock Tree spec - Handling Timing ECOs and ensuring final timing closure at the block level - Proficiency in scrip...
Posted 5 days ago
3.0 - 8.0 years
5 - 10 Lacs
noida
Work from Office
block-level timing constraints ,functional and DFT modes,STA analysis and closure ,PrimeTime,PT-ECO ,QoR,constraints validation,Front-End Design,DFT teams,Clock Tree Synthesis,Timing ECOs,TCL, Unix shell scripting Contact-gagan@bestnanotech.in
Posted 1 week ago
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