818 Protocols Jobs - Page 4

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: We are seeking a highly experienced Network-on-Chip (NoC) Architecture and Systems Engineer to join our innovative and dynamic NoC systems team. The ideal candidate will have a deep understanding of NoC architectures, system design, and various communication protocols such as PCIe, CXL, and AMBA CHI. This role involves designing, implementing, and optimizing NoC solutions for complex SoC (System on Chip) designs, collaborating with cross-functional teams, and driving research and development initiatives to stay at the forefront of technology. Key Responsibilities: Architecture Design: Develop and optimize NoC architectures for high-performance SoC designs, including routers, interconnects, and communication protocols. Protocol Expertise: Design and implement NoC solutions that support various communication protocols such as PCIe, CXL, and AMBA CHI. System understanding: Understanding of NoC solutions for overall SoC design, ensuring seamless communication between various IP blocks and subsystems. Performance Analysis: Conduct detailed performance analysis and benchmarking of NoC designs to identify bottlenecks and areas for improvement. Collaboration: Work closely with hardware, software, and verification engineers to ensure that NoC designs meet system requirements and performance goals. Troubleshooting: Identify and resolve complex issues in NoC design and simulation. Research and Development: Stay updated with the latest advancements in NoC technology and contribute to the development of new methodologies and tools. Actively participate in research projects to explore new NoC architectures and protocols. Primary Skills Proficient in NoC design and optimization techniques. Strong understanding of digital design principles and SoC architecture. Experience with hardware description languages (HDLs) such as Verilog. Familiarity with SystemC and C++ for modeling and simulation is a plus. Knowledge of NoC simulation tools and environments is a plus (e.g., Gem5, Noxim). Experience with performance analysis and benchmarking tools. Expertise in various communication protocols such as PCIe, CXL, and AMBA CHI is a plus. Soft Skills Excellent problem-solving and analytical skills. Strong communication and collaboration abilities. Ability to work independently and in a team environment. Attention to detail and a commitment to quality. Enthusiasm for research and innovation. Preferred Skills: Experience with Network-on-Chip, high-performance computing and parallel processing. Knowledge of ASIC design flows. Familiarity with scripting languages (e.g., Python, Perl). Experience with version control systems (e.g., Git). Background in NoC design, NoC Architecture, low-power design and optimization. Publication history in relevant technical journals or conferences. Qualifications: Education: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. Experience: 6 to 11 years of experience in NoC architecture and systems design. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a DV Engineer with a focus on SOC design verification, you will work to understand the internal requirements and complexities of our highly complex auto, compute, mobile, XR-VR, IoT SOCs and architect the required verification strategy. You will help set up methodologies, develop test plans, and verify that the design meets the highest quality standards. We believe in early involvement of DV, so you will also participate in architecture/product definition through early involvement in the product life-cycle. Preferred qualifications B.E/B.Tech/M.E/M.Tech in Electronics with 5+ year experience in verification domain. Strong fundamentals in digital ASIC verification Experience in IP/SS/SoC level verification of medium to high complexity design Familiarity with system level HW and SW Debug techniques and Verification requirements A good understanding of the complete verification life cycle (test plan, testbench through coverage closure) Strong System Verilog/UVM based verification skills & Experience with Assertion & coverage-based verification methodology Experience w/ PSS or higher-level test construction languages is an added advantage Working knowledge of Interconnect architecture and Bus protocols like AMBA - ACE/CHI/AXI Good understanding of low power design techniques Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells and state retention cells. Experience with UPF/CPF based power aware verification. Working knowledge of GLS , PAGLS and scripting languages such as Perl, Python is a plus Prior work on NoC/Interconnects end to end verification with solid understanding on to Bus protocols, Coherency, Performance, Latency, clock gating etc. Knowledge of one or more of Multimedia design blocks such as Display/Camera/Video/GFx Knowledge of one or more of peripheral blocks verification such as PCIe/USB/UFS/I3C Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.Roles and Responsibilities Define verification architecture, develop test plans and build verification environment Work with design team to understand design intent and bring up verification plans and schedules Verify Subsystems and Full SoC using advanced verification methodologies Build agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standard Develop test plan to verify all low power aspects across all modes of verification- RTL, PA-RTL, PA-GLS and Formal Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging UPF and RTL and achieving all coverage goals Assist in silicon bring-up, debug and bring-up activities Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Job Overview: Person will be responsible for developing next generation SoCs for mobile products and its adjacencies. The role will require the candidate to understand and work on all aspects of VLSI development from micro architecture and platform architecture, front end design, and design convergence. The person is also responsible for overseeing physical design and verification aspects. : - Full chip design for multi million gates SoC- Digital design and development (RTL)- Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification- Manage IP dependencies, planning and tracking of all front end design related tasks- Driving the project milestones across the design, verification and physical implementations Minimum Qualifications: - Minimum 15 years of solid experience SoC design- Developing architecture and micro-architecture from specs- Understanding of various bus protocols AHB, AXI and peripherals like USB, SDCC- Understanding of Memory controller designs and Microprocessors is an added advantage- Understanding of Chip IO design and packaging is an added advantage- Familiarity with various bus protocols like AHB, AXI is highly desired- Ability to review top level test plans- Expertise in Synopsys Design Compiler Synthesis and formal verification with Cadence LEC- Working knowledge of timing closure is a must - Should have good post silicon bring up and debug experience - Should have good SoC integration exposure and its challenges - Should have good exposure to design verification aspects - Having SoC specification to GDS to commercialization experience is highly desired - Needs to makes effective and timely decisions, even with incomplete information.- Should possess a strong understanding of a particular technical area and accumulated significant experience in this area and other related areas.- Provides direction, mentoring, and leadership to a small to medium sized groups.- Should possess strong communication and leadership skills to ensure effective communication with Program

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Minimum 4 to 6 years of work experience in ASIC RTL Design Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience with design and integration of complex multi clock domain blocks Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Understanding of Automotive System Designs, Functional Safety, Memory controller designs and microprocessors is an added advantage Work closely with the Design verification and validation teams for pre/post Silicon debug Hands on experience in Low power design is preferable Experience in Synthesis / Understanding of timing concepts for ASIC is must

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Serdes PHY Analog Design Job Function BDC SerDes Mixed-Signal design team is actively looking for experienced (4-12+ years) analog circuit designers to work on high speed SerDes PHYs . You will be directly involved in delivering next-generation custom PHY designs for SoCs and will be part of a growing team involved in architecture analysis in leading-nodes - finfets & beyond. Design goals include low-power analog designs to address Qualcomm's low-power wireless products. Responsibilities Hands-on experience - Analog circuit design Experience in designing multiple analog building blocks - LDO, high speed TX and RX (Equalizer, Sampler, PI, Deserializer etc) , Bias, Reference etc. Analog and or Digital PLLs for frequency synthesis and/or SerDes applications" Charge pump, loop filter, VCO/DCO, PFD/TDC, high speed dividers. PLL Loop Dynamics, Jitter sources and modeling (RJ & DJ) Ability to take a design, perform schematic to post layout verification, integration sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Skills & Experience For lead position, candidates must have performed PHY Lead roles which include PHY integration to SOC & interaction with post silicon teams like HSIO, ATE, SVE, CE etc. Understanding of advance Finfet process effects on designs and layout is required. Experience in using SPICE simulators, adexl & virtuoso. Experience with post-Si bring-up and debug is must. Good understanding on peripheral PHYs (USBs, UFS, PCIe) protocols is added advantage. Master/Bachelor in Electronics Shell/Perl-python scripting to automate circuit design and verification work. Able to work with teams across the globe and possess good communication and presentation skills. Preferred Mixed signal design experience Keywords Analog circuit Design, Rx, Tx, PLL, SerDes, PHY, Serializer, Deserializer, VCO, High-speed Trans receiver

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Ownership of System Memory Management [SMMU] IP test bench and collaterals for the next generation System-on-chip (SoC) for smartphones, tablets and other product categories. System Memory Management Unit does virtual to physical address translation, dynamic allocation and access control of DDR memory, designed as per ARM SMMU architecture spec. Job responsibilities include Ownership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage) Develop test plan and test cases to cover design feature set, follow up with stake holders on code coverage, functional coverage closure at different levels of test bench Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure Debug of regression signatures and identifying bug fixes Developing/Deploying scripts/tools for validation (Certitude, VC Formal, Fishtail) Debug and root cause post silicon issues in collaboration with Design, SW and test teams Work with SoC level performance modeling team on latency, bandwidth analysis Required skillset include Strong debugging, Analytical and problem-solving skills Expertise on UVM, System Verilog coding Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Post-si bring-up and HW-SW debug experience would be a plus. Knowledge & exposure to silicon debug tool chains would be an added advantage Communication and collaboration skills to work with a large world-wide design organization Desired skillset includes Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse Proficiency in any of the Scripting languages (Python or Perl)

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As an Engineer / Sr. Engineer / Lead Engineer in the WLAN FIRMWARE HALPHY Group, you will be designing, developing, unit testing, bug fixing and maintaining WLAN firmware and HALPHY components that implements functional aspects of WLAN features on low memory foot print processors that will work in tandem with device drivers running on the host processors. The host driver and the firmware implement the WLAN drivers on the Qualcomms WLAN SoC platforms. You will be working on cutting edge WiFi technologies, solving challenging WiFi design & performance issues and working with some of the leading WiFi ODMs & OEMs across the globe on their sometimes high pressure & tough timelines. At least 2-8 years of relevant hands-on technical experience in WLAN/Linux driver development with a record of strong individual technical achievement Strong programming skills in C. This position is for wireless LAN (WLAN) RF level development. The role requires knowledge of WLAN RF basics, RF system level programming, WLAN RF performance enhancement techniques, L2/L1 features, and writing APIs for upper layers. Implement RF calibration algorithms, Crystal calibration algorithms, RF level debugging, Flash/EEPROM programming, Generating RF initialization sequences for WLAN chipsets, Writing APIs for RF equipment. Responsibilities Design, develop, unit test and documentation of Firmware for AP SoC. Bring up the driver and unit test the driver features in the new AP. Optimize the driver for maximum performance. Bug analysis/fixing of the issues during product verification stage and customer reported issues. Travel to customer site for bug fixing. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Skills/Experience At least 2-8 years of relevant hands-on technical experience in WLAN/Linux driver development with a record of strong individual technical achievement - Strong programming skills in C - Must have hands on working experience working on real-time embedded systems - Must have hands on experience in solving complex system issues with good problem solving skills - Experience in working on Firmware in small memory footprint processors is a BIG plus - Hands on experience in Networking driver development, Ethernet and Wireless LAN driver development preferred - Hands on knowledge and experience on IP Networking technologies is a plus - RF level knowledge is a plus - Excellent verbal and written communication skills - Experience in Wireless LAN protocols is a BIG plus - Should be able to work in an aggressive, high pressure environment Educational BE/BTech/MTech in Computer Science or in Electronics preferred with proven success in a challenging academic program.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for an experience Verification Staff/Architect Engineer, who will be responsible Verification of next generation Infrastructure IPs (DDRSS, Memory Controllers etc.) which goes into System-on-chip (SoC) for smartphones, tablets and other product categories. In this position you will be expected to plan and implement IP/Cluster/Formal verification flows for the Infra IPs. Also expected to coordinate with different Design and SOC teams throughout the IP development cycle. Job responsibilities include Ownership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage) Develop test plan and test cases to cover design feature set, follow up with stake holders on code coverage, functional coverage closure at different levels of test bench Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure Debug of regression signatures and identifying bug fixes Responsible for Quality sign off and required documentation Developing/Deploying scripts/tools for validation (Certitude, VC Formal, VPlan) Debug and root cause post silicon issues in collaboration with Design, SW and test teams Work with SoC level performance modeling team on latency, bandwidth analysis " Required skillset include Strong debugging, Analytical and problem-solving skills Expertise on UVM based verification Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Communication and collaboration skills to work with a large world-wide design organization " Desired skillset includes Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse Experience in verifying designs meeting Automotive Safety Integrity Levels (ASIL) Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models Post-si bring-up and HW-SW debug experience would be a plus. Knowledge & exposure to silicon debug tool chains would be an added advantage Qualification : Bachelor/Masters Degree in Electronics & Communication / Micro Electronics 9 -12 years of experience Experience with UVM and ARM Bus protocols. tor, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a DV Engineer with a focus on SOC design verification, you will work to understand the internal requirements and complexities of our highly complex auto, compute, mobile, XR-VR, IoT SOCs and architect the required verification strategy. You will help set up methodologies, develop test plans, and verify that the design meets the highest quality standards. We believe in early involvement of DV, so you will also participate in architecture/product definition through early involvement in the product life-cycle. Preferred qualifications B.E/B.Tech/M.E/M.Tech in Electronics with 5+ year experience in verification domain. Strong fundamentals in digital ASIC verification Experience in IP/SS/SoC level verification of medium to high complexity design Familiarity with system level HW and SW Debug techniques and Verification requirements A good understanding of the complete verification life cycle (test plan, testbench through coverage closure) Strong System Verilog/UVM based verification skills & Experience with Assertion & coverage-based verification methodology Experience w/ PSS or higher-level test construction languages is an added advantage Working knowledge of Interconnect architecture and Bus protocols like AMBA - ACE/CHI/AXI Good understanding of low power design techniques Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells and state retention cells. Experience with UPF/CPF based power aware verification. Working knowledge of GLS , PAGLS and scripting languages such as Perl, Python is a plus Prior work on NoC/Interconnects end to end verification with solid understanding on to Bus protocols, Coherency, Performance, Latency, clock gating etc. Knowledge of one or more of Multimedia design blocks such as Display/Camera/Video/GFx Knowledge of one or more of peripheral blocks verification such as PCIe/USB/UFS/I3C Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Roles and Responsibilities Define verification architecture, develop test plans and build verification environment Work with design team to understand design intent and bring up verification plans and schedules Verify Subsystems and Full SoC using advanced verification methodologies Build agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standard Develop test plan to verify all low power aspects across all modes of verification- RTL, PA-RTL, PA-GLS and Formal Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging UPF and RTL and achieving all coverage goals Assist in silicon bring-up, debug and bring-up activities

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Job Function BDC SerDes Mixed-Signal design team is actively looking for experienced (12+ years) analog circuit designers to work on high speed SerDes PHYs . You will be directly involved in delivering next-generation custom PHY designs for SoCs and will be part of a growing team involved in architecture analysis in leading-nodes - finfets & beyond. Design goals include low-power analog designs to address Qualcomm's low-power wireless products. Responsibilities Hands-on experience - Analog circuit design Experience in designing multiple analog building blocks - LDO, high speed TX and RX (Equalizer, Sampler, PI, Deserializer etc) , Bias, Reference etc. Analog and or Digital PLLs for frequency synthesis and/or SerDes applications" Charge pump, loop filter, VCO/DCO, PFD/TDC, high speed dividers. PLL Loop Dynamics, Jitter sources and modeling (RJ & DJ) Ability to take a design, perform schematic to post layout verification, integration sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY. Skills & Experience For lead position, candidates must have performed PHY Lead roles which include PHY integration to SOC & interaction with post silicon teams like HSIO, ATE, SVE, CE etc. Understanding of advance Finfet process effects on designs and layout is required. Experience in using SPICE simulators, adexl & virtuoso. Experience with post-Si bring-up and debug is must. Good understanding on peripheral PHYs (USBs, UFS, PCIe) protocols is added advantage. Master/Bachelor in Electronics Shell/Perl-python scripting to automate circuit design and verification work. Able to work with teams across the globe and possess good communication and presentation skills. Preferred Mixed signal design experience Keywords Analog circuit Design, Rx, Tx, PLL, SerDes, PHY, Serializer, Deserializer, VCO, High-speed Trans receiver

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Expertise in AMBA protocols (CHI/AXI/AHB) Excellent analytical skills, should have an experience of leading a team of 7-8 engineers Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Handson experience of GLS and timing simulations Exposure to Formal verification Self-driven and motivated to work in a high pressure environment Good at stakeholder management with good communication skills Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

- Managing Sales of Loan Against Property & Business Loans. - Recruit, train and monitor team members & ensuring quality service delivery. - Lead a team of Relationship Managers to generate business through Direct sourcing. - Building the Sales and distribution network in the assigned territory. - Managing loan process from lead generation till disbursement of the loan. - Ensure synergy between sales, credit and operation to ensure the efficiency of business processes

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running.The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division , where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, weve united two industry leaders to create an optical networking powerhousecombining cutting-edge technology with proven leadership to redefine the future of connectivity. Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. As a FPGA Verification Engineer at Nokia, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. This role typically requires 3-6 years of experience developing SystemVerilog UVM-based test environments and implementing comprehensive test plans at block, sub-chip and chip levels Strong proficiency in Hardware Verification Languages (HVL), with practical coding experience for verification tasks Practical experience using industry-standard simulators such as VCS, NC-Sim, or ModelSim (MTI), along with strong skills in waveform-based debugging. Solid understanding and practical application of UVM or similar modern verification methodologies. Experience with scripting languages such as Perl is highly valued and will help you stand out. It would be nice if you also had: Working knowledge of RTL design and familiarity with technologies like Ethernet, PCIe, and preferably telecom protocols. Strong analytical, troubleshooting, and problem-solving skills, with a structured and thorough approach to work. Good written and oral communication skills are required. Excellent written and verbal communication skills. Flexible, innovative, and self-driven team player with a strong willingness to take initiative. Design and develop comprehensive FPGA verification plans. Create and implement verification environments and testbenches. Develop and execute test scenarios for running simulations. Perform coverage analysis to ensure thorough verification. Provide lab support during FPGA and board bring-up phases. Collaborate closely with design and system teams to drive verification solutions. Independently manage verification tasks and projects. What We Offer: Opportunity to work in short product development cycles, allowing you to quickly see the real impact of your contributions on products and business success. International career development opportunities with internal mobility programs that encourage professional growth and advancement within the company. Access to a variety of social, wellness, and hobby clubs to support a balanced lifestyle and foster a sense of community. A friendly, inclusive, and supportive atmosphere where collaboration and mutual respect are core values. The chance to work alongside highly skilled, motivated, and innovative colleagues who are passionate about technology and excellence.

In this role, you will develop and direct the engineering organization for development and revision of new and existing products or services and oversees the different R&D engineering dimensions. Act as the interface between the global engineering organization and the local sites. Manage the development of new products and release, leading state-of-the-art development teams (SW, HW, test, information design) within a multi-site R&D environment, with strong dependencies towards external stakeholders like product managers, supply chain, quality and procurement. You have: Typically requires 12+ years extensive relevant experience and/or a graduate / postgraduate equivalent degree. PhD degree would normally be expected in R&D stream. Strategic thinking with experience in business management and leadership of large cross-functional units. Proven track record in delivering strong financial results in key projects Leadership, influencing, and facilitation skills. Highly organized with strong focus on driving results. Must be strong in C/C++ and data structures. Management experience across several functional areas or businesses. It would be nice if you also had: Protocol development preferably, wireless experience, such as development on SMF/UPF, GGSN, PGW/SGW is added advantage. Familiarity with IP network protocols. Familiarity with UNIX based and real-time operating systems. Experience in debugging and maintaining control plane software. Sustain and increase the high-performance of the Packet Core Engineering global software development organization, showing y-o-y improvements in quality, productivity, morale, customer satisfaction. Design and implementation of the functional modules for the Serving and PDN Gateway, 5G SMF and UPF. Unit testing of features developed on mobile gateways, maintenance of software with support and technical assistance. Mentor and train new team members. Anticipate internal and external business challenges and / or regulatory issues and drives process, product or service improvements that create competitive advantage. Combine profound professional expertise with a holistic sense for the business and commercial environment and understands how the job contributes to achieving the objectives of the business. Influence strategic decisions in the professional area through expertise, in turn impacting the performance of the sub-function to create competitive advantage. Solve highly complex problems and develops original and innovative solutions with broad impact on the business.

Req ID: 327084 We are currently seeking a Senior Salesforce FSC developer to join our team in Hyderabad, Telangana (IN-TG), India (IN). key Responsibilities: "¢ Develop and maintain customized solutions in Salesforce Financial Services Cloud, including Apex, Flows, and Lightning Web Components (LWC). "¢ Design and implement SSO authentication flows for Salesforce mobile applications using industry standards such as SAML, OAuth 2.0, and OpenID Connect. "¢ Build and support integrations between Salesforce and third-party systems using REST/SOAP APIs, Platform Events, and middleware tools (e.g., Mulesoft, Boomi). "¢ Collaborate with enterprise security teams and mobile developers to ensure seamless and secure access across platforms. "¢ Contribute to technical design documents, integration mappings, and deployment plans. "¢ Troubleshoot complex issues across web and mobile environments and drive root cause analysis and resolution. "¢ Follow coding best practices, perform code reviews, and ensure documentation for all deliverables. "¢ Participate in Agile ceremonies and work closely with product owners, architects, and QA teams Required Skills & Qualifications: "¢ 5"“8 years of experience in Salesforce development with a focus on Financial Services Cloud (FSC). "¢ Strong understanding of Salesforce data model, FSC-specific objects (e.g., Financial Accounts, Households, Goals). "¢ Hands-on experience with SSO implementation for mobile Salesforce apps using protocols like SAML, OAuth2, or OpenID Connect and Integration Patterns "¢ Proficiency in Apex, LWC, Flows, SOQL, and system integration techniques. "¢ Working knowledge of Salesforce Mobile SDK or experience integrating Salesforce with custom mobile apps. "¢ Salesforce Platform Developer I certification (mandatory); FSC or Identity & Access Management certification preferred. "¢ Strong analytical and debugging skills with attention to detail. Nice to Have: "¢ Prior experience in financial services, banking, or insurance domains . Familiarity with mobile security best practices and device-level authentication.

Overview 170+ Years Strong. Industry Leader. Global Impact. At Pinkerton, the mission is to protect our clients. To do this, we provide enterprise risk management services and programs specifically designed for each client. Pinkerton employees are one of our most important assets and critical to the delivery of world-class solutions. Bonded together, we share a commitment to integrity, vigilance, and excellence. Pinkerton is an inclusive employer who seeks candidates with diverse backgrounds, experiences, and perspectives to join our family of industry subject matter experts. The Senior Security Specialist will be responsible for assessing client security needs, developing customized security strategies, and implementing solutions to mitigate risks. This role requires strong analytical skills, technical expertise, and the ability to communicate effectively with clients Responsibilities Represent Pinkerton’s core values of integrity, vigilance, and excellence. Proven project management expertise with a strong understanding of security design principles. Demonstrated ability to develop and implement standardized security processes and best practices in collaboration with subject matter experts. This includes defining project scope, documentation, metrics, communication strategies, and successful implementation. Excellent time management and prioritization skills to meet client needs and deadlines. Adept at creating clear and concise security documentation, including SOPs, guidelines, presentations and Skilled in creating high-quality reports Strong communication and interpersonal skills. Holds a Project Management Professional (PMP)/CPP certification. 5 to 7 years of relevant experiences. Collaborate with stakeholders to define project scope, objectives, and deliverables. Develop and implement comprehensive security solutions, including physical security design, access control systems, and surveillance technologies. Create and maintain accurate documentation, including project plans, risk assessments, and incident reports. Communicate effectively with clients, security leaders, and other team members Proactively identify and mitigate security risks. Prioritize tasks and manage workload to meet deadlines and client expectations. Develop and deliver security awareness training to employees. Perform other security-related duties as assigned by the client. All other duties, as assigned. Qualifications Proven experience as a Security Consultant or in a similar role. • Strong understanding of security protocols, risk management, and incident response. • Excellent analytical, problem-solving, and communication skills. • Relevant certifications such as CISSP (Certified Information Systems Security Professional) or CISM (Certified Information Security Manager) are preferred. Working Conditions: With or without reasonable accommodation, requires the physical and mental capacity to effectively perform all essential functions; Regular computer usage. Occasional reaching and lifting of small objects and operating office equipment. Frequent sitting, standing, and/or walking. Travel, as required. Pinkerton is an equal opportunity employer to all applicants and positions without regard to race/ethnicity, color, national origin, ancestry, sex/gender, gender identity/expression, sexual orientation, marital/prenatal status, pregnancy/childbirth or related conditions, religion, creed, age, disability, genetic information, veteran status, or any protected status by local, state, federal or country-specific law.

Your day at NTT DATA The Networking Managed Services Engineer (L2) is a developing engineering role, responsible for providing a managed service to clients to ensure that their IT infrastructure and systems remain operational through proactively monitoring, identifying, investigating, and resolving technical incidents and problems and restoring service to clients. The primary objective of this role is to proactively review client requests or tickets and apply technical/process knowledge to resolve them without breaching service level agreement (SLA) and focuses on second-line support for incidents and requests with a medium level of complexity. The Networking Managed Services Engineer (L2) may also contribute to support on project work as and when required. What you'll be doing Key Responsibilities: Proactively monitors the work queues. Performs operational tasks to resolve all incidents/requests in a timely manner and within the agreed SLA. Updates tickets with resolution tasks performed. Identifies, investigates, analyzes issues and errors prior to or when they occur, and log all such incidents in a timely manner. Captures all required and relevant information for immediate resolution. Provides second level support to all incidents, requests and identifies the root cause of incidents and problems. Communicates with other teams and clients for extending support. Executes changes with clear identification of risks and mitigation plans to be captured into the change record. Follows the shift handover process highlighting any key tickets to be focused on along with a handover of upcoming critical tasks to be carried out in the next shift. Escalates all tickets to seek the right focus from CoE and other teams, if needed continue the escalations to management. Works with automation teams for effort optimization and automating routine tasks. Coaches Service Desk and L1 teams for technical and behavioural skills. Establishes monitoring for client infrastructure. Identifies problems and errors before they impact a clients service. Leads and manages all initial client escalation for operational issues. Contributes to the change management process by logging all change requests with complete details for standard and non-standard including patching and any other changes to Configuration Items. Ensures all changes are carried out with proper change approvals. Plans and executes approved maintenance activities. Audits and analyses incident and request tickets for quality and recommends improvements with updates to knowledge articles. Produces trend analysis reports for identifying tasks for automation, leading to a reduction in tickets and optimization of effort. May also contribute to support on project work as and when required. May work on implementing and delivering Disaster Recovery functions and tests. Performs any other related task as required. Knowledge and Attributes: Ability to communicate and work across different cultures and social groups. Ability to plan activities and projects well in advance, and takes into account possible changing circumstances. Ability to maintain a positive outlook at work. Ability to work well in a pressurized environment. Ability to work hard and put in longer hours when it is necessary. Ability to apply active listening techniques such as paraphrasing the message to confirm understanding, probing for further relevant information, and refraining from interrupting. Ability to adapt to changing circumstances. Ability to place clients at the forefront of all interactions, understanding their requirements, and creating a positive client experience throughout the total client journey. Additional skills proficiency such as (but not limited to) - Pulse Secure SSL VPN Virtual Juniper, Palo Alto, Fortinet Firewalls Cisco Nexus switches, ASR and ISR routers Cisco ACS, ISE Meraki switches and access points Enterprise network architecture Common routing protocols: BGP,OSPF, EIGRP Network address translation Configuring, monitoring and troubleshooting uplinks to ISPs for DIA, MPLS and P2P circuits Familiarity with common network management and monitoring tools such as SecureCRT, Logic Monitor Academic Qualifications and Certifications: Bachelor's degree or equivalent qualification in IT/Computing (or demonstrated equivalent work experience). CCNP or equivalent certification. Certifications relevant to the services provided (certifications carry additional weightage on a candidates qualification for the role). Required Experience: Moderate level of relevant managed services experience. Moderate level knowledge in ticketing tools preferably Service Now. Workplace type : On-site Working

Responsibilities: Review protocol and provide suggestions Respond to queries/ clarifications from EC/ IRBs Answer medical questions from sites or project team Respond to queries from sites with regard to protocol Attend drug safety meetings/ external meetings Patient eligibility review Review AE/ SAEs Protocol training to site staff, CRAs etc Attend, participate/ present in investigator meetings Qualification: MBBS/ MD qualification Eligibility: 3 year+ of clinical trial experience Familiar with clinical trials operations Good English communication skills Proficiency in using Microsoft office

About The Role Responsibilities Administration and Management of Wipro LAN & WAN (Network Domain) across globe as a part of Global Network Project Implementation Team based on the Projects assigned. Implementation and configuration of Network devices which consists of Routers, Switches, NMS Tools & Wifi Devices from different manufacturers (Mainly Cisco & some cases Avaya / Brocade, etc.). Configure / Implement Network Devices as per the hardening Guidelines & as per particular Project requirement. Troubleshoot Network & Security related problems in a particular Project based on the Project scope defined. Implementation of Network Infrastructure for new Offshore Development Centers (ODC) with appropriate security levels and redundancy as per the ODC requirements. Implementation of Network Infrastructure for new Enterprise Projects with appropriate security levels and redundancy. Implement ODC setups with connectivity varying from MPLS Connectivity, Client to site VPN, Site to Site VPN (Router based). Handle implementations in project movements within Wipro locations, Point to point link establishment, Network infra for new Wipro locations including LAN/WAN/Internet Architecture etc. Coordination with ISP, clients and onsite technical teams for P2P, MPLS, VPN and other links for new implementations and troubleshooting connectivity issues. Validating the technical feasibility of the network design plans for customer/Enterprise networks submitted by the design team and provide appropriate suggestions as required. Knowledge & exposure on (not limited to) NMS Tools, Routing Protocols such as OSPF, BGP, etc., MPLS Configuration (VRF Config), Switching Protocols, STP, QoS, etc. Execute the implementation per the standard ISO (20000 & 27001) and Wipro IRMC guidelines following incident, change and capacity management procedures followed in Wipro. CCNP Equivalent Certifications with around 5 years’ experience. Should be able to Multitask & involve in multiple projects at a time. Take lead and participate in S0 calls and Outages till resolution ? ? ? ? Mandatory Skills: Network Data Admin. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role : Responsibilities Administration and Management of Wipro LAN & WAN (Network Domain) across globe as a part of Global Network Project Implementation Team based on the Projects assigned. Implementation and configuration of Network devices which consists of Routers, Switches, NMS Tools & Wifi Devices from different manufacturers (Mainly Cisco & some cases Avaya / Brocade, etc.). Configure / Implement Network Devices as per the hardening Guidelines & as per particular Project requirement. Troubleshoot Network & Security related problems in a particular Project based on the Project scope defined. Implementation of Network Infrastructure for new Offshore Development Centers (ODC) with appropriate security levels and redundancy as per the ODC requirements. Implementation of Network Infrastructure for new Enterprise Projects with appropriate security levels and redundancy. Implement ODC setups with connectivity varying from MPLS Connectivity, Client to site VPN, Site to Site VPN (Router based). Handle implementations in project movements within Wipro locations, Point to point link establishment, Network infra for new Wipro locations including LAN/WAN/Internet Architecture etc. Coordination with ISP, clients and onsite technical teams for P2P, MPLS, VPN and other links for new implementations and troubleshooting connectivity issues. Validating the technical feasibility of the network design plans for customer/Enterprise networks submitted by the design team and provide appropriate suggestions as required. Knowledge & exposure on (not limited to) NMS Tools, Routing Protocols such as OSPF, BGP, etc., MPLS Configuration (VRF Config), Switching Protocols, STP, QoS, etc. Execute the implementation per the standard ISO (20000 & 27001) and Wipro IRMC guidelines following incident, change and capacity management procedures followed in Wipro. CCNP Equivalent Certifications with around 5 years experience. Should be able to Multitask & involve in multiple projects at a time. Take lead and participate in S0 calls and Outages till resolution

About The Role Responsibilities ?¢ Administration and Management of Wipro LAN & WAN (Network Domain) across globe as a part of Global Network Project Implementation Team based on the Projects assigned. ?¢ Implementation and configuration of Network devices which consists of Routers, Switches, NMS Tools & Wifi Devices from different manufacturers (Mainly Cisco & some cases Avaya / Brocade, etc.). ?¢ Configure / Implement Network Devices as per the hardening Guidelines & as per particular Project requirement. ?¢ Troubleshoot Network & Security related problems in a particular Project based on the Project scope defined. ?¢ Implementation of Network Infrastructure for new Offshore Development Centers (ODC) with appropriate security levels and redundancy as per the ODC requirements. ?¢ Implementation of Network Infrastructure for new Enterprise Projects with appropriate security levels and redundancy. ?¢ Implement ODC setups with connectivity varying from MPLS Connectivity, Client to site VPN, Site to Site VPN (Router based). ?¢ Handle implementations in project movements within Wipro locations, Point to point link establishment, Network infra for new Wipro locations including LAN/WAN/Internet Architecture etc. ?¢ Coordination with ISP, clients and onsite technical teams for P2P, MPLS, VPN and other links for new implementations and troubleshooting connectivity issues. ?¢ Validating the technical feasibility of the network design plans for customer/Enterprise networks submitted by the design team and provide appropriate suggestions as required. ?¢ Knowledge & exposure on (not limited to) NMS Tools, Routing Protocols such as OSPF, BGP, etc., MPLS Configuration (VRF Config), Switching Protocols, STP, QoS, etc. ?¢ Execute the implementation per the standard ISO (20000 & 27001) and Wipro IRMC guidelines following incident, change and capacity management procedures followed in Wipro. ?¢ CCNP Equivalent Certifications with around 5 years?? experience. ?¢ Should be able to Multitask & involve in multiple projects at a time. ?¢ Take lead and participate in S0 calls and Outages till resolution

About The Role Responsibilities ?¢ Administration and Management of Wipro LAN & WAN (Network Domain) across globe as a part of Global Network Project Implementation Team based on the Projects assigned. ?¢ Implementation and configuration of Network devices which consists of Routers, Switches, NMS Tools & Wifi Devices from different manufacturers (Mainly Cisco & some cases Avaya / Brocade, etc.). ?¢ Configure / Implement Network Devices as per the hardening Guidelines & as per particular Project requirement. ?¢ Troubleshoot Network & Security related problems in a particular Project based on the Project scope defined. ?¢ Implementation of Network Infrastructure for new Offshore Development Centers (ODC) with appropriate security levels and redundancy as per the ODC requirements. ?¢ Implementation of Network Infrastructure for new Enterprise Projects with appropriate security levels and redundancy. ?¢ Implement ODC setups with connectivity varying from MPLS Connectivity, Client to site VPN, Site to Site VPN (Router based). ?¢ Handle implementations in project movements within Wipro locations, Point to point link establishment, Network infra for new Wipro locations including LAN/WAN/Internet Architecture etc. ?¢ Coordination with ISP, clients and onsite technical teams for P2P, MPLS, VPN and other links for new implementations and troubleshooting connectivity issues. ?¢ Validating the technical feasibility of the network design plans for customer/Enterprise networks submitted by the design team and provide appropriate suggestions as required. ?¢ Knowledge & exposure on (not limited to) NMS Tools, Routing Protocols such as OSPF, BGP, etc., MPLS Configuration (VRF Config), Switching Protocols, STP, QoS, etc. ?¢ Execute the implementation per the standard ISO (20000 & 27001) and Wipro IRMC guidelines following incident, change and capacity management procedures followed in Wipro. ?¢ CCNP Equivalent Certifications with around 5 years?? experience. ?¢ Should be able to Multitask & involve in multiple projects at a time. ?¢ Take lead and participate in S0 calls and Outages till resolution ? ? ? ? Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Responsibilities ?¢ Administration and Management of Wipro LAN & WAN (Network Domain) across globe as a part of Global Network Project Implementation Team based on the Projects assigned. ?¢ Implementation and configuration of Network devices which consists of Routers, Switches, NMS Tools & Wifi Devices from different manufacturers (Mainly Cisco & some cases Avaya / Brocade, etc.). ?¢ Configure / Implement Network Devices as per the hardening Guidelines & as per particular Project requirement. ?¢ Troubleshoot Network & Security related problems in a particular Project based on the Project scope defined. ?¢ Implementation of Network Infrastructure for new Offshore Development Centers (ODC) with appropriate security levels and redundancy as per the ODC requirements. ?¢ Implementation of Network Infrastructure for new Enterprise Projects with appropriate security levels and redundancy. ?¢ Implement ODC setups with connectivity varying from MPLS Connectivity, Client to site VPN, Site to Site VPN (Router based). ?¢ Handle implementations in project movements within Wipro locations, Point to point link establishment, Network infra for new Wipro locations including LAN/WAN/Internet Architecture etc. ?¢ Coordination with ISP, clients and onsite technical teams for P2P, MPLS, VPN and other links for new implementations and troubleshooting connectivity issues. ?¢ Validating the technical feasibility of the network design plans for customer/Enterprise networks submitted by the design team and provide appropriate suggestions as required. ?¢ Knowledge & exposure on (not limited to) NMS Tools, Routing Protocols such as OSPF, BGP, etc., MPLS Configuration (VRF Config), Switching Protocols, STP, QoS, etc. ?¢ Execute the implementation per the standard ISO (20000 & 27001) and Wipro IRMC guidelines following incident, change and capacity management procedures followed in Wipro. ?¢ CCNP Equivalent Certifications with around 5 years?? experience. ?¢ Should be able to Multitask & involve in multiple projects at a time. ?¢ Take lead and participate in S0 calls and Outages till resolution ? ? ? ? Mandatory Skills: Network Data Admin. Experience5-8 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role : Responsibilities Administration and Management of Wipro LAN & WAN (Network Domain) across globe as a part of Global Network Project Implementation Team based on the Projects assigned. Implementation and configuration of Network devices which consists of Routers, Switches, NMS Tools & Wifi Devices from different manufacturers (Mainly Cisco & some cases Avaya / Brocade, etc.). Configure / Implement Network Devices as per the hardening Guidelines & as per particular Project requirement. Troubleshoot Network & Security related problems in a particular Project based on the Project scope defined. Implementation of Network Infrastructure for new Offshore Development Centers (ODC) with appropriate security levels and redundancy as per the ODC requirements. Implementation of Network Infrastructure for new Enterprise Projects with appropriate security levels and redundancy. Implement ODC setups with connectivity varying from MPLS Connectivity, Client to site VPN, Site to Site VPN (Router based). Handle implementations in project movements within Wipro locations, Point to point link establishment, Network infra for new Wipro locations including LAN/WAN/Internet Architecture etc. Coordination with ISP, clients and onsite technical teams for P2P, MPLS, VPN and other links for new implementations and troubleshooting connectivity issues. Validating the technical feasibility of the network design plans for customer/Enterprise networks submitted by the design team and provide appropriate suggestions as required. Knowledge & exposure on (not limited to) NMS Tools, Routing Protocols such as OSPF, BGP, etc., MPLS Configuration (VRF Config), Switching Protocols, STP, QoS, etc. Execute the implementation per the standard ISO (20000 & 27001) and Wipro IRMC guidelines following incident, change and capacity management procedures followed in Wipro. CCNP Equivalent Certifications with around 5 years experience. Should be able to Multitask & involve in multiple projects at a time. Take lead and participate in S0 calls and Outages till resolution

Role: C Progaramer + Datacom Developer Location: Bangalore Must Need Skils: MPLS/ RSVP-TE / LDP and good to have also. Job Description : We are seeking experienced Datacom L2/L3 Protocol Developers with strong expertise in C/C++ development for networking and routing protocols. The ideal candidate should have hands-on experience in L2/L3 protocol stack development, OSPF/BGP, MPLS, and L3 forwarding. Experience with Zeb OS or Yocto OS and scripting (Shell/Python) will be a plus. Job Requirements : Apply expertise in IP-based networks and Layer 2/Layer 2+ Access protocols to develop software for the Lightspan family, ensuring it meets required standards. Deepen expertise in a subset of L2 & L3+ Access protocols including but not limited to Ethernet, L2: VLAN, LACP, RSTP, MSTP, LLDP, OAM / L3: BGP, L3VPN, OSPF, MPLS LACP, ANCP, Radius, etc. and stay updated with emerging network technologies. Strong hands-on experience in C/C++ development. Expertise in L2/L3 networking protocols. Experience with at least one major routing protocol (OSPF, BGP, etc.). Hands-on knowledge of MPLS and L3 forwarding. Understanding of distributed router architecture/design. Roles and Responsibilities : Design, develop, Datacom protocol stack components using C/C++ programming languages. Graduate or Postgraduate in Engineering stream with 4+ years of experience in L2 & L3+ protocol development Advanced programming skills in C or C++, with expertise in Object-Oriented Programming (OOP) and the design and development of complex software systems. Any combination of L2 & L3+ protocols => Layer 2 Forwarding, Switching, VLAN, xSTP, LLDP, IGMP, ARP, 802.1x, QoS, DHCP, PPPoE, ERPS, CFM, EFM-OAM, ANCP, Radius and LACP. Experience with products like xDSL, GPON, and IPDSLAM, aligning well with the product line will be added advantage. Experience in recruitment analysis, architecture and design.