573 Primetime Jobs - Page 2

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Culture Anchor:Work Hard - Consistently puts in effort. plans and tracks daily progress to achieve targetsExecute with Rigor - Takes responsibility for meeting targets with focus and effortOwn It - Maintains honesty and fairness in all interactions in line with organizations policiesAct with Integrity Duties and Responsibilities 1. Resolving SFDC functions related issues2. Resolving BRE level issues3. Educating internal and field teams on issues due to training requiremen...

Location: Bangalore, Hyderabad, Noida, and Coimbatore. Skills: Soc level floorplanning, partitioning, timing budget generations, power planning, SOC PnR, CTS, block integration Handling timing closure of high frequency blocks. Expertise in signoff closure Timing with SI and OCV, Power, IR and physical verification at both block and chip level. Understanding constraints and fixing techniques. Experience in physical verification Understanding SI prevention, fixing methodology and implementation. Proficient in Synopsys ICC or Cadence or Mentor Olympus and Atoptech tool set. Experience in Design Automation and UNIX system. Experience in Tcl/ PERL is a plus. Primary Skills: Able to handle Soc PNR...

We are looking for a skilled Senior Manager - Physical Design with 10-15 years of experience to lead our team in Bangalore, Hyderabad, Noida, Coimbatore. The ideal candidate will have a strong background in physical design and excellent leadership skills. Roles and Responsibility Manage and lead a team of physical design engineers to achieve project goals. Develop and implement automation scripts for physical design methodologies. Collaborate with front-end engineers to resolve timing and power issues. Evaluate new tools and drive power reduction of designs. Perform floorplanning and time budgeting for successful project execution. Ensure timely completion of projects by managing resources e...

Role Overview: You are required to lead the end-to-end VLSI components and hardware systems, providing customer support and governance of VLSI components and hardware systems, and managing the team effectively. Key Responsibilities: - Design, analyze, develop, modify, and evaluate VLSI components and hardware systems - Determine architecture and logic design verification through software for component and system simulation - Conduct system evaluations, make appropriate recommendations, and review data and project documentation - Identify and recommend system improvements for better technical performance - Inspect VLSI components and hardware systems for compliance with regulations and safety...

Your role and responsibilities Your Role and Responsibilities : We are seeking highly motivated individuals with a BS, MS, or PhD degree in Computer Science, Computer Engineering & Electronics & Communication Engineering ready to handle the challenging problems in future technologies and designs. We are also looking for candidates with Machine Learning/AI and/or Data Science background to lead our leading-edge algorithms and AI technology within our EDA solutions to increase our design teams productivity and chip quality and performance. Our dynamic global team is looking to enlist enthusiastic professionals to join world-class hardware design teams responsible for developing the most challe...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with Static Timing Analysis, Constraints development and its validation, sign-off corner definitions, process margining, and setup of frequency goals with technology growth and platform development kit (PDK) changes. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science. Experience with a scripting language like Perl or Python. Experience in developing constraints and validating using Timing Constraints Manager (e.g., Synopsys) or TimeVision (e.g...

SYMPHISYS SOFTWARE CONSULTING is looking for ASIC Physical Design Engineer to join our dynamic team and embark on a rewarding career journey Collaborate with cross-functional teams to achieve strategic outcomes Apply subject expertise to support operations, planning, and decision-making Utilize tools, analytics, or platforms relevant to the job domain Ensure compliance with policies while improving efficiency and outcomes Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify all details directly with the employer via their official channels before applying.

SYMPHISYS SOFTWARE CONSULTING is looking for STA Engineer ( ASIC / SoC ) to join our dynamic team and embark on a rewarding career journey Collaborate with cross-functional teams to achieve strategic outcomes Apply subject expertise to support operations, planning, and decision-making Utilize tools, analytics, or platforms relevant to the job domain Ensure compliance with policies while improving efficiency and outcomes Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify all details directly with the employer via their official channels before applying.

Job Description Hand-on experience and Comprehensive knowledge of Static Timing Analysis. Hands-on experience in Logical aware Synthesis, Logical Equivalence check and, Static Timing analysis. Hands-on the DMSA flow to fix pre and post STA timing. Knowledge in the Timing closure on Sub-system level & Block level and Chip level. Knowledge in writing Manual ECOs to fix timing violations and DRCs. Knowledge of constraint development. Good Knowledge of TCL scripting and UNIX env. Leading the team of 4 to 5 team members by guiding and mentoring on the STA /Synthesis. Pre-layout timing analysis and report out Post layout timing analysis for placement, CTS & PRO Clock gating checks and timing closu...

We are looking for a skilled professional with 5-15 years of experience to join our team as an SCOM in IDESLABS PRIVATE LIMITED, located in [location to be specified]. The ideal candidate will have a strong background in recruitment services and excellent communication skills. Roles and Responsibility Manage and coordinate recruitment activities to meet client requirements. Develop and implement effective recruitment strategies to attract top talent. Build and maintain relationships with clients and candidates for successful placements. Conduct interviews and assessments to identify the best candidates. Collaborate with internal teams to ensure seamless recruitment processes. Analyze recruit...

Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/ Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementatio n (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 20+ years Hardware Engineering experience or related work experience. 17+ years experience with PNR flo...

The position will involve working with a very experienced CPU physical design team. The person is responsible for delivering the physical design of critical CPU units to meet challenging goals for frequency, power, and other design requirements for AMDs next-generation processors in a fast-paced environment with cutting-edge technology. THE PERSON: Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities. KEY RESPONSIBILITIES: Own critical CPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff Understand the micro-architecture to perform feasibility studies...

About The Role Your Role As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will collaborate closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process corners. In this role, you will: Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs Perform timing analysis using industry-standard tools (e.g., PrimeTime, Tempus) Collaborate with design and architecture teams to define timi...

Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from de...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, youll contribute to developing next-generation networking chips. Responsibilities include: Being a member of design team who oversees fullchip SDCs and w...

Should have indepth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS Should have worked on latest technology nodes (14nm or lesser) Should have worked on block level and top-level designs Good to have worked on designs without a customer flow. Strong problem-solving skills and communication skills. Ability to mentor and work closely with junior engineers Will be responsible for building a highly capable team of PD engineers at Ignitarium.

As a member of the team at Google, you will play a crucial role in developing custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation that impacts millions globally. Your expertise in electrical engineering or computer science will be instrumental in shaping the future of hardware experiences, focusing on performance, efficiency, and integration. **Key Responsibilities:** - Create design constraints based on architecture/microarchitecture documents, understanding various external IO protocols. - Validate design constraints across multiple corners/modes using Fishtail/Timevision. - Utilize Primetime for running and validating constraints post synthesi...

As an experienced physical design engineer with a B. Tech / M. Tech (ECE) background and 3 to 13 years of experience, you will be responsible for a variety of tasks including top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs). Your expertise in SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, as well as experience in working on 65nm or lower node designs with advanced low power techniques, will be crucial for success in this role. Key Responsibilities: - Provide technical guidance and mentoring to phy...

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop?stdcells?architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...