Verification Engineer || VLSI Acesoft Labs

4.0 - 9.0 years

15 - 30 Lacs

hyderabad

Work from Office

Job Title: Verification Engineer Job Location: Hyderabad Experience: 5 to 8 years Education: B.E./B.Tech/M.E./M.Tech in ECE, Electrical, or VLSI Design or equivalent Job Description: we are seeking a Verification Engineer specializing in Static Timing Analysis (STA) and Standard Cell Characterization for advanced memory product development (HBM, DRAM). The role involves working closely with cross-functional design and verification teams to ensure robust, high-performance memory solutions. Responsibilities: Perform Static Timing Analysis at block, cell, and full-chip levels for DRAM/memory designs. Characterize standard cells (up to 40% effort) using PrimeLib, SiliconSmart Create and validate...

Posted 1 day ago

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R&D Engineer, Sr Staff Engineer Synopsys Inc

8.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an accomplished and experienced R&D engineering professional with over 8 years in logic circuit characterization, logic IP view generation, and advanced timing/power methodologies for standard cells. You possess a strong technical foundation in both basic and advanced mode...

Posted 4 days ago

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STA (SI30FT RM 3520) Sourceright Technologies

3.0 - 8.0 years

6 - 8 Lacs

hyderabad, telangana, india

On-site

Doing STD cells characterization work (max up to 40% of time) , Static timing analysis (60%) Able to characterize basic STD Cells Writing ARC for STD cell char (using primeLib , Silicon smart) lib QA check Circuit understanding block wise , Full chip level Static timing Analysis of DRAM block wise , top level analysis , cell level analysis Writing constraints , analysing the STA reports Reporting violations to Design team , ownership for closure Parasitic modelling and assisting in design validation, reticle experiments and required tape-out revisions Performing verification processes with modelling and simulation using industry standard simulators Contributing to cross group communication t...

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Senior R&D Engineer Synopsys Inc

5.0 - 9.0 years

0 Lacs

bhubaneswar

On-site

As a Senior R&D Engineer at Synopsys, you will play a crucial role in characterizing and modeling standard cells for various technologies and foundries. Your deep knowledge of MOSFET and FINFET technologies will be instrumental in conducting quality analysis of characterized liberty and Verilog models, ensuring accuracy in terms of timing, power, and functionality. By validating characterization and simulation tool versions, you will contribute to the enhancement of our standard cell models and tools" reliability. Your commitment to providing daily status updates and ensuring on-time, high-quality releases will be essential in driving innovation and continuous improvement within our engineer...

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Verification Engineer(standard cell characterization) Acesoft Labs

3.0 - 8.0 years

3 - 8 Lacs

Hyderabad

Work from Office

Job Title: Verification Engineer Key Responsibilities: Perform standard cell characterization (up to 40% of the time). Conduct static timing analysis (STA) (approximately 60% of the time). Characterize basic standard (STD) cells. Write ARC (Analysis and Results Capture) for STD cell characterization using PrimeLib and Silicon Smart . Conduct .lib QA checks to ensure model quality and accuracy. Understand circuits at both block-level and full-chip level . Execute STA for DRAM at block level, top level, and cell level. Write constraints and analyze STA reports for setup, hold, and timing violations. Report violations to the design team and take ownership of closure . Support parasitic modeling...

Posted 3 months ago

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