4 Pre Silicon Jobs

Role & responsibilities Job Title / Designation : Project Manager to Associate Director Business Unit : Embedded Engineering Services (EES) Industry Experience Range : 10+ years Job Location : Preferably Bangalore (Open to Pune location) Shift : General Shift (Mon-Fri) Lead strategic technology initiatives for Pre-Silicon and Post-Silicon software validation, bring-up, and platform enablement, owning the practice end-to-end Define and build the competency roadmap for low-level software validation, firmware development, and Board Support Package (BSP) development across silicon platforms (MPUs, SoCs, MCUs) Understand and translate SoC platform roadmaps and customer requirements into detailed execution plans and estimations Collaborate with global semiconductor customers and internal teams for project planning, delivery tracking, and status updates Manage cross-functional stakeholder expectations including silicon design, software, systems, and validation teams Handle issue escalations and risk mitigation across validation and integration cycles Participate in business development by supporting presales activities such as proposal building, solution architecture, and effort estimation Define hiring needs and lead technical interviews to build and grow the practice Drive innovation in validation frameworks, debug techniques, and test automation infrastructure Job Function, Roles & Responsibilities: Experience: 10+ years in embedded systems and software development, with a strong focus on pre-silicon/post-silicon bring-up, validation, and hardware-software integration. Experience in the semiconductor or embedded product engineering services industry is essential, with at least 3 years in a leadership or technical ownership role. ________________________________________ Area of Expertise: Deep experience in pre-silicon validation flows including virtual platforms, QEMU, emulators, and FPGA prototyping Expertise in post-silicon bring-up, including BSP, peripheral driver development, and early board diagnostics Proficient in bootloader (U-Boot, TF-A) and OS bring-up (Linux, Android, RTOS) across architectures like ARM, x86, and RISC-V Strong understanding of SoC microarchitecture, memory hierarchy, interrupt controllers, and hardware abstraction layers Familiarity with debug and trace tools via JTAG, SWD, UART, and high-speed interfaces like PCIe, USB, MIPI, and Ethernet Experience with test automation frameworks, system validation, and hardware/software co-verification Hands-on experience with high-speed interface validation and compliance testing Proficiency with C, C++, shell scripting, and automation using Python/Perl Exposure to emulation platforms such as Cadence Palladium, Synopsys ZeBu, or Mentor Veloce Familiarity with secure boot, TEE, and power/performance validation workflows Background in working with SoCs from NXP, Qualcomm, Intel, AMD, TI, ST, or RISC-V ecosystem partners Proven capability in strategic account management, customer success, presales solutioning, and team building Experience working with American and European semiconductor clients ________________________________________ Nice to Have: Knowledge of hardware/software co-simulation and early software development on virtual platforms Familiarity with chipset validation, lab infrastructure setup, and post-silicon debug Understanding of semiconductor quality standards, ISO/IEC compliance, and functional safety Exposure to AI/ML or DSP accelerators at silicon level ________________________________________

Greeting from Creeno Solutions Pvt Ltd Job Role: Peripheral Design Verification Engineer Location: Bangalore Experience : 510 years Job Type: Full Time Job Description: Pre Silicon DV of Peripheral - SDIO, UART, SPI, QSPI, WDT, GPT, eUSBand could beother low speed peripherals Test plan development, Test development, RTL verification Regression, coverage, use case closure Support power and performance tests development for same peripherals GLS and timing simulation of the same Interested candidates share your resumes to [HIDDEN TEXT]

Job Title: Emulation Engineer Location: Bangalore Experience: 3+ Years Notice Period: Immediate Joiners Preferred Industry: Semiconductors / VLSI / EDA Employment Type: Full Time, Permanent Job Description: We are looking for a highly motivated and skilled Emulation Engineer to join our SoC/Sub-System Pre-Silicon Verification team. The ideal candidate will have hands-on experience with Protium , Palladium , and other leading emulation/prototyping platforms. You will be responsible for enabling accelerated verification using Synthesizable BFMs and VIPs, supporting early software bring-up, and collaborating across cross-functional teams. Key Responsibilities: Develop and deploy Accelerated Verification IPs (VIPs) and Synthesizable Bus Functional Models (BFMs) . Integrate memory models and third-party VIPs in the Palladium and Protium environments. Engage with internal teams and EDA vendors to optimize pre-silicon emulation setup. Understand and support left-shift software validation methodologies. Optimize and debug critical paths in emulation platforms for performance improvements. Manage builds and regression environments for emulation flows. Required Skills: 4+ years of experience in emulation/prototyping platforms (preferably Protium , Palladium , Zebu , or Veloce ). Hands-on experience with Protium (must-have). Familiarity with JTAG , UART , and SpeedBridges (Ethernet/USB). Strong scripting skills in Shell , Python , or Perl . Proficiency in SystemVerilog , UVM , and Accelerated VIP integration. Working knowledge of standard interfaces: AMBA (AXI/APB/AHB), I2C, SPI, UART, Ethernet . Excellent analytical and debugging skills. Strong communication skills and ability to collaborate with global teams. Education: B.E./B.Tech or M.E./M.Tech in Electronics , Electrical , VLSI , or a related field. Keywords: Protium, Palladium, Emulation Engineer, BFMs, Accelerated VIPs, SystemVerilog, UVM, JTAG, UART, Veloce, Zebu, HAPS, Python, Perl, AMBA, AXI, SPI, I2C, Pre-silicon Validation, Semiconductor, SoC, RTL

Greetings from Creeno Job Role: Design Verification Engineer - Peripheral Location: Bangalore Experience : 5 to 10 years Job Type: Full Time Job Description: • Pre Silicon DV of Peripheral - SDIO, UART, SPI, QSPI, WDT, GPT, eUSB and could be other low speed peripherals • Test plan development, Test development, RTL verification • Regression, coverage, use case closure • Support power and performance tests development for same peripherals • GLS and timing simulation of the same Thanks Arun.M Email-ID : Arun.m@creenosolutions.com Con Num:9392352955