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20.0 - 24.0 years
0 Lacs
hyderabad, telangana
On-site
Role Overview: You will be working as a Fellow Silicon Design Engineer at AMD to develop world-class Server products. Your main responsibility will be to define and drive PPA uplift methodologies, develop power optimization methodology for Physical Design Implementation, define PVT corners and frequency targets for next-generation Servers, and have a deep knowledge of micro-architecture, power optimization methodologies, and timing closure. You are expected to have very strong problem-solving skills, broad experience in methodology, and a self-motivated work ethic to provide a cohesive technical vision for PPA improvement methodology. Key Responsibilities: - Define and drive PPA uplift metho...
Posted 3 weeks ago
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