4 Placeandroute Jobs

As a Senior Digital IC Design Engineer at onsemi, you will be a part of the Digital Compute Team, contributing to the development of embedded MCU/DSP systems. Your responsibilities will include architecting, specifying, implementing, simulating, and benchmarking MCU and DSP systems, as well as hardware accelerators. You will collaborate with product integration teams, provide consultation during system integration, and participate in verification and FPGA prototyping activities. Additionally, you will lead project activities, coordinate SDK development with the software team, and contribute to design methodology and flow improvements. To excel in this role, you should possess a minimum BS/MS in Electrical Engineering or a related technical field, along with at least 5 years of relevant work experience in semiconductor product development, including engineering leadership. Proficiency in embedded CPUs such as ARM Cortex and DSP, as well as AMBA bus protocols like AHB/APB, is essential. You should have experience in RTL design of digital IP blocks and systems using Verilog/SystemVerilog. Strong technical document writing skills and excellent written and verbal communication skills in English are also required. Joining our team offers you the opportunity to work in a diverse and inclusive environment that fosters continual learning and growth. We provide a supportive atmosphere, competitive benefits package, and a platform for career advancement within a successful international company. By participating in interesting international projects, you can contribute to building a better future while enjoying a fulfilling work experience. If you are passionate about shaping a better future through innovative technologies and solutions, we invite you to join onsemi and define your future with us.,

Qualcomm India Private Limited is looking for a CPU Physical Design CAD Engineer to join the Engineering Group, specifically in the Hardware Engineering department. As part of NUVIA that is now a part of Qualcomm, you will be at the forefront of reimagining silicon and creating cutting-edge computing platforms. Collaborate with a team of highly skilled engineers to design innovative solutions that redefine performance, energy efficiency, and scalability. To be considered for this role, you should possess a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 6 years of experience in Hardware Engineering. Alternatively, a Master's degree with 5+ years of experience or a PhD with 4+ years of experience will also be considered. In this role, you will be responsible for developing, integrating, and releasing new features within the high-performance place-and-route CAD flow. You will play a crucial part in architecting and implementing methodology improvements to ensure superior power, performance, and area efficiency of custom CPUs. Additionally, you will collaborate with global CPU physical design teams to provide guidance, support, and drive advancements in PPA. The ideal candidate will have a Bachelors/Masters degree in Electrical/Electronics Engineering or Computer Science, along with a minimum of 5 years of hands-on experience in place-and-route of high-performance chips. Proficiency in Tcl and Python, as well as experience with automation and various Physical Design tasks, will be highly valued. Familiarity with advanced technology nodes, digital design, timing analysis, and physical verification is essential. If you have a solid understanding of industry-standard place-and-route tools such as Cadence Innovus and a proven track record of managing place-and-route flows, we encourage you to apply. Qualcomm is an equal opportunity employer and is committed to providing accommodations for individuals with disabilities throughout the application and hiring process. Join Qualcomm in pushing the boundaries of silicon innovation and be a part of a dynamic team that is shaping the future of computing. Contact Qualcomm Careers for further information about this exciting opportunity.,

Qualcomm India Private Limited is seeking a CPU Integration CAD Engineer to join the Engineering Group, specifically in the Hardware Engineering department. As part of the NUVIA team, which is now integrated into Qualcomm, you will be involved in reimagining silicon and developing computing platforms that aim to revolutionize the industry. This role offers the opportunity to collaborate with exceptionally skilled engineers to design innovative solutions that excel in performance, energy efficiency, and scalability. To qualify for this position, you must hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with at least 6 years of experience in Hardware Engineering. Alternatively, a Master's degree with 5+ years of experience or a PhD with 4+ years of experience in a related field will also be considered. The ideal candidate will have 6 to 15 years of experience with a strong academic background. As a CPU Integration CAD Engineer at Qualcomm, you will primarily focus on enabling the floor-planning, physical design, verification, and signoff of Oryon CPU cores. Your responsibilities will include collaborating with global cross-functional teams, developing and implementing flows and methodologies for various design aspects, conducting system tests, recommending improvements, and ensuring the best power, performance, and area outcomes for the silicon products. Preferred qualifications for this role include a Bachelor's or Master's degree in Electrical/Electronics Engineering or Computer Science, extensive experience in high-performance chip development, proficiency in programming languages like Python and TCL, knowledge of data structures and algorithms, automation experience, familiarity with Physical Design tasks, expertise in advanced technology nodes, and proficiency with industry-standard tools such as Siemens/Mentor Calibre and Cadence Innovus. Qualcomm is an equal opportunity employer committed to providing reasonable accommodations for individuals with disabilities during the application and hiring process. The company expects all employees to adhere to relevant policies and procedures, including those related to security and confidentiality. Staffing and recruiting agencies are advised that only individual job seekers should utilize Qualcomm's Careers Site, as unsolicited submissions will not be accepted. For further information about this exciting opportunity, please reach out to Qualcomm Careers for more details.,

You will be part of Kinara, a Bay Area-based venture backed company, founded based on research conducted at Stanford University. Kinara's game-changing AI solutions aim to revolutionize what individuals and businesses can accomplish. Their Ara inference processors, combined with an innovative SDK, offer unparalleled deep learning performance at the edge. This enables the acceleration and optimization of real-time decision-making, emphasizing the importance of speed and power efficiency. By embedding high-performance AI into edge devices, Kinara contributes to creating a smarter, safer, and more enjoyable world. As the field of Edge AI is on the verge of a significant growth phase, Kinara is poised to play a pivotal role in this evolution. Your responsibilities will include the physical design of complex data path and control blocks, development of new techniques and flows for rapid hardware prototyping, creation of flows enabling detailed power estimation, collaboration with the design team to understand placement and recommend implementation options, as well as engagement with external teams to drive and deliver subsystems leading to chip tapeout. Preferred qualifications for this role include a BTech/MTech degree in EE/CS with at least 8 years of experience in Physical Design. You should possess extensive knowledge of Automated synthesis, Technology mapping, Place-and-Route, and Layout techniques, along with skills in Physical verification and quality checks such as LVS, DRC, IR drop, Clock tree synthesis, Power mesh design, and Signal integrity. Familiarity with the latest foundry nodes up to 7nm is desirable, as well as hands-on experience with various design aspects including Synthesis, Place-and-route, Full Chip STA, IO Planning, Floorplan, Power Mesh creation, Bump Planning, RDL Routing, and Low power design flows. Strong expertise in advanced digital design architectures and clocking structures is essential to manage timing and physical design constraints effectively. Furthermore, you should be able to collaborate with designers to analyze and explore physical implementation options for complex designs, possess basic knowledge of DFT techniques, and be familiar with industry-standard PnR, Synthesis, and TCL Scripting tools. Strong communication skills and the ability to work well in a team are also crucial. At Kinara, the work culture is centered around fostering innovation. The environment encourages professionals to tackle exciting challenges under the guidance of technology experts and mentors. The company values diverse perspectives and shared responsibilities, creating a collaborative and inclusive atmosphere where every individual's input is respected and appreciated. If you are passionate about making an impact and are eager to take on rewarding challenges, Kinara awaits your application eagerly. Join Kinara and be a part of a dynamic team that values innovation, collaboration, and personal growth. Your unique skills and experiences will contribute to shaping the future of AI solutions and advancing the field of Edge AI. Share your story with us, and let's work together to create a smarter, safer, and more enjoyable world.,