46 Place Jobs

As an experienced SoC Physical design engineer, you should have a minimum of 3+ years of relevant experience leading SoC Physical design projects across multiple technology nodes, including 5nm for TSMC and other foundries. Your expertise should include hands-on Place and Route (P&R) skills with in-depth knowledge of ICC/Innovus. It is essential that you possess expert knowledge in all phases of Physical Design (PD) from Synthesis to GDSII, with a solid background in Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. Experience in taping out multiple chips and strong familiarity with the top level at the lat...

As a Physical Design Engineer at Qualcomm India Private Limited, you will be responsible for the physical implementation activities for sub-systems, including floor-planning, place and route, clock tree synthesis (CTS), formal verification, physical verification (DRC/LVS), power delivery network (PDN), timing closure, and power optimization. Your role will involve making PPA trade-off decisions for critical cores, ensuring timing convergence of high-frequency data-path intensive cores, and implementing advanced STA concepts. You will work on block-level PnR convergence using tools like Synopsys ICC2/Cadence Innovus and timing convergence in PTSI/Tempus in the latest technology nodes. Additio...

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you will be part of a highly experienced CPU physical design team, responsible for delivering the physical design of critical CPU units to meet challenging goals for frequency, power, and other design requirements for AMD's next-generation processors. Your role will be crucial in a fast-paced environment with cutting-edge technology. Key Responsibilities: - Own critical CPU units and drive to convergence from RTL-to-GDSII, including synthesis, floor-planning, place and route, timing closure, and signoff. - Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoff...

As a Physical Design Engineer specializing in Place and Route (PnR) with 5-8 years of experience, your role will involve the following responsibilities: - Implementing physical design of integrated circuits - Performing place and route activities to meet performance, area, and power targets - Collaborating with cross-functional teams for successful tape-out Your qualifications should include: - Bachelor's or Master's degree in Electrical/Electronics Engineering or related field - Proficiency in industry-standard EDA tools for place and route - Strong understanding of physical design methodologies Please note that the job is based in Bangalore and is a full-time position.,

Role Overview: As a member of the team, you will be part of a group dedicated to pushing boundaries and developing custom silicon solutions for Google's direct-to-consumer products. Your contributions will play a key role in shaping the future of hardware experiences, ensuring unparalleled performance, efficiency, and integration for products loved by millions worldwide. Key Responsibilities: - Develop all aspects of RTL2GDS for ASIC/Mixed signal chips. - Take complete ownership of physical design integration and CAD flow for Mixed signal chip development. - Drive the closure of timing and power/Physical convergence of the design. - Contribute to physical design methodologies and automation ...

Job Description: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to launch world-class products. Your role will require collaboration with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Demonstrating good knowledge of CMOS technology and physical design concepts such as flooplanning, place and route, clock tree synthesis (CTS), physical verification, and static timing analysis (STA). - Taking responsibility for developing CAD tool/flow solutions w...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems for cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. **Key Responsibilities:** - Manage complex subsystems and small teams effectively. - Proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off ...

As an ASIC Physical Design Lead, you will be leading the design of IP/SoC in advanced process technologies, serving global Semiconductor product MNC clients. Key Responsibilities: - Lead the physical design of complex ASIC projects from Netlist to GDSII. - Perform timing closure tasks including synthesis, place and route, and static timing analysis. - Oversee full-chip physical design processes, including floor planning, power grid design, clock tree synthesis, and signal integrity analysis. - Collaborate with the packaging team to ensure seamless integration of the chip design with the package, including pads log management, bump placement, and RDL routing. - Mentor junior engineers and gui...

As an experienced Physical Design Engineer, you will be responsible for executing block level P&R and Timing closure activities. Your primary role will involve owning up block level P&R and performing Netlist2GDS on blocks. You will be working on the implementation of multimillion gate SoC designs in cutting-edge process technologies such as 28nm, 16nm, 14nm, and below. Your expertise should cover various aspects of physical design, including Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning and Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal I...

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Manage complex subsystems and small teams effectively - Demonstrate proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations - Ensure meeting demanding Power, Performance, and...

Role Overview: As a Silicon Design Engineer in the AMD AECG ASIC TFM (Tools Flows Methodology) team, you will collaborate with design experts to develop the best implementation methodologies and flows for the BE flows. Key Responsibilities: - Define and drive key Backend/Physical Design methodologies. - Collaborate with AMD CAD Teams, Design team, and physical design teams to ensure smooth end-to-end design flows. - Assist in defining roadmaps for existing flows and provide technical support for challenging technical debug. - Gather requirements from design teams and devise strategies to address critical technical issues. - Engage in Floor-plan, Physical Implementation of Power-plan, Synthes...

Role & responsibilities Preferred candidate profile HI , we do have openings for Physical design Director at Hyderabad Product company JD: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualif...

Role Overview: You will be working as a Fellow Silicon Design Engineer at AMD to develop world-class Server products. Your main responsibility will be to define and drive PPA uplift methodologies, develop power optimization methodology for Physical Design Implementation, define PVT corners and frequency targets for next-generation Servers, and have a deep knowledge of micro-architecture, power optimization methodologies, and timing closure. You are expected to have very strong problem-solving skills, broad experience in methodology, and a self-motivated work ethic to provide a cohesive technical vision for PPA improvement methodology. Key Responsibilities: - Define and drive PPA uplift metho...

As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. **Key Responsibilities:** - Participating in ASIC development projects with a focus on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. - Creating design experiments, conducting detailed PPA comparison analysis, collaborating with various teams for optimizati...

As an Electronics Technician at our company, your role involves having a good understanding of Electronics basics. You should have hands-on experience in troubleshooting equipment and knowledge of PLC, which is considered an added advantage. Understanding the basics of preventive maintenance for industrial equipment is necessary for this position. Key Responsibilities: - Experience in PLC programming, LabView programming, and the ability to analyze and troubleshoot issues is required - Familiarity with Conveyor Systems is a plus - Analyze and troubleshoot electrical and electronic circuitry of both local and imported equipment - Experience in maintaining and troubleshooting equipment such as...

As a member of our team at Google, you will have the opportunity to work on developing custom silicon solutions that drive the future of Google's direct-to-consumer products. You will be at the forefront of innovation, contributing to the enhancement of Power Performance Area (PPA) through the utilization of machine learning techniques. Your expertise in physical design and machine learning will be pivotal in shaping the next era of hardware experiences, ensuring unparalleled performance, efficiency, and integration. **Key Responsibilities:** - Contributing to the enhancement of Power Performance Area (PPA) through the utilization of machine learning techniques. - Tackling technical challeng...

Role Overview: You will be joining Qualcomm India Private Limited's Hardware Engineering division as a Hardware Engineer, where you will be responsible for designing, optimizing, and testing electronic systems to contribute to the development of cutting-edge products. Collaborating with cross-functional teams, you will work towards creating solutions that drive digital transformation in the smart, connected future. Key Responsibilities: - Manage complex subsystems and small teams - Utilize expertise in RTL2GDS, including Floorplan, place and route (PnR), and sign-off convergence - Meet demanding Power, Performance, and Area (PPA) requirements for complex subsystems and System on Chips (SoCs)...

Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. This position will focus on floor-planning expertise at both block and top levels for industry-leading CPU core designs, with an emphasis on scalability and achieving aggressive Power, Performance, and Area (PPA) targets. Key Responsibilities: - Drive floorplan architecture and optimization in collaboration with PD/RTL teams to maximize PPA - Engage in cross-fun...

As a Hardware Engineer at Qualcomm India Private Limited, you will be responsible for the physical design aspects of ASICs, including Place and Route (PnR) flow and methodology. Your key responsibilities will include: - Executing complete PD ownership from netlist to GDS2, encompassing HM level PV, LEC, low-power checks, PDN, and STA closure - Implementing Voltage Islands and low power methodologies, flows, and implementation - Debugging Congestion and Clock Tree Synthesis (CTS) issues - Utilizing PnR tools such as Innovus/Fusion compiler and flow - Familiarity with Sign-off methodologies and tools (PV/PDN/STA/FV/CLP/Scan-DRC(tk)) - Enhancing existing methodologies and flows - Proficiency in...

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff include formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product arch...

Physical Implementation activities for Sub systems include Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure, and power optimization. You should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Your expertise should include timing convergence of high-frequency data-path intensive Cores and advanced STA concepts. You should be well-versed with Block level PnR convergence using Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in the latest technology nodes. A good understanding of clocking architecture is essential. Collaboration with design, DFT, and PNR tea...

Qualcomm India Private Limited is seeking a Hardware Engineer to join the Engineering Group. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Your role will involve launching cutting-edge, world-class products by collaborating with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or ...

You will be responsible for Physical Implementation activities for sub systems, including Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure, and power optimization. Your role will involve ensuring good exposure to PD implementation of PPA critical Cores and making the right PPA trade-off decisions. You should possess knowledge in timing convergence of high-frequency data-path intensive Cores and advanced STA concepts. Additionally, familiarity with Block level PnR convergence using tools like Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus is essential. A good understanding of clocking architecture is required...

You will be responsible for designing Material Handling Equipment, preparing Bill of Materials, creating models, collecting quotations for standard parts, drafting materials, and coordinating projects with production and other departments. To excel in this role, you should have experience in designing Roller Conveyors, Belt Conveyors, Gantry Systems, Special Purpose Machines, Turn Tables, Turnover Devices, Pick and Place systems, and possess proficiency in SolidWorks software. Additionally, you must have excellent communication skills to interact effectively with clients and vendors, demonstrate leadership qualities, and be able to work collaboratively with the team. Ideal candidates must ho...

Qualcomm India Private Limited is a leading technology innovator in the Engineering Group, specifically in Hardware Engineering. As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems. This includes circuits, mechanical systems, digital/analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to develop cutting-edge products. Collaboration with cross-functional teams is essential to meet performance requirements and develop solutions. To qualify for this role, you should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with at least...