812 Physical Verification Jobs - Page 7

Location: Bangalore, Hyderabad, Noida, and Coimbatore. Skills: Soc level floorplanning, partitioning, timing budget generations, power planning, SOC PnR, CTS, block integration Handling timing closure of high frequency blocks. Expertise in signoff closure Timing with SI and OCV, Power, IR and physical verification at both block and chip level. Understanding constraints and fixing techniques. Experience in physical verification Understanding SI prevention, fixing methodology and implementation. Proficient in Synopsys ICC or Cadence or Mentor Olympus and Atoptech tool set. Experience in Design Automation and UNIX system. Experience in Tcl/ PERL is a plus. Primary Skills: Able to handle Soc PNR...

As a Store Manager in the Transformer Industry, your role will involve the following responsibilities: - Receiving all store activities including inward, outward, material issue, RGP, NRGP, auditing, and physical verification. - Ensuring that all incoming materials are physically counted, measured, or weighed to verify specifications as per the purchase order. - Preparing GRN for vendor bill passing procedures. - Ensuring proper storage, billing of items, codification, and preservation of the same. - Preparing reports of discrepancies in case of any short supply, wrong supply, or transit damages. - Coordinating with the production department and quality control department for incoming materi...

Role Overview: As a Senior Physical Design Lead/Architect at Eximietas, you will be responsible for working on advanced node designs and collaborating with various customers to achieve high-performance, area, and power targets. Your expertise in physical design and problem-solving skills will be crucial in developing innovative solutions for critical designs. Additionally, you will play a key role in developing and implementing methodologies for placement, clock-tree synthesis, and routing processes. Key Responsibilities: - Work on 10nm/7nm/5nm or lower nodes designs with different customers to meet performance targets - Solve customers" problems for critical designs to achieve desired perfo...

Role Overview: You will be responsible for independently executing mid-sized customer projects in the field of VLSI Frontend, Backend, or Analog design with minimal supervision. As an individual contributor, you will own tasks related to RTL Design/Module and provide support and guidance to engineers in various areas such as Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Your role will involve anticipating, diagnosing, and resolving problems while coordinating with cross-functional teams to ensure on-time quality delivery approved by the project manager and client. Additionally, you will be expected to automate design tasks flows, write scri...

As an AMS Design, Verification and Layout professional with 4+ years of experience in the Semiconductor domain, your role will involve: - Designing analog and mixed-signal circuits like amplifiers, data converters, PLLs, and regulators. You will conduct detailed transistor-level simulations including DC, AC, transient, PVT, and Monte Carlo. - Developing and maintaining behavioral models using Verilog-A/AMS. You will also create comprehensive testbenches for mixed-signal co-simulation with digital blocks. - Executing block-level and top-level verification, encompassing functional, corner-case, noise, and signoff simulations to ensure design adherence to specifications in all scenarios. - Crea...

As an Analog Layout Design Lead with 7+ years of relevant work experience, you will be responsible for Analog Layout in advanced process technologies, catering to global Semiconductor product MNC clients. **Key Responsibilities:** - Hands-on knowhow in analog and mixed-signal layout techniques - Experience with Cadence Layout tools (Virtuoso) and Mentor Graphics verification tools (Calibre) - Proficiency in Custom Analog Layout of various circuits such as I/O, Amplifiers/OPAMP, ADCs/DACs, LDOs, Bandgaps & Bias Circuits, Temperature Sensor, and Oscillators - Conducting Physical Verification (LVS, DRC, ERC, ANT with Calibre) - Recognizing and rectifying problematic circuit and layout structure...

As a Physical Design Engineer at Kinara, you will play a crucial role in the development of complex data path and control blocks. Your responsibilities will include: - Developing new techniques and flows to rapidly prototype hardware blocks. - Implementing flows that allow for detailed power estimation. - Collaborating with the design team to understand placement and recommend implementation options. - Engaging with external teams to drive and deliver subsystems leading to chip tapeout. Preferred qualifications for this role include: - BTech/MTech EE/CS with 8+ years of Physical Design experience. - Extensive knowledge of Automated synthesis, Technology mapping, Place-and-Route, and Layout t...

We are looking for Physical Design Engineers for Tranzium Semi Pvt.Ltd. An experienced Physical Design Engineer who has knowledge of STA/Synthesis/Floor Planning/ Place and Route/Timing Closure/Physical Layout/Automation/Power and Signal Integrity.

Role Overview: As the ASIC Back-End Head at Wipro Limited, your primary responsibility will be to lead the physical design and implementation of Application-Specific Integrated Circuits (ASICs). You will be tasked with ensuring optimal performance, power efficiency, and manufacturability of ASICs. Key Responsibilities: - Define and execute the ASIC back-end design roadmap with a strategic approach. - Oversee the RTL to GDSII flow management, including synthesis, floorplanning, placement, routing, timing closure, and sign-off. - Ensure Physical Design Optimization by meeting Power, Performance, and Area (PPA) targets. - Utilize EDA Tool Expertise by working with Synopsys, Cadence, and Mentor ...

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems including circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. Key Responsibilities: - Minimum 10 to 14 years of experience in physical design from product-based/EDA companies - Expertise in DDRPhy /PCIE-high speed interface PD or 3DIC - Experience with Timing Signoff using SNPS/CDNS tools - Knowledge of PDN: IR signoff and Physical veri...

Responsible for leading Physical Design and Timing Closure of low power SoCs. Responsible to achieve die area, performance, power goals for hierarchical blocks and top. Drive physical design implementation which includes package co-design , floor planning, power grid design and signoff, place and route, timing closure, physical verification checks. Influence tools, flows and methodology activities to improve upon QoR. Interact with cross-functional team members to improve design, methodology and process aspects. Enable next generation of place and route engineers via mentoring and thought leadership. Your Profile You are best equipped for this task if you have: Hands-on experience in physica...

As a Physical Verification Engineer for SOC/blocks, your role involves performing physical verification for SOCs, cores, and blocks, which includes tasks such as DRC, LVS, ERC, ESD, DFM, and tapeout processes. You will be responsible for addressing critical design and execution challenges related to physical verification and sign-off. It is essential for you to have a comprehensive understanding of physical verification and sign-off workflows and methodologies. Collaboration with PNR engineers to achieve sign-off at various stages of the design process is also a key aspect of your role. Your qualifications and skills should include proficiency in physical verification for SoC/full-chip and b...

Physical Design and Timing closure of Infineon SoCs targeted for IoT and MCU markets. Job Description In your new role you will: This position is for Physical Design and Timing Closure of complex, low power SoCs targeted for IOT and MCU markets. Candidate will be responsible to drive die area, performance, power goals for hierarchical blocks/Top. Candidate will work on various stages of physical design implementation which includes floorplanning, IO planning, packager co-design, power grid design, place and route, clock tree synthesis, timing closure, Static/Dynamic IRdrop, physical verification checks. Candidate is expected to have deep understanding and hands-on experience in implementing ...

We are looking for a skilled professional with 5-15 years of experience to join our team as an SCOM in IDESLABS PRIVATE LIMITED, located in [location to be specified]. The ideal candidate will have a strong background in recruitment services and excellent communication skills. Roles and Responsibility Manage and coordinate recruitment activities to meet client requirements. Develop and implement effective recruitment strategies to attract top talent. Build and maintain relationships with clients and candidates for successful placements. Conduct interviews and assessments to identify the best candidates. Collaborate with internal teams to ensure seamless recruitment processes. Analyze recruit...

We are looking for a skilled SAP DRC Engineer with 7 to 12 years of experience. The ideal candidate will have expertise in the SAP DRC module and BTP of SAP, SD, FI, E-Doc Cockpit, and project management skills. This position is available in PAN India, including Bangalore, Hyderabad, Chennai, Noida, Pune, and Gurgaon. Roles and Responsibility Design and implement SAP DRC solutions to meet business requirements. Collaborate with cross-functional teams to ensure seamless integration of SAP DRC with other modules. Develop and maintain documentation for SAP DRC projects. Provide training and support to end-users on SAP DRC functionality. Troubleshoot and resolve technical issues related to SAP D...

We are looking for a skilled professional with 05-20 years of experience to join our team as a (VLSI) Physical Design (PD) expert in Bangalore, Hyderabad, Kochin, and Pune. The ideal candidate will have hands-on experience with Netlist2GDSII Implementation, including floor planning, placement, CTS, routing, STA, power integrity analysis, physical verification, and programming in Tcl/Tk/Perl. Roles and Responsibility Implement Netlist2GDSII for various projects. Perform floor planning, placement, CTS, routing, STA, and power integrity analysis. Conduct physical verification and ensure successful project delivery. Collaborate with cross-functional teams to meet project goals. Develop and maint...

We are looking for a skilled professional with 7 to 15 years of experience in the field of Physical Design to join our team. The ideal candidate will have a strong background in Floor Planning, Innovus, Fusion Compiler, and programming skills in Tcl/Tk/Perl. Roles and Responsibility Develop and implement physical design methodologies for submicron technology nodes. Utilize expertise in Floor Planning, Innovus, and Fusion Compiler to optimize design performance. Collaborate with cross-functional teams to ensure seamless integration of physical design with other components. Apply knowledge of physical design principles and methodologies to improve design quality. Troubleshoot and debug complex...

Job Description: Bachelor s Degree in Electrical/Electronic Engineering or equivalent. Work experience in PDK development. Expertise in SKILL, Perl programming languages. Knowledge of deep sub-micron CMOS processes, device physics and layout design. Experience with custom IC Virtuoso platform to create layout test structures, to validate verification rules and to troubleshoot errors. Experience in developing PDK device library components and definitions including SKILL parameterized cells (Pcell), symbols, CDF, callbacks, simulation/netlisting. Experience with physical verification tools for DRC, LVS and parasitic extraction, PVS, Assura is a plus. Working knowledge of revision control softw...

As a Store Executive at the company, your primary responsibility will be to ensure precise materials handling, timely deliveries, and optimal resource management to maintain seamless store operations while complying with safety and statutory regulations. **Key Responsibilities:** - Conduct day-to-day activities in adherence to relevant policies, processes, and standard operating procedures - Implement and maintain established Standard Operating Procedures (SOPs) for inventory and warehouse management - Supervise the receipt division ensuring meticulous reception of materials and validate incoming receipts - Manage the transfer of materials to storage locations, ensuring safety and security p...

Responsibilities: Collaborate with cross-functional teams on project deliverables. Optimize timing closure through innovative techniques. Perform physical verification using Synopsys tools.

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

You have a job opportunity for the Manager / Senior Role Physical Design Engineer position in Hyderabad. Your primary responsibilities will include: - Performing IP/Block level PnR activities from Netlist to GDS-II - Demonstrating good knowledge of all PnR activities such as Floor-planning, Placement, CTS, Routing, Timing closure (STA), and signoff checks like FEV, VCLP, EMIR, and PV - Executing all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file - Handling signoff convergence, block-level Timing Signoff, ECO generation, and Power signoff - Having knowledge of high performance and low power implementation methods (preferred) - Expertise in ICC2/Fusion Compil...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...