834 Physical Verification Jobs - Page 22

MTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team of Server SOC and is responsible for delivering the physical design of tiles to meet challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and and problem-solving skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time...

At Mott MacDonald, we are proud to be part of an ever-changing global industry, delivering transformative work that s defining our future. It s our people who power that performance. We re a collection of leading experts who combine our different expertise to stay ahead of the curve and move the industry forward. With so many opportunities to learn, grow and excel, the possibilities are as varied as every individual to shape the career that s right for you. Whether you want to pursue excellence in a specialism or broaden your experience with flexible roles across our business, you re connected to a community of global experts championing you to be your best. Key Responsibilities: Supports Ma...

In your new role you will: Responsible for leading Physical Design and Timing Closure of low-power SoCs. Responsible to achieve die area, performance, power goals for hierarchical blocks and top. Drive physical design implementation which includes package co-design, floor planning, power grid design and signoff, place and route, timing closure, physical verification checks. Influence tools, flows and methodology activities to improve upon QoR. Interact with cross-functional team members to improve design,methodology and process aspects. Enable next generation of place and route engineers via mentoring and thought leadership. You are best equipped for this task if you have: Hands-on experienc...

Main Tasks (1) Physical verification of Gold Packets, Cash including Vault Cash and Foreign Currency as to its correctness with the system records. (2) Checking of ornaments as to its quantity, weight, quality and purity taken for pledge during the current gold inspection period. (3) Checking of greater than 5 months gold packets as to its quantity, weight, quality and purity for which gold inspections were done earlier. (4) Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. (5) Verifying whether the ornaments pledged under all schemes are solid ornaments and LP/SP ornaments are not accepted for pledge under any schemes. (6) Verification and report...

Physical verification of Cash in hand, Foreign currency, and Gold packets as to its correctness with the Computer records. Checking of ornaments as to its quantity, weight, quality, and purity taken for pledge during the current gold inspection period. Random checking of gold packets as to its quantity, weight, quality, and purity for which gold inspections were done earlier. Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. Checking and reporting whether any overdue gold loans are re pledged under higher rate Verifying whether all the ornaments pledged under discharge scheme are solid ornaments, low purity and stoned ornaments are not accepted fo...

Physical verification of Cash in hand, Foreign currency, and Gold packets as to its correctness with the Computer records. Checking of ornaments as to its quantity, weight, quality, and purity taken for pledge during the current gold inspection period. Random checking of gold packets as to its quantity, weight, quality, and purity for which gold inspections were done earlier. Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. Checking and reporting whether any overdue gold loans are re pledged under higher rate Verifying whether all the ornaments pledged under discharge scheme are solid ornaments, low purity and stoned ornaments are not accepted fo...

Main Tasks (1) Physical verification of Gold Packets, Cash including Vault Cash and Foreign Currency as to its correctness with the system records. (2) Checking of ornaments as to its quantity, weight, quality and purity taken for pledge during the current gold inspection period. (3) Checking of greater than 5 months gold packets as to its quantity, weight, quality and purity for which gold inspections were done earlier. (4) Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. (5) Verifying whether the ornaments pledged under all schemes are solid ornaments and LP/SP ornaments are not accepted for pledge under any schemes. (6) Verification and report...

Job Overview: Cadence Design Systems is looking for a highly motivated software engineer to work with the R&D engineering team in the Digital & Signoff Group. R&D Software Engineering role in Physical Verification area is a multi-faceted position encapsulating a mix of physical verification software development, algorithm development, software debugging, performance optimization, accuracy analysis, GUI development and integration with layout/schematic editors. R&D engineers collaborate with a large team of EDA professionals across multiple geographical regions to create and deliver best in class next generation software for physical IC application. R&D engineers work on complicated applicati...

Key Responsibilities: Floor planning: Develop and optimize floorplans for ASIC designs, ensuring optimal placement of cores, macros, and I/O cells while considering performance and manufacturability. Place & Route (P&R): Perform place-and-route tasks, optimizing for timing, power, and area, ensuring congestion-free routing and maximizing PPA (Performance, Power, Area). Static Timing Analysis (STA): Carry out static timing analysis to identify violations and work on techniques for timing closure such as resizing, retiming, or re-optimization. Power Analysis & Optimization: Perform power analysis, targeting low-power designs using techniques such as clock gating, power gating, and low-power st...

SE NIOR SILICON DESIGN ENGINEER (AECG ASIC PD ENGINEER) THE ROLE : The position will involve working with a very experienced physical design team and is responsible for delivering the physical design of blocks/tiles to meet challenging goals for frequency, power and other design requirements for AMD next generation chips in a fast-paced environment on cutting edge technology. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-pl...

SMTS SILICON DESIGN ENGINEER (AECG ASIC TFM Lead) T HE ROLE : As a Silicon Design Engineer in the AMD AECG ASIC TFM (Tools Flows Methodology) team, you will work with design experts to come up with the best implementation methodologies/flows and work on development and support of the BE flows. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. K EY RESPONSIBLITIES : Define and drive key Beckend/Physical Design methodologies. Partner with AMD CAD Teams, Design team, physical design teams to ensure seamless end to end design flows. Wo...

Job Description : Hands on experience in Block level PnR convergence with Synopsys ICC2/Cadence Innovus and timing convergence in PTSI/Tempus In this position, candidate is expected to lead all block/chip level PD activities including floor plans, placement, CTS, optimization and routing techniques, RC extraction, STA, EM/IR DROP, PV Familiar with deep sub-micron designs below 10nm preferred BE/B Tech/ME/M TECH

* Supervise activity related to unloading of Stores material Material to be received and issued to plan as per their requirement. Ensure minimum wastage in material handling. Ensure the material should be issued against proper requisition. Ensure proper physical verification on regular basis to avoid stock discrepancy System posting for Material receipt and issue. To ensure that material should be checked immediately by QC after receiving of material. Ensure to cross verify the Gate Inward entry vs System Entry. Transaction of inventory and WIP must be reported to accounts department. Develop tools for the identification of material received like sticker etc. To ensure that material reach to...

Role Description: This is a full-time on-site role for a Senior Lead Physical Design Engineer based in Hyderabad. The Senior Physical Design Engineer will be responsible for tasks related to physical design, physical verification, logic design, circuit design, and RTL design in the development of silicon products. Qualifications: He/She should be able to do block level PNR including PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Minimum of 7-15 years of exper...

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning (for hierarchical designs) , placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks and be able to fix the violations . S hould have worked on 4 5nm , 28nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design eng inee rs. Interface with front-end ASIC teams to resolve issues. Excellent comm...

MTS SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The Physical Design Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. KEY RESPONSIBILITIES: Imp...

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: In this role, the Engineer will apply and lead Broadcoms proven design methodology and milestone flow to meet Broadcoms rigorous criteria for achieving Right-first time silicon. Candidate should have very good experience in layout activities of block and level. Should be well experienced in floor-planning, partitioning, placement, clock tree synthesis, route and physical verification. Responsibilities include, but not limited to: Understanding of SoC f...

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: In this role, the Engineer will apply and lead Broadcoms proven design methodology and milestone flow to meet Broadcoms rigorous criteria for achieving Right-first time silicon. Candidate should have very good experience in layout activities of block and level. Should be well experienced in floor-planning, partitioning, placement, clock tree synthesis, route and physical verification. Responsibilities include, but not limited to: Understanding of SoC f...

SE NIOR SILICON DESIGN ENGINEER THE ROLE: As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the physical integration and verification team , you will work closely with the physical design implementation, IP teams and fab contacts to achieve quality tapeout and first pass silicon success. THE PERSON: A successful candidate will work on block level and SoC physical integration, verification and tapeout with physical design engineers. The candidate is expected to be detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Work with PD team on subsystem and block level physical verification and signo...

Experience into STA and timing closure/signoff experience with PD domain skill-set/knowledge. Candidate should be able to understand the timing constraints, analyze design details, analyze timing reports from prepcts to postcts stages, in-depth concepts of 14nm technode STA analysis, DCD knowledge. Candidate is preferably expert in PT and Tempus tools. Education Requirements B. Tech / M. Tech (ECE) Shift General Work Week Monday to Friday Joining time Immediate to 90 Days

Hands on exp in store physical work.Unloading of metal sheets.Maintain stock.Issue material to production.Sent material to supplier.Stock reco.Make GRN.Delivry challan. Material follow up from supplier.Walkin interview call Amit - 8180907096 Hr

Main Tasks (1) Physical verification of Gold Packets, Cash including Vault Cash and Foreign Currency as to its correctness with the system records. (2) Checking of ornaments as to its quantity, weight, quality and purity taken for pledge during the current gold inspection period. (3) Checking of greater than 5 months gold packets as to its quantity, weight, quality and purity for which gold inspections were done earlier. (4) Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. (5) Verifying whether the ornaments pledged under all schemes are solid ornaments and LP/SP ornaments are not accepted for pledge under any schemes. (6) Verification and report...

Main Tasks (1) Physical verification of Gold Packets, Cash including Vault Cash and Foreign Currency as to its correctness with the system records. (2) Checking of ornaments as to its quantity, weight, quality and purity taken for pledge during the current gold inspection period. (3) Checking of greater than 5 months gold packets as to its quantity, weight, quality and purity for which gold inspections were done earlier. (4) Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. (5) Verifying whether the ornaments pledged under all schemes are solid ornaments and LP/SP ornaments are not accepted for pledge under any schemes. (6) Verification and report...

Main Tasks (1) Physical verification of Gold Packets, Cash including Vault Cash and Foreign Currency as to its correctness with the system records. (2) Checking of ornaments as to its quantity, weight, quality and purity taken for pledge during the current gold inspection period. (3) Checking of greater than 5 months gold packets as to its quantity, weight, quality and purity for which gold inspections were done earlier. (4) Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. (5) Verifying whether the ornaments pledged under all schemes are solid ornaments and LP/SP ornaments are not accepted for pledge under any schemes. (6) Verification and report...

Main Tasks (1) Physical verification of Gold Packets, Cash including Vault Cash and Foreign Currency as to its correctness with the system records. (2) Checking of ornaments as to its quantity, weight, quality and purity taken for pledge during the current gold inspection period. (3) Checking of greater than 5 months gold packets as to its quantity, weight, quality and purity for which gold inspections were done earlier. (4) Verification of Gold Loan pledge/release documents and reporting of anomalies if any observed. (5) Verifying whether the ornaments pledged under all schemes are solid ornaments and LP/SP ornaments are not accepted for pledge under any schemes. (6) Verification and report...