812 Physical Verification Jobs - Page 2

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Should have indepth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS Should have worked on latest technology nodes (14nm or lesser) Should have worked on block level and top-level designs Good to have worked on designs without a customer flow. Strong problem-solving skills and communication skills. Ability to mentor and work closely with junior engineers Will be responsible for building a highly capable team of PD engineers at Ignitarium.

You have been selected for a role as a Lead in SoC Physical Design at a dynamic company, 7Rays Semiconductor Private Ltd. With over 3 years of relevant experience, your expertise in SoC Physical design across multiple technology nodes, including 5nm for TSMC & Other foundries, will be highly valuable. Your responsibilities will include: - Demonstrating excellent hands-on P&R skills with expert knowledge in ICC/Innovus - Utilizing expert knowledge in all aspects of PD from Synthesis to GDSII - Demonstrating a strong background in Floorplanning, Placement, CTS, Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure - Experience at taping out multiple chips, especially...

We are hiring a Test Chip Design Engineer with hands-on experience in Test Vehicle development and Physical Design implementation. This role involves working on test chips used in IP validation, characterization, and silicon bring-up for one of the worlds leading semiconductor clients. If you are passionate about PD, STA, and PV, and want to work on cutting-edge process technologies, this opportunity is for you! --- Key Responsibilities: Execute Test Chip/Test Vehicle design for IP validation and characterization. Perform Physical Design (PD) activities floorplanning, placement, CTS, routing, and timing optimization. Conduct Static Timing Analysis (STA) and ensure timing closure across corne...

Role Overview: At ISB, Finance holds a crucial role in overseeing and managing the financial aspects of the institute, including handling legal matters and ensuring statutory compliances are met. Key Responsibilities: - Manage processing of travel and local conveyance claims submitted by employees, including tracking, settlement, and reconciliation of employee advances and corporate credit card usage. Ensure policy compliance and follow up on outstanding advances and claims. - Oversee fixed assets accounting, including capitalization, tagging, disposal, and maintenance of the fixed asset register. Manage monthly depreciation run and adjustments, coordinate physical verification of assets, mo...

As a Hardware Engineer at Qualcomm India Private Limited, you will be responsible for independent planning and execution of Netlist-to-GDSII. Your role will involve a good understanding of basics of static timing analysis and well-versed with Block level and SOC level timing closure (STA) methodologies, ECO generation, and predictable convergence. You will collaborate closely with design, DFT, and PNR teams to resolve issues related to constraints validation, verification, STA, Physical design, and more. Your exposure to high frequency multi-voltage design convergence and good understanding of clock networks will be essential for this role. Additionally, your circuit level comprehension of t...

As an experienced physical design engineer with a B. Tech / M. Tech (ECE) background and 3 to 13 years of experience, you will be responsible for a variety of tasks including top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs). Your expertise in SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, as well as experience in working on 65nm or lower node designs with advanced low power techniques, will be crucial for success in this role. Key Responsibilities: - Provide technical guidance and mentoring to phy...

Job Description: Physical Design Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS Should have worked on the latest technology nodes (14nm or lesser). Must have experience in Static timing analysis Must have experience in Physical verification and appropriate fixes Should have worked on block level and top-level designs Good to have worked on designs without a customer flow. Strong problem-solving skills and communication skills. Ability to mentor and work closely with junior engineers Relevant Experience Required :- 7+Years Available Locations :- Bangalore, Kochi and Chennai

Strategically manage warehouse in compliance with company’s policies & vision Oversee receiving, warehousing, distribution & maintenance operations Setup layout & ensure efficient space utilization Liaise with clients, suppliers and transport company

As an Internal Auditor at our manufacturing plant sites, your role will involve conducting internal audits of purchase, accounts, and inventory processes. You will be responsible for assisting in preparing audit reports and presenting findings to senior management or clients. Your key responsibilities will include identifying areas of process improvement, cost saving, and control gaps, as well as verifying adherence to company policies, statutory norms, and accounting standards. In addition, you will perform physical verification of stock, fixed assets, and other plant records and support the implementation of internal controls and risk mitigation strategies. Coordination with plant teams, v...

Role Overview: You are expected to execute any sized customer projects independently with minimum supervision and guide team members technically in any field of VLSI Frontend Backend or Analog design. As an Individual contributor, you will take ownership of any one or more tasks/modules related to RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc. and lead the team to achieve results. Your responsibilities will include completing assigned tasks successfully and on-time within the defined domain(s), anticipating, diagnosing, and resolving problems, coordinating with cross-functional teams as necessary, ensuring on-time quality...

Job Title: Digital Backend Design Engineer Location: Bangalore Experience: 610 Years Job Description We are seeking an experienced Digital Backend Design Engineer with strong hands-on expertise in digital backend design flows, physical verification, low-power methodologies, and scripting. The candidate will work with leading EDA tools from Cadence and Synopsys , contributing to complex digital design projects. Key Responsibilities Perform digital backend design using Cadence and Synopsys tools. Conduct physical verification using Mentor Calibre or Cadence PVS tools. Apply low-power design techniques and implement UPF methodology. Develop and maintain scripts in TCL, Shell, Perl, or Python to...

The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm. Qualifications 10+ years experience in high performance analog layout in advance CMOS process nodes Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example) Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology Familiarity in various physical verification checks D...

In depth knowledge of electrical engineering fundamentals including deep sub-micron CMOS device operation and characteristics, understanding of advancing modeling techniques Hands on experience with simulation using tools such as HSPICE, Finesim/PrimeSim or Spectre Understand any digital/mixed signal block such as SRAM, I/O using specification Define timing arcs like setup, hold, propagation delay Extract netlist through StarRCXT Ability to write SPICE test bench (compatible to simulators like HSpice, FineSim, Spectre etc) for any digital block from the scratch. Write measurement statements to get required timing and power data Run simulations using SPICE simulator Expertise in Perl, Shell, ...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning (for hierarchical designs) , placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks and be able to fix the violations . S hould have worked on 4 5nm , 28nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design eng inee rs. Interface with front-end ASIC teams to resolve issues. Excellent comm...

Job Summary: We are seeking a detail-oriented and proactive Stores Executive to manage and streamline daily warehouse operations. The ideal candidate should have hands-on experience with ERP systems, preferably Epicor (SAP/Oracle/Others is an added advantage), strong analytical skills, and proficiency in Excel and MIS reporting. Key Responsibilities: Goods Receipt Note (GRN): Timely and accurate processing of incoming materials. Material Issues: Handling issuance of materials to production and other departments. Kitting: Preparation and management of kits for production as per BOM. Stock Verification: Conducting regular physical stock checks and reconciliation. Gate Pass Management: Handling...

Responsible for high performance microprocessor blocks RTL to GDSII implementation Perform block level synthesis, floor-planning, placement and routing. Close the design to meet timing, power budget and area. Implement ECO's to address functional bugs and timing violations. Team player, with good problem solving and communication skills. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5-8 years industry experience in physical design methodology. Good knowledge and hands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing . Should be knowledgeable in physical ...

Responsible for high performance microprocessor blocks RTL to GDSII implementation Perform block level synthesis, floor-planning, placement and routing. Close the design to meet timing, power budget and area. Implement ECO's to address functional bugs and timing violations. Team player, with good problem solving and communication skills. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8-10 years of industry experience in physical design methodology. Good knowledge and hands-on experience in physical design methodology, which includes logic synthesis, placement, clock tree synthesis, routing. Should be knowledgeable in phy...

Engineer with a good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR, Formal Equivalence Handling different PNR tools - Synopsys Fusion Compiler, ICC2, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk, Cadence Genus, Innovus Provide technical support to other teams PREFERRED EXPERIENCE: 3-5 years of p...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

General Summary: Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...