820 Physical Verification Jobs - Page 16

As a senior leader in the central physical design team at Marvell, you will shape the long-term vision for physical design capabilities and infrastructure in alignment with the company-wide technology strategy. You will lead RTL-to-GDSII implementation for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification (DRC/LVS). Your role will involve providing strategic leadership and technical direction to physical design teams, ensuring successful and timely tapeouts of complex, high-performance SoCs. Mentoring and developing engineering talent will be a key asp...

Our client, Micron Technology, a global leader in memory and storage solutions, is seeking a Layout Design Engineer to join their HBM Team in Hyderabad, India. As a Layout Design Engineer at Micron Technology, you will play a crucial role in developing innovative technologies for applications such as artificial intelligence and high-performance computing solutions, specifically High Bandwidth Memory. In this position, you will collaborate with cross-functional teams across Micron's global footprint on multiple projects. Responsibilities include designing and developing critical analog, mixed-signal, and custom digital blocks, as well as providing full chip level integration support. You will...

We are seeking enthusiastic individuals to join our team at Alphawave Semi, where we enable the next generation of digital technology by accelerating critical data communication. As a Physical Design Engineer in our IP Scaling (IPS) organization, you will play a key role in creating customized IP for our expanding customer base, delivering high-speed interconnect solutions for various industries such as High Performance Computing and Artificial Intelligence. Your responsibilities will include driving the backend process through the entire implementation flow, with a focus on floor-planning, power planning, low-power design, place & route optimization, clock tree synthesis, static timing veri...

Job Summary Physical verification engineer for SOC/blocks Key Responsibilities Physical verification for SOCs, cores, and blocks, including DRC, LVS, ERC, ESD, DFM, and tapeout processes. Address critical design and execution challenges associated with physical verification and sign-off. Have a comprehensive understanding of physical verification and sign-off workflows and methodologies. Partner with PNR engineers to achieve sign-off at various stages of the design process. Qualifications and Skills Proficient in physical verification for SoC/full-chip and block-level processes, including DRC, LVS, ERC/PERC, DFM, OPC, and tapeout. Comprehensive experience and understanding of all stages of t...

Job Overview As a part of in Arm&aposs Solutions Engineering group we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities Synthesis, Physical design...

Job Title : Material Handler Division Weir Minerals Location : Bangalore Onsite Purpose of Role: 1. To ensure accurate inventory management and operational efficiency through effective material handling, documentation, safety compliance, and continuous improvement practices in the stores function Why choose Weir: (Required) Be part of a global organization dedicated to building a better future: At Weir, the growing world depends on us. It depends on us constantly reinventing, quickly adapting and continually finding better, faster, more sustainable ways to access the resources it needs to thrive. And it depends on each of us doing the best work of our lives. It s a big challenge but it is ex...

Strong on Digital Design, SV, UVM. Hands-on experience in any of the DV protocols like PCIe, USB 3.0, DDR 3/4/5, AMBA, Ethernet (10G/100G), SATA, and MIPI (CSI/DSI), UFS, CXL Also Hiring PD, RTL, DFT Apply& Share resume to mansoor@hisoltech.com

As a Physical Design Engineer, you will be responsible for top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. You should have experience working on 65nm or lower node designs with advanced low power techniques such as Voltage Islands, Power Gating, and substrate-bias. In this role, you will provide technical guidance and mentoring to Physical Design Engineers and interface with front-end ASIC teams to resolve issues related to low power...

We are looking for highly skilled Physical Verification Engineers to join our team. The ideal candidates will have extensive experience in physical verification tasks such as DRC, LVS, and parasitic extraction using tools like Mentor Graphics Calibre. You will be working on cutting-edge technologies and collaborating with cross-functional teams to ensure seamless tapeouts and compliance with foundry design rules. Your main responsibilities will include implementing Physical Verification with a focus on hard macro/core finishing activities. You must have led and been primarily responsible for physical verification checks, fixing, and sign-off. It is essential to have an excellent understandin...

You should have a minimum of 6 years of experience in physical verification, with expertise in calibre tools for DRC, LVS, and antenna design. It is essential to possess good communication skills and experience in tape outs in 5nm and below technologies. The ability to collaborate effectively within a team and past experience working with block PD owners will be beneficial for this role. If you meet these qualifications and are interested in this opportunity, please send your CV to jyothi.malge@codersbrain.com. Your skillset should include proficiency in physical verification, design rule checking (DRC), and layout versus schematic (LVS).,

Eximietas is currently seeking Senior Physical Design Leads/Architects with at least 10+ years of experience to join their team in Visakhapatnam. Immediate joiners or those with a short notice period are preferred for this role. Qualifications: - A minimum of 10+ years of experience in Physical Design using mainstream P&R tools. - A Bachelor's or Master's Degree in Electronics, Electrical, Telecom, or VLSI Engineering. In this role, you will: - Work on designs using advanced nodes such as 10nm/7nm/5nm or lower, collaborating with various customers to meet performance, area, and power targets. - Develop flow and methodology for placement, clock-tree synthesis, and routing. - Provide training ...

You are a passionate and inventive analog circuit design engineer with a deep-rooted curiosity for emerging technologies and industry-leading semiconductor processes. You thrive in dynamic, collaborative environments and are recognized for your ability to balance technical depth with practical implementation. Your expertise in I/O development, ESD (Electrostatic Discharge), and Latch-Up (LU) robustness sets you apart, and you are eager to build solutions that power the next generation of high-performance chips. You bring a strong foundation in FinFet, FDSOI, and BCD technologies, and you are excited by the prospect of owning projects end-to-end from conceptual design through to silicon quali...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Physical Implementation activities for Sub systems "which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Strong expertise in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes Good understanding of clocking architect...

We are looking for a skilled SAP DRC Consultant with 19 years of experience to join our team at Forward Eye Technologies. The ideal candidate will have a strong background in SAP DRC and be able to work effectively in a fast-paced environment. Roles and Responsibility Collaborate with cross-functional teams to design and implement SAP DRC solutions. Provide technical expertise and support for SAP DRC projects. Develop and maintain documentation for SAP DRC implementations. Troubleshoot and resolve complex technical issues related to SAP DRC. Conduct training sessions for end-users on SAP DRC functionality. Work closely with stakeholders to understand business requirements and develop solutio...

KEY RESPONSIBLITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC LVS), Crosstalk Analysis, EM/IR, Formal Equivalence Deft at Handling different PNR tools - Synopsys Fusion Compiler, ICC2, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk, Cadence Genus, Innovus. Tasks to include Full Chip Level Floor planning, Bus / Pin Planning, feed-thru planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, Physical Verification and Sign Off Identify complex technical problems, break them ...

Qualcomm India Private Limited is a leading technology innovator that drives digital transformation to create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to launch world-class products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. The ideal candidate should hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field. We are seeking PDN engineers with EMIR and PG planning expertise and a mi...

As part of this role, you will be responsible for ensuring accurate and timely accounting of inventory transactions in SAP. This includes conducting regular inventory reconciliations between physical stock and SAP records, as well as monitoring and analyzing inventory variances. In case of discrepancies, you will take corrective actions in coordination with the Regional Team. You will also play a key role in supporting monthly and annual inventory valuation and closing activities. This will involve coordinating and supporting physical stock counts, cycle counts, and audits. Additionally, you will be responsible for validating scrap, obsolete, and non-moving inventory provisions in line with ...

You should be a PNR Lead with over 8 years of experience, based in Bangalore. Your role will involve handling Full chip PnR tasks such as timing, congestion, and CTS issues, with an understanding of IO ring, package support, and multi-voltage design. It is crucial to have a deep understanding of synthesis, place & route, CTS, timing convergence, IR/EM checks, and signoff DRC/LVS closure. Your responsibilities will include independently planning and executing all aspects of physical design, such as floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, and DFM. You must have experience ...

You should possess a B.Tech/M.Tech degree in Electronics and Communication Engineering with 8 to 20 years of experience in physical design of semiconductor chips. The role is based in Hyderabad and follows a general shift schedule with no work from home option. Your responsibilities will include top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks such as timing and functional ECOs, SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. You must have prior experience working on 65nm or lower node designs, implementing adv...

You are a Senior Physical Design Engineer with at least 6 years of experience, and your primary responsibility will be to lead the physical implementation of advanced semiconductor projects. Your role is crucial in shaping the silicon realization of cutting-edge designs, ensuring successful integration from RTL to tape-out. Your responsibilities include providing technical guidance and mentoring to physical design engineers, interfacing with front-end ASIC teams to resolve issues, and working on low power design techniques such as Voltage Islands, Power Gating, and Substrate-bias. You will also be responsible for timing closure on DDR2/DDR3/PCIE interfaces and have excellent communication sk...

As an Analog Layout Engineer at AISemiCon, you will play a critical role in the design and development of high-performance analog and mixed-signal integrated circuits (ICs). Your main responsibility will be to create layout designs for analog blocks and ensure their adherence to design rules, specifications, and performance targets. You will collaborate closely with cross-functional teams, including circuit designers, verification engineers, and process engineers, to achieve optimal layout implementation. We are seeking individuals with a strong passion for analog layout, deep expertise in IC design, and a keen eye for detail. The key responsibilities for this role include, but are not limit...

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