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Synopsys (India) Private Limited logo
RTL Design Engineer- High Speed IP Synopsys (India) Private Limited

5.0 - 8.0 years

5 - 8 Lacs

Noida, Uttar Pradesh, India

On-site

Lead and contribute to digital design of high-speed serial interface PHY IPs (USBx, PCIex, Ethernet, Display, HDMI) Define and enhance micro-architecture based on customer, analog, system, or interface layer requirements Implement RTL in Verilog, ensuring code quality with tools like Spyglass (Lint, CDC, RDC) Collaborate with verification teams to validate functionality and handle edge/corner cases Develop timing constraints and drive synthesis, DFT insertion, and timing closure with physical design teams Own blocks from specification through delivery with strong micro-architecture and RTL skills The Impact You Will Have: Enhance performance and robustness of PHY IPs powering next-gen electr...

Posted 4 months ago

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