17034 Perl Jobs - Page 24

As a key member of the USIS Operations delivery team you will facilitate key customer adoption of our offline products and solutions. In this role you will translate business requirements, configure, test, and deploy them within our proprietary cloud-based systems. You will have the opportunity to work closely with professional services, technical support, and product management teams. You will play a key part in the Fulfillment organization's evolution, joining a team dedicated to understanding current processes and then applying technology and automation to reimagine our workflow. This transformation will shift our focus from operational systems to analyzing outcomes and proactively identi...

Make an impact with NTT DATA Join a company that is pushing the boundaries of what is possible. We are renowned for our technical excellence and leading innovations, and for making a difference to our clients and society. Our workplace embraces diversity and inclusion – it’s a place where you can grow, belong and thrive. Your day at NTT DATA The Associate Software Applications Development Engineer is an entry level subject matter expert, responsible for assisting with the development of new applications and providing support in the improvement of existing applications based on the needs of the internal organization and / or external clients. Key responsibilities: Assists with development of ...

This is an incredible opportunity to be part of a company that has been at the forefront of AI and high-performance data storage innovation for over two decades. DataDirect Networks (DDN) is a global market leader renowned for powering many of the world's most demanding AI data centers, in industries ranging from life sciences and healthcare to financial services, autonomous cars, Government, academia, research and manufacturing. "DDN's A3I solutions are transforming the landscape of AI infrastructure." – IDC “The real differentiator is DDN. I never hesitate to recommend DDN. DDN is the de facto name for AI Storage in high performance environments” - Marc Hamilton, VP, Solutions Architecture...

Design Verification Engineer | 8 To 14 years | Bangalore/ Hyderabad Key Responsibilities: · You will be part of the team verifying IPs and SoCs leading to first Si success. · Manage and lead a team of Verification engineers · IP verification is coverage driven using latest industry standard methodologies and HVLs. · Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases. · Code coverage, Functional coverage and assertions are desired. · ARM based SoC verification experience is an added advantage. · Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus. · Multiple positions w...

Job Summary: 5+ Years of experience with traditional database development on Oracle/MSSQL/PostgreSQL Experience with databases other than Oracle/MSSQL/PostgreSQL, such as Vertica, MongoDB, or HDFS/HIVE Hands on experience with ETL tool – Pentaho/Informatica/Talend/SSIS or Data Stage Experience working closely with Business Intelligence, Finance, Marketing and Sales teams Knowledge of scripting languages such as Perl or Python is good to have Experience with the reporting platforms such as Tableau or Cognos will be an added advantage Knowledge about Web analytics or Business Intelligence is good to have Knowledge of GCP is good to have Excellent communication and documentation skills Self-mot...

As the Turbo IP (TIP) Verification technical Lead, you will own and drive the verification strategy and execution for IP. This role requires deep technical expertise, leadership skills, and the ability to manage complex verification projects across global teams. You will collaborate with architecture, design, firmware, and validation teams to ensure first-pass success and high-quality deliverables. Responsibilities Develop detailed test plans, coverage strategies, and verification metrics Drive adoption of best practices and continuous improvement in verification flows Lead and mentor a team of verification engineers, providing technical guidance and career development Oversee development of...

Hi, I'm Arpana D.R, your Recruiter and guide to joining CSG! We are excited to learn more about you and your unique background. Design, develop, and enhance features in SingleView Billing & Charging applications, ONLINE RATING Work extensively on SingleView Configuration layer / EPM. Analyze business requirements and translate them into technical solutions. Write efficient, reusable, and maintainable code. Perform unit testing, support system & UAT testing, and fix defects. Debug complex production and non-production issues with minimal supervision. Participate in code reviews and provide constructive feedback. Collaborate with cross-functional teams (L2/L3 support, QA, Business). Assist SDE...

Entry-level position. Must have bachelor’s degree in Computer Science or related field 1-3 yrs of experience in development of SingleView Telecom Billing and Charging, Online Rating. Experience of SingleView Configuration layer /EPM. Knowledge of one or more relevant programming language, typically C, C++, Perl, Java, SQL(Oracle preferred), XML Assist in designing, coding, and testing software applications. Collaborate with senior developers and learn best practices & professional concepts. Debug and fix software issues under supervision. Basic understanding of programming languages and software development concepts. Experience working in L3 shared services / multi-project environments is a ...

We are looking for a Physical Design Engineer STA & Synthesis to support and drive timing and synthesis activities from Synthesis to GDSII. The ideal candidate will have strong hands-on experience in Static Timing Analysis, timing closure, and close collaboration with Physical Design and RTL teams to ensure high-quality silicon delivery. Key Responsibilities Perform RTL/Netlist synthesis and support Synthesis to GDSII flow Own Static Timing Analysis (STA) across all design stages Create, validate, and maintain SDC constraints Drive timing closure by analyzing setup/hold, clock, and path-related issues Work closely with PnR teams on timing fixes and ECOs Support and analyze Clock Tree Synthes...

Role Overview We are seeking an experienced DFT Lead Engineer to own and drive Design for Testability (DFT) architecture, implementation, and sign-off for complex ASIC / SoC designs. The ideal candidate will bring strong hands-on expertise in MBIST/LBIST, Scan, ATPG, and lead teams to ensure high test coverage and silicon quality. Key Responsibilities • Lead DFT architecture definition and implementation for ASIC/SoC designs • Own Scan insertion, Boundary Scan (JTAG), and test logic integration • Drive MBIST / LBIST architecture, insertion, and validation • Generate and debug ATPG patterns to achieve high fault coverage • Perform DFT simulations (scan, MBIST/LBIST, at-speed) and debug failur...

Description Do you want to be in the forefront of engineering big data solutions that takes data models to the next generation? Do you have a solid analytical thinking, metrics driven decision making and want to solve problems with solutions that will meet the growing worldwide need? We are looking for top notch Data Engineers to build real time data analytical platforms using big data tools and AWS technologies like Spark, EMR, SNS, SQS, Lambda, Kinesis Firehose, DynamoDB Streams. The ideal candidate relishes working with large volumes of data, enjoys the challenge of highly complex technical contexts, and, above all else, is passionate about data and analytics. He/she is an expert with dat...

Bachelor's / Master's degree in engineering from EEE / E&C with expertise in mixed-signal or CMOS circuit design Expertise in analog blocks like power management DC-DC convertor, LDOs Expertise in designing ADC / DAC/ PLLs or Experience in simulation or characterization of IO cells Design and architect CMOS analog and mixed-signal integrated circuits Simulate designs with state-of-the-art CAD tools Document designs and simulation results Experience with high-speed SERDES circuits Knowledge of layout issues Experience with circuit simulators (HSPICE, Spectre, etc) Experience with Cadence Design Environment is an asset Working knowledge of PERL and UNIX shell scripting languages is an asset

IO Layout Location : Bangalore Job Role: Very Good Knowledge on GPIO layouts and performing Layout verifications. Good Exposure to Technologies of GF 55nm , UMC 55nm , TSMC 28nm, TSMC 12nm etc. Should have Solid experience in Layout design and Verifications of all the blocks of a GPIO library like Driver, predriver, receiver, ESD clamps. Should be in position to technically drive the Layout Implementation starting with floorplanning, placement , IO ring Implementation , IO Bus design . Very good hands on knowledge on the Cadence Virtuoso layout verification suite relevant to the above mentioned technologies. Very good understanding of ESD & LU concepts and corresponding Layout Implementation...

DV(SOC) SOC verification, GLS and low power SoC Level verification experience of atleast 1 SoC UVM, System Verilog, VCS exposure Understanding SoC concepts like pinmux/memory map Experience (years) : 4+ years Education Qualification : BE/ME

Are you a Python expert who has built scalable software solutions? Do you know how to handle heavy volumes of data and process the responses as APIs? Have you worked in scaling AI models or across AI solutions? Lexsi.ai stands at the forefront of AI innovation, revolutionizing AI for mission-critical businesses by building explainable, safe, and aligned systems that scale responsibly. Our mission is to create AI tools that empower researchers, engineers, and organizations to unlock AI's full potential while maintaining transparency and safety. As a Software Development Engineer on our backend platform team, you will be at the heart of our engineering efforts. This is not a typical entry-leve...

Job Description: Amazon India is seeking a driven and detail-oriented Business Analyst to join the Abuse Prevention vertical of the India Returns team. This high-impact team is focused on identifying and eliminating fraudulent or abusive return behaviors, directly influencing the business’s profitability and customer trust. As a Business Analyst, you will play a key role in supporting Product Managers and Business Intelligence Engineers with data-driven insights for critical initiatives. This role offers a dynamic environment where you’ll work on complex problems, automate reporting processes, and help drive decisions through analytics and visualization. Duration : 6 Months Key Responsibilit...

Job Description Summary Come Join Our Software Integration Team!! Our main activity consists in setting up GE Vernova software in different environments for internal and external customers, supporting project activities and providing expertise in tailoring the components based on requirements. We have a hybrid work environment as we work from home, the office and travel to customer sites as needed. The integration engineer is a key member in all projects, being engaged throughout the full lifecycle (Development, Factory Acceptance Tests, Site Acceptance Tests, Cutover, Support). Job Description GE Vernova allows us to bring a significant contribution to the Worldwide Electrical Energy contex...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to ...

Job Title: Physical Design Engineer (ASIC / SoC / Mixed-Signal) Experience: 5 – 15 years Location: Bangalore Job Type: Full-time About the Role: We are looking for an experienced Physical Design Engineer to join our backend/layout implementation team. The ideal candidate will work on translating RTL/netlist designs into production-ready physical layouts while optimizing for PPA, timing closure, signal integrity, and manufacturability. This role requires solid hands-on experience in ASIC/SoC Physical Design flows and tape-out. Key Responsibilities: Drive the complete Physical Design flow from netlist to GDSII: floorplanning, placement, routing, CTS, optimization. Perform Static Timing Analysi...

Role: System Architect Key Responsibilities Gather system requirements for various business aligned projects Participate in the system design discussion – regional and global including the architecture review board approval process Analyze system capacity based on historical trends and growth projections Write and maintain solution design documents including high level system design diagram Understand bank standards including server configuration, network topology, middleware components, and security policies Have up-to-date knowledge on latest technology Document and maintain implementation procedure Key Requirements Solid and proven experience in infrastructure hosting design Solid experie...

Requirements: 5 to 8 year experience in DFT feature verification (such as JTAG, MBIST, SCAN, fuse, IO-PHY loopback testing) Strong background in Verilog, SystemVerilog (SV), SVA, UVM verification methodologies and C++ Strong debug skills and experience with debug tools such as Verdi. Experience with EDA simulation tools like Synopsys VCS, Cadence NCSIM, Verdi Experience with scripting languages like Tcl/Perl/Ruby/Python Working knowledge of Unix/Linux OS, file version control. Additional skills: Experience in ATE debug, Synthesis, formal/LEC, or power analysis will be a plus. Strong analytical/problem solving skills and pronounced attention to details Knowledge of STA Constraints for various...

Technical Skills: Well versed with the timing closure (STA), timing closure methodologies. Pre/Post-layout constraint development to timing closure. Handshake with the design team and develop functional/DFT constraints. IP level constraint integration. Multi-voltage/Switching aware corner definitions. RC/C model selection understanding. Abstraction expertise like Hyperscale/ILM/ETM. RC Balancing and scaling analysis of full chip clock. RC Balancing and scaling analysis of critical data paths. Good automation skills in PERL, TCL and EDA tool-specific scripting. DMSA @ full chip and custom scripts for timing fixes Qualification: BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical ...

FactSet creates flexible, open data and software solutions for over 200,000 investment professionals worldwide, providing instant access to financial data and analytics that investors use to make crucial decisions. At FactSet, our values are the foundation of everything we do. They express how we act and operate, serve as a compass in our decision-making, and play a big role in how we treat each other, our clients, and our communities. We believe that the best ideas can come from anyone, anywhere, at any time, and that curiosity is the key to anticipating our clients’ needs and exceeding their expectations. Your Team's Impact One of FactSet’s key differentiators has always been the incorpora...

At AlgoSec, What you do matters! Over 2,200 of the world’s leading organizations trust AlgoSec to help secure their most critical workloads across public cloud, private cloud, containers, and on-premises networks. Join our global team, securing application connectivity, anywhere. We are hiring a Professional Services engineer to join our professional Services team and work with APAC/EMEA based customers. Reporting to : Professional Services Team Lead, India Location : Gurgaon, India (Home office/Hybrid) Direct Employment Responsibilities Design, Customize and implement the PS offered solution, hands-on, within the agreed upon timelines. Work with global enterprise customers. Develop know-how...

At AlgoSec, What you do matters! Over 2,200 of the world’s leading organizations trust AlgoSec to help secure their most critical workloads across public cloud, private cloud, containers, and on-premises networks. Join our global team, securing application connectivity, anywhere We are hiring a Software Developer to join our Suite Team. Reporting to: R&D Team Leader Location: Gurugram, India (Hybrid) Direct employment Responsibilities Design and develop backend services using Java and the Spring framework Work on microservices and RESTful APIs, ensuring scalability and high performance Build and run services in Docker containers within Linux environments Collaborate with the Devices team to ...