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1 - 6 years

4 - 9 Lacs

Bengaluru

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Please find below JD: Hands-on experience with testing and validating Server hardware platforms (Dell, HPE, Supermicro etc.); however, experience with Dell PowerEdge servers is highly preferred. Installation and configuration of various ancillaries such as NIC, HBAs, RAID Controllers & related firmware • Good exposure to in-band and out-of-the-band system management, GPUs Ability to handle and manage large-scale test labs with the above-mentioned hardware and components Good exposure to server validation. Preferably with functional and component integration testing. Well-versed with test planning, test execution monitoring, preparing informative dashboards to showcase technical progress, forward-looking plans and anticipating, and highlighting risks with testing. Excellent in communicating with all stakeholders and mentoring and guiding the project team on the technical front. Experience in Storage, COMMS (Networking), GPU, iDRAC Experienced to configure test beds or servers in lab and execute test cases. Experience running automation test cases. JIRA, Confluence, Qtest. 5 days working from customer lab, no WFH.

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3 - 6 years

20 - 35 Lacs

Noida

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Experience with physical verification checks DRC, LVS, Antenna, ERC, PERC, ESD etc. Experience in PnR tools like ICC/Innovus with regards to physical convergence must. Good understanding of PD flows and overall backend tool flow would be beneficial. Understanding sign-off PDV tools like PDK Concepts, SVRF, Calibre and DRV. TCL/PERL Scripting is plus. Hands on experience :Innovus/Fusion Compiler , Tech lef is preferable. Interested candidates can share their resumes to shubhanshi@incise.in

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8 - 10 years

10 - 12 Lacs

Bengaluru

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Job Description The candidate will be expected to perform Development and support for DRC/LVS/PEX/PERC runset(ruledeck) generation on Intel's process. Development/support of ICV/Calibre/Pegasus/PVS runset (rule deck) for DRC/LVS/PEX/PERCConduct the L0QA of the codes. Bring in run time efficiency, automation and solve customer issues on rusets. Develop and maintain DRC/LVS/extraction flow, working closely with various design/development groups. Perform in a dynamic and challenging environment with drive and creativity. Qualifications Candidate needs to have:- B.tech or M.tech with 8+ years of experience in DRC/LVS/PEX/PERC runset development/QA on ICV/Calibre/Pegasus tools/flow.- Strong CMOS concepts- Strong debugging and scripting skills- Strong team working and leadership skills.- Layout tools: Virtuoso, CalibreDRV, IC Work Bench- Runset Development: Calibre, PVS, ICV, Pegasus- Scripting :Unix, Perl, Python or TCL

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