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5.0 - 8.0 years
15 - 30 Lacs
pune
Work from Office
Job Title: Android CI/CD Build & Integration Engineer Experience: 5 to 8 Years Location: Pune Key Responsibilities: Design, develop, and maintain Android CI/CD pipelines for build, integration, and release processes Manage and optimize Android build systems , including AOSP, SDK, and PDK builds Develop and maintain build and automation scripts using Python, Bash, and Make Handle Yocto builds and manifest file management Integrate supplier/vendor software into Android/Linux-based infotainment systems Troubleshoot build, integration, and deployment issues across CI/CD pipelines Collaborate with cross-functional teams to ensure smooth integration and timely releases Ensure build quality, stabil...
Posted 1 week ago
6.0 - 8.0 years
0 Lacs
hyderabad, telangana, india
On-site
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...
Posted 2 weeks ago
6.0 - 10.0 years
22 - 37 Lacs
bengaluru
Work from Office
Mirafra Technologies are Looking out for PDK Engineers - SVRF Coding experience. Please find the JD Below: Job Purpose: Integrate , enhance , maintain and deploy foundry Physical Verification decks (DRC/LVS/Extraction) for internal Analog and Digital design teams and provide support for the same. Develop, deploy, maintain and support new physical verification flows across mature and advanced technology nodes Principal Accountabilities: Adapt, update, enhance, QA and release foundry DRC/LVS/ Parasitic Extraction/PERC rundecks for Renesas internal customers. Develop and run QA Test cases for DRC/LVS and other PV flows. Provide support to internal customers (Analog Design teams & Digital P&R de...
Posted 1 month ago
5.0 - 10.0 years
40 - 50 Lacs
bengaluru
Hybrid
Position Title: Senior EDA Engineer Cadence Virtuoso, SKILL/CDF, Tool Integration Role Overview: We are seeking a highly skilled EDA Engineer with solid experience in Cadence Virtuoso environments and a deep understanding of OpenAccess databases, SKILL scripting, foundry PDK/CDK integration, and schematic/layout tool automation. This role will collaborate closely with AI/EDA development teams to build seamless design flows and robust automation for our AI-powered analog design platform. Key Responsibilities: Develop, maintain, and optimize analog/mixed-signal IC design flows in Cadence Virtuoso and related EDA tools. Create, modify, and optimize SKILL scripts for automation of layout, schema...
Posted 2 months ago
5.0 - 10.0 years
0 Lacs
gujarat
On-site
You are a skilled embedded non-volatile memory (eNVM) Bitcell Layout Design Engineer / Lead interested in joining the eNVM team at Tata Electronics Private Limited (TEPL) to lead the development and optimization of eNVM bitcells. In this role, you will be responsible for designing layout and implementing eNVM bitcells across a wide range of Foundry CMOS technologies, from 130nm to 28nm, including BCD and advanced FinFET technology nodes. Your work will contribute to building high-yield, high-performance memory IP for various applications in automotive, IoT, and mobile markets. To excel in this position, you should ideally have 5-10 years of experience in the semiconductor industry with exper...
Posted 4 months ago
10.0 - 14.0 years
0 Lacs
karnataka
On-site
You are a Senior Manager responsible for leading the Reference Design team for GlobalFoundries" Fotonix platform, a cutting-edge Silicon Photonics technology. Your role involves driving innovation, creating high-quality reference designs, and ensuring the success and growth of the platform. You will collaborate with stakeholders, manage project timelines, and provide technical leadership to the team. Key Responsibilities - Lead and manage a team of designers in developing Silicon Photonics Reference Designs. - Collaborate with cross-functional teams to define project requirements, timelines, and deliverables. - Drive innovation and development of new silicon photonics technologies and soluti...
Posted 4 months ago
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