458 Pcie Jobs - Page 18

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3 + years of experience in Functional Verification of Processors or ASICs. Minimum 2+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Madhu to update ASICs specific skills Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

We are seeking an experienced Design Verification Engineer to join our team in the semiconductor industry. The ideal candidate will have 3+ years of hands-on experience in verification, including writing UVM tests, debugging, and working with industry-standard simulators. You will be responsible for building and executing comprehensive verification testbenches, ensuring the correctness of complex digital designs, and working with cross-functional teams to improve design quality. Knowledge of Video, Display, GPU, DDR, PCIe, USB, and scripting is an added advantage. Locations: Bangalore, Malaysia, China, Singapore Key Responsibilities: UVM Test Writing & Debugging: Develop, write, and debug UVM-based testbenches for verifying RTL designs. Create comprehensive tests to validate functionality and performance. Simulation & Debugging: Use industry-standard simulators to simulate designs, analyze simulation results, and troubleshoot issues. Debug RTL and testbenches to ensure correctness and high-quality verification. Behavioral Model for Scoreboard: Develop and write behavioral models for scoreboards to monitor and compare expected results against actual results in simulations. UVM Testbench Building: Build and maintain reusable, modular, and scalable UVM testbenches for functional verification of complex digital systems. Client Project Experience: Contribute to at least one client project, working with teams to meet customer specifications and deadlines while ensuring top-quality verification processes. RTL Coding (Bonus): Knowledge of RTL coding is a plus, as it will help in understanding design implementation and improving testbenches. Programming Knowledge (Bonus): Knowledge of C/C++ is advantageous for scripting and enhancing testbenches, improving efficiency and automation. Domain Knowledge (Bonus): Familiarity with Video, Display, GPU, DDR, PCIe, USB protocols and systems, contributing to better design understanding and verification coverage. Scripting Skills: Utilize scripting languages such as Perl, C, and Shell to automate tasks, create verification scripts, and enhance verification flows. Desired Profile of the Candidate: Experience: Minimum 3 years and up to 8 years of experience in digital verification, ideally in the semiconductor industry, with a strong focus on UVM-based verification and debugging. Verification Expertise: Strong experience in writing and maintaining UVM-based testbenches, developing behavioral models, and working with simulators for functional verification. Project Experience: At least one client project experience, ensuring exposure to real-world verification challenges and customer-facing responsibilities. Coding Skills: Knowledge of RTL coding is a plus, providing insight into the implementation of designs and enhancing verification capabilities. Programming Languages: Knowledge of C/C++, scripting with Perl, Shell, or C to automate and enhance verification processes is a strong advantage. Domain Expertise: Experience or knowledge in areas like Video, Display, GPU, DDR, PCIe, and USB is beneficial for handling specialized verification requirements. Required Skills & Qualifications: Technical Skills: Expertise in UVM test writing , simulation, debugging, and building UVM testbenches . Strong understanding of behavioral modeling for scoreboards. Experience with industry-standard simulators for RTL verification. Proficient in scripting using Perl , C , Shell , or similar languages. Optional but Beneficial Skills: Knowledge of RTL coding and C/C++ programming. Experience with Video , Display , GPU , DDR , PCIe , and USB technologies and protocols. Education: Bachelors or Masters degree in Electronics, Electrical Engineering, Computer Engineering, or a related field. Key Competencies: Strong experience in UVM-based verification and debugging. Ability to build and maintain UVM testbenches and work on simulation and behavioral modeling . Familiarity with industry-standard simulators and verification methodologies. Strong problem-solving skills to identify and resolve complex design and verification issues. Effective communication skills to collaborate with cross-functional teams and clients. Ability to work independently as well as part of a team in a fast-paced environment.

About The Role : This role is within Intel's Client Computing Group. We are seeking an experienced Memory Validation and Debug Lead to join our post silicon validation team. In this role, you will lead memory subsystem ( DDR5 / LPDDR5) validation and debug efforts and ensure high-quality, reliable memory systems within our advanced silicon products. You will work closely with cross-functional teams, including design, MRC , EV (analog) verification, and validation teams, to enable higher memory speeds , validate new feature and identify , analyze and resolve memory issues. Your expertise will be essential in enhancing product quality, optimizing memory performance, and driving innovation. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis. Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues. Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds). Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: M.tech/ME with 7+ years of relevant industry experience hands on with pre or post silicon SOC validation. Key Skills:Memory sub-system validation, DDR5/LPDDR5, IP, debugging, architecture. Preferred Qualifications: Understanding of Intel system architecture and hands-on experience validating and debugging SoC issues.Requirements listed would be obtained through a industry relevant job experience Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

About The Role : The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful.Your responsibilities will include but not limited to:Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications Candidate will have a Bachelors degree in Computer Engineering/ Computer Science or Electrical Engineering with 6+ years of experience -OR- a Masters degree in Computer Engineering Computer Science or Electrical Engineering with 4+ years of experience with C and Object Oriented Software design including algorithms and data structures Knowledge of Software development practices and quality standards Experience with Unix Windows based SW development tools . Experience developing bus functional models for unit level verification or Verification IP development Preferred Qualifications Proficiency in System C SystemVerilog UVM and ESL modeling methodologies Proficiency in HW design and verification methodologies Working knowledge of highspeed HW protocols eg PCIe UPI DDR Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world.

About The Role : DEG/IMSG seeks an experienced pre-Si verification engineer for its PCIe IP development organization, a dynamic team with a history of outstanding execution and industry-leading accomplishments. We are looking for an enthusiastic individual with a strong background in all aspects of IP development and a proven capacity for understanding new technologies, to help deliver on our charter as Intel's center of innovation for IO and Accelerator technologies. You will be responsible for, but not limited too. Working with a high performing team to deliver fully functional IPs on Intel's latest process technology to reduce product risk for various enterprise IPs including PCI express and accelerators. Interfacing with architects and senior design/val team members to develop new features. Roles and responsibilities Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches (BFM, Scoreboard, tests) , and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification Qualifications Qualification Candidate should possess a bachelor's degree in electrical, Electronics, Computer Engineering or Computer Science or any related field with 10+ years' experience -OR - a Master's degree Electrical, Electronics, Computer Engineering or Computer Science or any related field with 8+ years of experience -OR- PhD degree in Electrical, Electronics, Computer Engineering with 5+ years of experience. Mandatory Skills :- SV /UVM, Mirco, test bench , test plan creation , coverage analysis , debugging/problem solving skills . Preferred skills :- BFM development , third party VIP integration , evaluation of VIP's , formal verification skills and c++ Preferred Protocol knowledge on PCIE , Cxl* , Solid verbal/written communication skills.o Effective team player with continuous learning mindset. Be willing to balance multiple tasks. Prior experience in IP development teams would be an added advantage. The candidate must be able to work independently and be self-motivated to identify, innovate upon, architect and deploy Formal Verification solutions. Experience in BFM development. Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world.

Senior Software Engineer The Software Engineering team delivers next-generation application enhancements and new products for a changing world. Working at the cutting edge, we design and develop software for platforms, peripherals, applications and diagnostics all with the most advanced technologies, tools, software engineering methodologies and the collaboration of internal and external partners. Join us to do the best work of your career and make a profound social impact as a Senior Software Engineer on our Software Engineering Team in Bangalore. What you ll achieve As a Senior Software Engineer, you will be responsible for developing sophisticated systems and software basis the customer s business goals, needs and general business environment creating software solutions. You will: Contribute to the design and architecture of new or re-engineered software/storage environments Prepare written software/storage specifications for sophisticated products from architectural diagrams and documents Build and review design, functional, technical and/or user documentation, as needed Develop, review and implement test strategies for software products and systems Take the first step towards your dream career Every Dell Technologies team member brings something unique to the table. Here s what we are looking for with this role: Essential Requirements 5-8 years of software development experience Strong firmware / System development background with strong C/C++ development/debug skills and Strong in Embedded Linux programming, OS Internals, memory management, IPC, thread programming, and embedded application software development. C++, IPMI, DMTF, RedFish, CIM, CIMOM, Linux. Solid understanding of SNMP, and IPMI protocols. Experience/exposure to I2C, MCTP, NCSI, PLDM, and uEFI protocol is a plus. Working experience with peripheral hardware devices like PCIe Switch, NIC, GPU, FPGA, Memory Controllers, etc. is a plus. Very good server system architecture understanding along with Power and Thermal domain expertise. Desirable Requirements Bachelor s degree/ Masters degree

Responsibilities Candidate should have experience in software development role, tools development, firmware development or validation tools development. Candidate shall design and develop algorithms for Post Silicon Validation of next generation IBM server processors, SOCs and ASICs. He will be the key interface on processor Bringup Activities and own key debugs of architecture and micro-architecture issues during the bring up/power on phase. The candidate will be expected to interface with multiple stakeholders in hardware design teams, lab teams, performance teams and characterization teams. Candidate must drive coverage closure by developing comprehensive test plans and strategies and drive to achieve coverage goals while interacting with stakeholders, verif teams and design teams. He/She must be skilled in utilizing object-oriented programming skills in C/C++ and scripting languages like Python/Perl to write complex test scenarios to automate/optimize. Candidate must possess experience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Proficiency in emulator env/FPGA validation is preferred. She/he must possess excellent communication skills and understand agile processes. The candidate must have an eagerness and curiosity to learn and be willing to code and participate hands on. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Technical Expertise:Very proficient in C programming, Strong Scripting skills. Over 10 years experience in hands on Software development using C, C++. Computer Architecture Knowledge:In-depth knowledge of computer architecture, including processor core design specifications, instruction set architecture, and logic verification. Multi-Processor Cache Coherency:Experience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Operating Systems and Concepts:Atleast 5 years experience with Multithreading, context switching, memory management related development Preferred technical and professional experience IO device drivers, firmware exposure(NIC controller, PCIe device controllers, ASIC FW development experience) ARM architecture RISC V architecture Spike simulator experience, QEMU simulator

Responsibilities As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Requirements:Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 5+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog

Responsibilities As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Requirements:Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Requirements:Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 5+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Responsibilities As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Requirements:Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 8+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog

Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Owning and Driving execution of subunits/unit level Verification Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Work with logic and development teams to identify test scenarios, create test plans and execute the scenarios. Work with IBM Verification community to improve Verification methodology. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 + years of experience in Functional Verification of processors or ASICs. Minimum 9+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading teams Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification. Good understanding of the Server System

Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of Processors or ASICs. Minimum 3+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug Formal verification experience

Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES andPHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

About The Role : Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification. Qualifications Bachelor in Electronics & communication Engineering, Computer Engineering, and/or Computer Science plus 4 to 6 years of relevant work experience, Masters in Electrical Engineering, Computer Engineering, and/or Computer Science plus 3 to 5 years of relevant work experience. Experience owning a testplan and executing to verification closure. 4 plus years of experience in SystemVerilog, OVM/UVM. Knowledge of AMBA protocols (AXI, AHB, APB). Knowledge of PCIe is a plus. Knowledge of power aware verification is a plus. Strong scripting skills. Excellent verbal and written communication skills. Exposure to Formal verification techniques is a plus. Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

About The Role : Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification. Qualifications Candidate should possess a bachelor's degree in electrical, Electronics, Computer Engineering or Computer Science or any related field with 6+ years' experience-OR -a Master's degree Electrical, Electronics, Computer Engineering or Computer Science or any related field with 4+ years of experienceMandatory Skills :- SV /UVM, Mirco, test bench , test plan creation , coverage analysis , debugging/problem solving skills .Preferred skills :- BFM development , third party VIP integration , evaluation of VIP's , formal verification skills and c++ Preferred Protocol knowledge on PCIE , Cxl ,Solid verbal/written communication skills.o Effective team player with continuous learning mindset.Be willing to balance multiple tasks. Prior experience in IP development teams would be an added advantage.The candidate must be able to work independently and be self-motivated to identify, innovate upon, architect and deploy Formal Verification solutions. Experience in BFM development Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

About The Role : Designs, develops, integrates, tests, validates, and/or debugs software across multiple layers of the software stack spanning firmware, drivers, operating systems, middleware, frameworks, algorithms, and applications/UI for a specific technology, product/platform, and/or market segment, including the development of software to enable specific features, capabilities, solutions, reference platforms, or Intel products. Qualifications Bachelor's or Master's degree in Computer Science, Electronics and communication Engineering or a related field over 5+ years of experience. 5-6 yrs Experience as individual contributor role.Engineer will be working on Bluetooth SW and tools developmentExperience in C\C++ coding.Experience in embedded Systems/Linux Kernel OSExperience in RTOS System level designExperience in Linux Device DriversExperience in USB Protocol / PCIE Protocols.Knowledge of Bluetooth Controller BR\EDR and Low Energy Strong written and verbal communication skills. Experience in maintaining and managing codebases, ensuring high standards of code quality. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Working Model This role will require an on-site presence. *

About The Role : Creates quality emulation collaterals using UVM System Verilog/SystemC and integrates it with the emulation/FPGA model. Tests and debugs the emulation/FPGA model and collaterals for validation readiness. Defines and develops new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-silicon and post-silicon functional and performance validation as well as SW development/validation. Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. Interfaces with and provides guidance to presilicon Validation teams for optimizing pre-silicon validation environments, test suites and methodologies for emulation efficiency. Develops and applies automation aids, flows and scripts in support of emulation ease of use and improvement of equipment utilization. Job Experience: Technical experience in verification of RTL-based digital systems with very good understating of various system level flowsExperience leading development of verification architecture based on evolving requirement from IP/SOC customersExperience with RTL design, Verilog and simulation, debug tools such as Verdi, System Verilog/SystemC based verification techniques.Experience in debugging and isolation techniques including writing checkers, monitors, assertions and necessary DPI interfaces for co-emulation environmentsExperience in SW Programming/scripting and debug such as C, C++, Perl, PythonWork experience creating a self-checking emulation/simulation test benchHighly proficient in UVM techniques for verificationHands-on experience of emulation and simulation BFM based verificationGood understanding of architectural design documents(micro-architecture documents, integration documents)Preferably good understanding of emulation/simulation platform with major vendors (Synopsys, cadence )Protocol knowledge :PCIE, CXL, UCIe, CHI, DDR Good understanding of CPU architecture (Intel/AMD/Arm/GPU)Highly proficient with coherent, non-coherent and concurrent traffic validationExperience with emulation based systems such as Synopsys ZeBu, Cadence Palladium or Mentor Graphic VeloceExperience in building emulation based models for large scale designs is a plus Job Responsibilities: Work closely with peers in architecture, design and verification teamsShould be able to review the IP teams requirements, come up with verification plan, test plan, micro-arch, identify scenarios and design intent and develop verification strategies which can ensure defect free IP'sMaintain generic emulation based verification environment and regression setups for various IP'sLeads activities driving the development of various stimulus to support the emulation based verification of various IP'sDevelop and maintain UVM environments for IP interfacesWork in cross-functional teams to deliver bug free features in a timely manner Qualifications QualificationsThis position requires meeting the below minimum qualifications to be initially considered. Preferred qualifications are in addition to the minimum requirements and are considered a major plus.Minimum Qualifications:Must have a Bachelor's degree with 15+ year experience or Master's degree in Electronics and Computer Engineering with relevant experience of at least 10+ years Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

About The Role : Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification. Qualifications Bachelor in Electrical Engineering, Computer Engineering, and/or Computer Science plus 12-14 years of relevant work experience, Masters in Electrical Engineering, Computer Engineering, and/or Computer Science plus 10-12 years of relevant work experience, or a PhD in Electrical Engineering, Computer Engineering, and/or Computer Science plus 8-10 years of relevant work experience. Experience owning a testplan and executing to verification closure. 5 plus years of experience in SystemVerilog, OVM/UVM. Knowledge of AMBA protocols (AXI, AHB, APB). Knowledge of PCIe is a plus. Knowledge of power aware verification is a plus. Strong scripting skills. Excellent verbal and written communication skills. Exposure to Formal verification techniques is a plus. Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

Date Posted: 2025-01-29 Country: India Location: North Gate Business Park Sy.No 2/1, and Sy.No 2/2, KIAL Road, Venkatala Village, Chowdeshwari Layout, Yelahanka, Bangalore, Karnataka 560064 Position Role Type: Unspecified Job Description Overview: In this role the Sr. Lead Engineer (Embedded Controller Platform software) actively participates and drives execution during development and testing of platform software for upcoming Embedded Controller Platform. Working with latest technologies across various processors for aerospace domain. Position: Sr. Lead Engineer (P3) Primary Responsibilities: Proficient in DO-178/C Level A/B development Hands on experience in Model based development Knowledge of MBSE and hands on with tools like Cameo and SysML. Development or Testing Model based software/systems Working experience in Polarion-ALM, DOORS or any other certified configuration tool Experience in working and maintaining target boards and using emulator / Debugger tools is preferable Good understanding in communication Standards like SPI, I2C, UART, PCIe and ethernet Exposure to platform level software is added advantage Knowledge in scripting language like python, VB script and Labview is preferable Knowledge in C# or any related back-end server programming language is an added advantage Exposure to QorIQ processor is added advantage Good working experience/knowledge of MISRA rules and Polyspace Understanding on basic testing methodologies Basic Qualifications: Min 6 to 10 years of Industry experience in software development life cycle in accordance with DO-178C Levels. Bachelors/Masters degree in Computer Science Engineering /Electronics and communication Engineering / Electrical Engineering / Information Technology. Preferred Qualifications: Aerospace domain Electrical and Lab view understanding. Research and development in Platform software. Collins Aerospace, a Raytheon Technologies company, is a leader in technologically advanced and intelligent solutions for the global aerospace and defense industry. Collins Aerospace has the capabilities, comprehensive portfolio and expertise to solve customers toughest challenges and to meet the demands of a rapidly evolving global market. At Collins Aerospace, our Power & Controls team make modern flight possible for millions of travelers and our military every second. Our major product lines are on-board virtually every aircraft flying. Be it keeping passengers safe with our emergency power generation systems or creating a positive in-flight experience through reliable cabin pressure controls and quieter engines, Power & Controls focuses on delivering a best-in-class experience to our customers. We hire the top people in the industry. Their ideas drive our performance, and their integrity keeps our customers happy. Join us as we take flight! Collins Aerospace Diversity & Inclusion Statement: Diversity drives innovation; inclusion drives success . We believe a multitude of approaches and ideas enable us to deliver the best results for our workforce, workplace, and customers. We are committed to fostering a culture where all employees can share their passions and ideas so we can tackle the toughest challenges in our industry and pave new paths to limitless possibility. WE ARE REDEFINING AEROSPACE. Some of our competitive benefits package includes: Benefits package includes: - Transportation facility. - Meal coupons - Group Term Life Insurance. - Group Health Insurance. - Group Personal Accident Insurance. - Entitled for 18 days of vacation and 12 days of contingency leave annually. - Employee scholar program. - Work life balance. - Car lease program. - National Pension Scheme - LTA - Fuel & Maintenance /Driver wages - Meal vouchers Nothing matters more to Collins Aerospace than our strong ethical and safety commitments. As such, all India positions require a background check, which may include a drug screen. Note: Background check required (every external new hire in the India) Drug Screen only performed for Operations Positions At Collins, the paths we pave together lead to limitless possibility. And the bonds we form - with our customers and with each other -- propel us all higher, again and again. Apply now and be part of the team that s redefining aerospace, every day. RTX adheres to the principles of equal employment. All qualified applications will be given careful consideration without regard to ethnicity, color, religion, gender, sexual orientation or identity, national origin, age, disability, protected veteran status or any other characteristic protected by law. Privacy Policy and Terms: Click on this link to read the Policy and Terms

You will be responsible for designing and maintaining hardware test suites for Apples mobile products. You will work side by side with hardware engineers on specifying, implementing and debugging stress tests for new products in development. Some of your responsibilities will include:- Write, debug, and integrate new tests for integrated chipsets (Baseband, application processors, PMUs etc.)- Support product development builds- Work closely with hardware and software engineers to debug hardware issues exposed during testing- Early engagement with design teams to develop and implement test plansInternational and domestic travel is likely. 5+ years of relevant industry experience Hands-on programming skills at least one of C, Python, Lua Recent experience with programming, testing and debugging embedded devices Strong communication skills required Knowledge of Digital communication protocols (i.e. PCIe, SPMI, I2C, RFFE etc.) Familiarity with lab test equipment including logic analyzers, Protocol analyzers, oscilloscopes etc. Experience working with manufacturing an advantage Knowledge/Experience of wireless communication systems (Cellular, WiFi, BT, NFC, UWB) is a plus Should be well organized and have the ability to be flexible in a changing work environment. Education Experience Education Experience - Bachelors Degree (Electrical/Electronic/Computer Science /Computer Engineering). (Masters preferred) Additional Requirements Additional Requirements More

Emulation Enginner (Zebu, Model build, Transactors, Palladium,HAPS, Model Build, Protium Work Location - Bengaluru, Hyderabad, Pune, Noida, Kochi 1) A good understanding of architectural aspects and RTL code at IP/Sub-system/SoC level 2) A good understanding of verification methodologies including SV-UVM/C based environment, transactors etc 3) Experience in building emulation models from scratch 4) Knowledge of Arm CPU cores, protocols including PCIe, USB, Ethernet, AMBA, UART/SPI/I2C, DDR, flash memories and their usage in SoC environments is necessary 5) Emulation experience on ZeBu /Veloce/Palladium, including compilation, test execution, debug, and performance. 6) Strong scripting skills including UNIX shell scripting, Perl, TCL etc 7) Support various emulation users 8) Must have worked in end-to-end Emulation of atleast 1-2 SoC programs in Sub-system and chip level

Job Title: Analog Circuit Design Engineers Design of LDOs, Bandgaps, Temp Sensors, PLLs, GPIOs and other analog blocks Design of SERDES blocks like Transmitters, Receivers, Equalizers, Calibration and compensation blocks.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Responsibilities : B. Tech/BE/ME/Mtech Job Description Design and lead high speed IP (USB3, PCIE, DPHY etc) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development - analog design, layout, digital design, documentation and silicon validation. Would be required to participate in customer facing discussions. Requirements B. Tech/BE/ME/Mtech Exp - 6 +yrs Hands on design experience in various analog IP like PLLs, data converters, serial interfaces etc. Must have participated in full cycles of analog IP creation - right from spec to silicon debug and char Must have good communication skills and should be team player. Working experience in PHY (PCIE, USB2, USB3) development is desired We re doing work that matters. Help us solve what others can t.

Experience in IP/Subsystem level Verification Good hands-on experience in verifying PCIe protocol (Gen4/Gen5/Gen6) Good knowledge on PCIe transaction layer, routing, reset flows etc Good experience with AXI protocol, NOC subsystem verification Good SV-UVM knowledge with hands-on experience in testbench development Good debugging skills Knowledge on performance verification is a plus.

Intimate knowledge of Linux with a solid understanding of the kernel, kernel patches, kernel modules, static and dynamic libraries, root file system layout, and available features and functionality in many OSS packages. The ability to write and debug Linux device drivers with knowledge about mutexs, ISRs, user space versus kernel space drivers, mmap and other driver concepts. Familiar with bootloaders (uboot) with the ability to do initial board bring up. Prior experience with writing and debugging drivers for PCIe, I2C, SPI, UART. Familiar with CPU architectures, like ARM Proficient in C, C++, and Bash Familiar with testing and debugging software through unit test, GDB, and JTAG BDMs. Fundamental understanding of SCM, Packaging, and Build Systems like Makefiles, Git, Autotools, RPM, etc. Experience in one or more of the following: Buildroot, Yocto Linux Distro, Grub, ONIE, ZMQ, distributed messaging frameworks, TCP/IP, SDKs from Broadcom. Experience of having gone through full cycle of Software development multiple times across product lines and supporting multiple concurrent releases and HW targets.