665 Pcie Jobs - Page 18

Are you looking for a unique opportunity to be a part of something greatWant to join a 20,000-member team that works on the technology that powers the world around usLooking for an atmosphere of trust, empowerment, respect, diversity, and communicationHow about an opportunity to own a piece of a multi-billion dollar (with a B!) global organizationWe offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Being part of DCS group, candidate will be working on PCIe, CXL based Switches, Re-timers and flash controllers for data-centers. Responsibilites: Create Micro-Architecture Specification. Work with team members to design RTL and provide support to verification. Work on constraint development for CDC, RDC and synthesis. Review Test plans from Verification team. Support Emulation and Firmware team in bringup. Requirements/Qualifications: Minimum B.Tech/M.Tech in Electronics or related field. 10+ years of experience in RTL Design aspects, with leadership capability. Key Skills: Expertise in VLSI logic design, understanding architecture and design planning. Experience with constraint development for Synthesis and STA. Knowledge of protocols like PCIe, CXL, AXI, AHB, I3C etc. Proficiency in Tcl and Perl scripting. Power planning and implementation techniques. Proficiency in CDC, RDC and constraint development. Excellent debugging, analytical, and leadership skills. Strong communication skills and interpersonal abilities. Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Expertise in ASIC verification, Expertise in System Verilog and UVM, Verilog. Experience in technical lead , leading a team of 2-5 engineers. Expertise in IP level verification, testbench architecture development, Testbench component developments. Expertise in coverage closer, code coverage, functional coverage Experience in Gate level simulations. The candidate should be able to define verification plan, create testbenches, testcases,gate level simulations etc independently. Knowledge on serial protocols PCIe, USB, UFS Knowledge on scripting languages like Python, Perl etc. Keen on continuous process improvement to improve Quality and time

Job Details: : Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Participates in the definition of architecture and microarchitecture features of the block being designed. Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Follows secure development practices to address the security threat model and security objects within the design. Works with IP providers to integrate and validate IPs at the SoC level. Drives quality assurance compliance for smooth IPSoC handoff. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: A bachelors degree in electrical/computer engineering, Computer Science or related field with 6+ years of experience (or) a masters degree with 4+ years of experience. Preferred Qualification: Relevant experience with skills in SoC flows, RTL integration and Globals (Clocking, Boot/Reset/Fabrics, DfD, Fuse, etc). Experience in subsystem design and HSIO protocols such as PCIe, UCIe is a plus. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Job Details: : Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification. Qualifications: Candidates must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. listed below would be obtained through a combination of Industry job-relevant experience, internship experiences and or schoolwork/classes/research. Education Requirement- Bachelors degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6-8 years of industry work experience, or- Masters degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 5-7 years of industry work experience, or- PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of related work experience. Minimum Qualifications- 4+ years of experience in relevant Pre-Silicon validation position having gone through multiple project cycles to gather in-depth experience. 4+ years of experience in logic design verification with various tools and methodologies including System Verilog, Perl, OVM/UVM, logic simulators, and coverage tools. 4+ years of experience with pre-silicon simulation tool flows such as Synopsys VCS Verdi and DVE. 4+ years of experience in OVM/UVM for developing verification test benches and constrained random verification. Preferred Qualifications- Experience with PCIe, Power Management, Ethernet, Network packet processing. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Job Details: : We are seeking a passionate and experienced Embedded Firmware and Driver Engineer to design, develop, and optimize low-level embedded software for Intels AI accelerators and GPUs. In this role, you will collaborate with a cross-geo team to create world-class embedded software solutions. Your responsibilities will includeDesigning, developing, and maintaining bare-metal firmware for ARC-based processors. Creating and managing Boot ROM and Boot loader systems. Developing and maintaining RTOS-based device drivers. Delivering new features requested by Cloud Service Providers. Solving complex technical problems and contributing to innovative solutions. Collaborate with hardware, system, and driver teams for feature definition and end-to-end delivery Qualifications: Minimum qualifications: Bachelors degree in computer science, Electrical Engineering, or a related field with at least 8 years of relevant experience in Embedded Software Design and Development. Proficiency in ARC or other low-power controller architectures. Expertise in C programming and basic understanding of assembly language. Deep understanding of real-time systems, interrupt handling, and RTOS (e.g. Zephyr) Proven experience in writing boot firmware Familiarity with communication protocols such as SPI, I2C, and UART. Excellent analytical and problem-solving skills, with the ability to manage stakeholders and collaborate across geographies. Exceptional written and oral communication skills. Hands-on experience in developing and integrating RTOS based device drivers. Preferred qualifications: Knowledge of interfaces like I3C, PCIe, CXL, and protocols such as SMBUS/PMBUS and MCTP/PLDM. Experience in pre-silicon emulation, simulation, and FPGA platforms, along with debugging tools like Lauterbach and protocol analyzers. Knowledge in one or more of the following areasConfidential Computing, UCIe, or HBM technologies. Understanding of DVFS algorithms, AVS, and thermal management strategies Familiarity with secure boot, firmware update mechanisms, and memory management and open-source projects like buildroot-external. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. *

Job Details: : Builds emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools. Develops, integrates, tests, and debugs hardware and software collateral in simulation, emulation, and FPGA models for testing new features, writes directed tests, develops the test environment and hybrid emulation environment, and supports verification of hardware and software/firmware. Defines and develops new capabilities and tools to achieve better verification through improved emulation and FPGA model usability. Enables acceleration of RTL development and improve emulation/FPGA model usability for presilicon verification, postsilicon validation, and software development. Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform and interfaces with and provides guidance to verification teams for optimizing presilicon verification environments, test suites, and methodologies for emulation efficiency. Develops and utilizes automation aids, flows, and scripts in support of emulation utilization. Applies understanding of emulation and FPGA prototyping tools and methodologies, SoC integration, emulation transactors, emulation performance and optimization techniques, RTL simulation, and hybrid emulation environments (virtual platform and FPGA/emulation model). Collaborates with design, power and performance, silicon validation, and software teams, and participates in SoC and IP bring up, root causes testbench issues, IP and SoC testcases, and emulator/FPGA environment issues. Qualifications: Bachelor Degree in Electrical and Electronics Engineering or Masters Degree in Electrical and Electronics Engineering or Computer Engineering with 8+ years experience. Experience in Pre-si/post-Si validation with FPGA based validation, Experience with bring up of functional tests on FPGA/Si. Experience in Hardware validation/emulation platforms like zebu, veloce or functional bring up of PM/Reset/PCIE/DMI/DDR/Mem et.al. Good understanding of SoC architecture / uArchitecture, Networking protocols or Signal processing algorithms/flows in hardware. Excellent understanding of test framework and abstraction, develop test plans, test scripts for functional validation. Very good debugging skills, experience of working with various hardware debugging tools JTAG, Verdi, fsdb analysis. Good knowledge in C/C++, Scripting knowledge (Python/Perl/Tcl), ability to develop parsers. Knowledge in RTL design, VHDL/Verilog is a plus. Strong analytical ability, problem solving and communication skills. Ability to work independently and at various levels of abstraction. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. *

Job Details: : Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. listed below would be obtained through a combination of Industry job-relevant experience, internship experiences and or school work/classes/research. Education Requirement- Bachelors degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 10+ years of industry work experience, or- Masters degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 9+ years of industry work experience, or- PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 8+ years of related work experience.Minimum Qualifications- 9+ years of experience in relevant Pre-Silicon validation position having gone through multiple project cycles to gather in-depth know how. Solid work experience in designing, verifying, and validating complex hardware systems. Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python. Proficient in debugging SOC, fabric, NOC, memory, various protocols like PCIE or Ethernet, or other complex ASIC designs. Knowledge of advanced computer architecture and micro-architecture concepts. Experience with writing directed and random test cases. Experience with design verification and validation methodologies and strategies. Good communication skills, and a team player. Able to work independently in a fast-paced team and environment. Desired - Deep knowledge of system architecture including CPU, Data path packet processing flows , Boot Flows, fabrics, interconnects, NOC, memory sub-systems, I/O peripherals (UART/SPI), bus protocols (AXI/APB), PCIE, Ethernet, DMA etc. Experience with boot, reset, clock and power management. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Strong Debug, UVM, System Verilog Understanding Specs and Standards and developing relevant test plans Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening Post-si bring-up and HW-SW debug experience would be a plus. Knowledge & exposure to silicon debug tool chains would be an added advantage Preferred Qualifications 5+ Year of industry experiences in the following areas: - Thorough understanding of Digital design concepts Thorough understanding dv methodologies and tools Good understanding of DDR families (LP/PC) and generations (DDR2/3/4/5) Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite Understanding of multi-core ARMv8 CPU architecture, coherency protocols and virtualization Interested can share resume on Shubhanshi@incise.in

We are seeking an engineer to join our team that will thrive in a fast-paced work environment, using effective communication , problem-solving and prioritization skills. Individuals that are we'll organized, show great attention to detail, and employ critical thinking are we'll-suited for our team. Senior Member Technical Staff (SMTS) Embedded Software (Data Center GPU & SPSE) AMD India (SPSE) is looking for a strong technical leader to lead an Embedded Software development team to lead and deliver modular, quality oriented, and extensible FW infrastructure. You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology. Closely collaborate with peer development and QA teams, architecture, customer support and product line management. As a key member of the Technical management staff, contribute to the vision and strategy of continuous integration, improved development processes, quality and productivity improvements. KEY RESPONSIBILITIES: Lead and drive the Embedded software development for all new and sustaining AMD EPYC Server, DC GPU Products. Responsible for Architecture, Design, Development and Mentoring team members to become successful at AMD. Responsible for partnering leveraging all the development work done by Core engineering in Data Center GPU , with a strong focus on enabling differentiating features for the success of Data Center GPU business. Partner with Platform team to bring-up the AMD Security processor firmware during SOC bring-up. Partner with HW and Silicon validation teams for verification of all features in the Silicon IP. Support the triage and debug of critical bugs from AMD security processor firmware side that require multi-team interactions. Support field requests / escalations from Customer application engineering team. Influence and support software engineers with design reviews, code reviews, and licensing reviews for open source as we'll closed source code offerings. Train and enable Applications Engineers and FAEs on software solutions with esp. focus on AMD differentiated features and technologies Provide product and technology feedback and consultancy into Enterprise product management, Enterprise Server Systems and SW efforts, and AMD technology and product planning Work on soft ware POCs (Proof of Concepts) for early enablement of new technology. PREFERRED EXPERIENCE: Exposure to systems architecture Solid programming skills in C experience or a strong desire to learn secure coding processes and basics of encryption technology are essential. Experience with source control systems such as git Industry experiences developing embedded firmware or device drivers. Experience with JTAG debuggers and other tools. Experience with pre-silicon development on FPGAs , microntrollers or simulation environments Experience with processor, board, or ASIC bring-up. An understanding of embedded firmware or device driver development. An understanding of assembly level programming and optimizations. An understanding of PCIe, SPDM, Virtualization, and IOMMU Experiences working with RTOS and other embedded OS environments. ACADEMIC CREDENTIALS: Bachelor s or Master s in Electrical Engineer, Computer Engineering, Computer Science, or a closely related field

The DFM Firmware Team plays a crucial role in designing and developing the Direct Flash Module (DFM) - a key module of Pures Flasharray and Flashblade enterprise storage solutions. The DFM is an internally designed enterprise storage device using the NAND flash technology. Compared with the off-the-shelf SSD, the DFM has the competitive advantage of simplicity, high performance, low cost and scalability. As a member of the DFM firmware team, you'll have rare opportunities to work across various domains, including the entire data path, NAND media management, and low-level hardware interfaces. Our firmware design enables us to quickly integrate the latest NAND technologies from various vendors. We we're pioneers in adopting QLC for enterprise storage solutions, releasing the first QLC DFM in 2019. Our proprietary media management policies and algorithms position Pure as a leader in enabling QLC NAND in the enterprise storage industry. you'll work closely with the Purity software, hardware, NAND, and drive qualification teams. This offers a unique opportunity to learn the latest technologies, including the newest generations of NAND, NVMe/PCIe, as we'll as SSD controllers. Firmware development opens doors to experiences in embedded software design, hardware and system integration. you'll develop a comprehensive understanding and gain insights into the entire product development and release process. What You Will Be Doing Pure Storage is seeking a full-time Firmware Engineer to join our device firmware team. You will be working as part of a small, but fast growing, dynamic team and will be responsible for: Designing firmware simulation environment, investigating and debugging issues, and developing failure analysis tools and process Designing, implementing, and testing firmware of Pure Storage s DirectFlash SSD Modules Coding and testing in C/C++ and Python Bringing up and enabling new hardware components including latest NAND and developing low level firmware features Internal development automation including continuous integration, automated unit and regression testing, etc Working closely with hardware, system software and manufacturing teams What You Bring to the Team BS in Computer Science or equivalent Strong experience with NAND, Flash, and/or SSD Device Firmware Development Strong understanding of software/firmware test and release processes Experience using Python, C/C++ or related programming languages, hands on experience in developing the SI Familiar with embedded software or firmware development Experience with Micro-controllers, SoC, or hardware bring-up Good verbal communication & collaboration skill. Must be willing and able to work in an open office, team environment. We are primarily an in-office environment and therefore, you will be expected to work from the Banglaore office in compliance with Pure s policies, unless you are on PTO, or work travel, or other approved leave. WHAT YOU CAN EXPECT FROM US: Pure Innovation : We celebrate those who think critically, like a challenge and aspire to be trailblazers. Pure Growth : We give you the space and support to grow along with us and to contribute to something meaningful. We have been Named Fortunes Best Large Workplaces in the Bay Area , Fortunes Best Workplaces for Millennials and certified as a Great Place to Work ! Pure Team : We build each other up and set aside ego for the greater good

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/ time zone s . You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems THE PERSON: A successful candidate will work with senior silicon design engineer s . The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. K EY RESPONSIBLITIES : Fair understanding on protocols : AXI3/DDR/ACE/CHI is a must. Prior work experience on High-Speed Serials - PCIe/CXL/USB/SATA/GT/SerDes IPs is preferred. P REFERRED EXPERIENCE : Minimum 12+ year of industry experience in IP/SOC level design verification Have worked upon atleast one full cycle of SoC Verification flow Strong SV/UVM, UVC, Scoreboards, Functional coverage, SV assertions, C/C++ expertise Able to create APIs for SOC level test bench stimulus. Strong debug expertise Must have good communication skills and ability to work in a team environment. Experience in data path verification protocol like PCIe/CXL/AXI/SATA at SoC Level Experience in driving task independently and complete with excellent quality ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities -Linux application programming Linux device driver development Embedded C, MMU, Cache policies Excellent debugging skills at kernel and user space and exposure to different debugging tools Knowledge on PCIe, Ethernet, TCP, I2C protocols, DMA framework is a plus. Make files Skills Must have Candidate should have 5-8yrs experience Proficient in C and embedded systems. Experience in Linux driver development (PCIe/USB/Ethernet) and application development. PCIe driver development experience. DMA client/controller driver development experience Hands-on experience with Configuration Management tool like GIT, Perforce. Have an interest to constantly learn and share new findings. A quality mindset, ability for strategic thinking and a drive to always improve. Self-motivated Nice to have B.tech/M.Tech in CSE/IT/ECE/EEE/E&I Other Languages EnglishB2 Upper Intermediate Seniority Regular

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Responsible for developing & testing of software Responsible for generating documents, such as Spec, design, user-guide, API spec, etc., Skills Must have Candidate should have 7+ yrs experience Experience: Experience in designing complex multithreaded Performant SW Experience in designing SW API interfaces. Experience in C/C++ programming Experience with Multi-threaded software development in Linux environment Experience with Embedded IP subsystems e.g. Ethernet/PCIe/SPI/I2C/USB/GPIO/Memory architectures /DDR/SDRAM/DMA Experience with development of software targeted for x86, standalone and RTOS platforms Experience in low level driver development, register interface programming, general algorithms and data structures, bootloaders/Uboot Experience working with and integrating open-source software Strong debugging skills at device and board level using JTAG debuggers Experience in Software programming for FPGAs is an advantage Scripting language experience like Perl, Python or TCL Nice to have Excellent interpersonal, written and verbal communication skills Excellent communication, problem solving and analytical skills EducationB.tech/M.Tech in CSE/IT/ECE/EEE/E&I OtherLanguagesEnglishB2 Upper Intermediate SenioritySenior

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Owning and Driving execution of subunits/unit level Verification Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Work with logic and development teams to identify test scenarios, create test plans and execute the scenarios. Work with IBM Verification community to improve Verification methodology. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 + years of experience in Functional Verification of processors or ASICs. Minimum 9+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading teams Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification. Good understanding of the Server System

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL/Test Pervassive Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise -8+ years of relevant experience - At least 1 generation of processor core/cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design, deadlock-free designs.

Candidate should have experience in Software development, tools development role, firmware development role or validation tools development.Candidate shall design and develop algorithms for Post Silicon Validation of next generation IBM server processors, SOCs and ASICs. He/She will be working on processor Bringup Activities and own key debugs during the bring up/power on phase. The candidate will be expected to interface with multiple stakeholders in hardware design teams, lab teams, performance teams and characterization teams. Candidate must work on coverage closure by developing comprehensive test plans and strategies and drive to achieve coverage goals while interacting with stakeholders, verif teams and design teams. He/She must be skilled in utilizing object-oriented programming skills in C/C++ and scripting languages like Python/Perl to write complex test scenarios to automate/optimize. Candidate must possess experience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Proficiency in emulator env/FPGA validation is preferred. She/he must possess excellent communication skills and understand agile processes. The candidate must have an eagerness and curiosity to learn and be willing to code and participate hands on. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Technical ExpertiseVery proficient in C programming, Strong Scripting skills. Over 5 years experience in hands on Software development using C, C++. Computer Architecture KnowledgeIn-depth knowledge of computer architecture, including processor core design specifications, instruction set architecture, and logic verification. Multi-Processor Cache CoherencyExperience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Operating Systems and ConceptsAtleast 2 years experience with Multithreading, context switching, memory management related development Preferred technical and professional experience IO device drivers, firmware exposure(NIC controller, PCIe device controllers, ASIC FW development experience) ARM architecture RISC V architecture Spike simulator experience, QEMU simulator

Meet the Team Join Cisco's Product Operations Team, part of our end-to-end Supply Chain Operations (SCO). We transform engineering innovation into scalable products, solutions, and offers that drive margin, quality, and delivery outcomes to exceed customer expectations. Product Operations is responsible for New Product Introduction (NPI) and Product Lifecycle Management, ensuring smooth product launches and exceptional support until End of Life (EOL). Your Impact As a Manufacturing Test Development Engineer, you will be at the forefront of ensuring product quality and optimizing manufacturing test processes for Cisco's cutting-edge products. Your contributions will directly impact cost efficiency, test reliability, and seamless product delivery. In this role, you will: Define and execute the Manufacturing Test Strategy and plan. Conduct Design for Testability (DFT) assessments and test coverage analysis to maximize product testing. Collaborate with product design teams (Hardware, Software) to integrate testing solutions early in development. Develop and implement test automation scripts for manufacturing. Perform failure root cause analysis and propose corrective measures. Support prototype builds and mass production, ensuring high-quality outcomes. Manage test capacity and budgets, aligning with business objectives. Deploy board and system-level automated functional test processes for complex electronic systems in remote manufacturing locations. Utilize Traffic Test Analyzers (Spirent/IXIA) for Ethernet interface testing (10G/100G/200G/ 400G/800G). Guide debug processes for remote manufacturing test engineers. Who You Are You are a self-driven team player with a passion for innovation, continuous learning, and collaboration. You thrive in dynamic environments, take ownership of challenges, and are willing to work across time zones to meet business goals. Minimum Qualifications Bachelor's degree in Electrical/Electronics & Communication Engineering or equivalent. 6+ years of relevant experience in Product Test and Validation. Knowledge of Ethernet technology (10G/100G/200G/400G/800G) and hardware protocols (e.g., I2C, SPI, PCI, PCIe). Expertise in Manufacturing Test Solutions, including Test Fixture Development, ICT, and BSCAN. Strong understanding of hardware and system testing, including component-level debugging and fault isolation. Proficiency in test automation using scripting languages like Python. Familiarity with Design for Testability (DFT) principles, both structural and functional. Excellent verbal and written communication skills. Preferred Qualifications Knowledge of network routers and switches is an added advantage. Familiarity with product hardware development processes from concept to end-of-life. Experience with manufacturing test equipment and tools for hardware validation. Strong analytical skills and familiarity with FMEA methodologies for risk assessment. Who You'll Work With You will work closely with: Product design engineering teams (Hardware & Software) to define and deploy manufacturing test strategies. Supply chain and manufacturing operations teams to ensure high-quality and efficient product delivery. Cross-functional teams to address challenges and optimize processes throughout the product lifecycle.

What You Will Do: You will bring your unique talents to a team that develops Cisco's cutting-edge routing technology, widely regarded as the transport medium of choice for mission-critical networks in large enterprises. As a Software Technical Leader , you will: Design, Develop and integrate products deployed by leading service providers worldwide. Collaborate with a vibrant, BU-wide technical community to exchange ideas and innovate on next-generation technology. Explore opportunities for personal growth while mentoring colleagues and working on cutting-edge technologies. As a key member of this team, you will: Work alongside seasoned engineers to architect, design, and develop some of the world's largest service provider routers, web centres, and enterprises. Contribute to the evolution of these systems to support exciting new customer business paradigms. Interact and collaborate with some of the finest talent in the industry, making work both fun and challenging. Engage with other groups such as Product Management, Marketing, Sales, Customer Support, and Advanced Services. Who You Are: You possess: In-depth knowledge of C and a solid understanding of Python. Extensive experience in a Unix/Linux-based development environment. Excellent coding, automation, and debugging skills. Strong teamwork and communication skills. Familiarity with hardware architectures such as PCI, PCIe, DMA, I2C, SPI , NPUs/DPUs and processors like x86, AMD, and ARM . Experience with board bring up is a plus. Experience with emerging technologies such as AI/ML and cloud computing is a plus. Experience and Qualifications: Experience: 12 to 15 years in embedded firmware development. Education: BE/B.Tech/ME/M.Tech/MS in CS/EE/IT/ECE, MCA, or similar education. Proven ability to derive design and code based on technical standards and write comprehensive, focused design documents. Experience in developing software/firmware for networking equipment. Excellent knowledge of software architecture and system design.

We are seeking a highly skilled and experienced DFT Engineer to join our dynamic team of engineers to develop the next-generation Flash Controllers. As an SoC DFT Engineer, you will be responsible for defining and implementing industry leading DFT solutions, with emphasis on SCAN, MBIST, BSDL etc. The ideal candidate will have a deep understanding of DFT Architecture, Implementation flow, MBIST, SCAN ATPG & Simulation expertise. ESSENTIAL DUTIES AND RESPONSIBILITIES: DFT Architecture definitions for SoC development Leading complex activities and providing solutions for complex DFT problems. Collaborate with cross-functional teams to define and refine SoC DFT requirements, ensuring alignment with industry standards and customer needs. Working closely with the Design, Verification, Physical Design & Test Engineering teams while guiding them on the test requirements and methodologies. Work closely with the Product Engineering team and understand the test requirements, get involved in complex silicon debugs. Evaluate all aspects of the SoC DFT flow from requirements, through detailed definitions, and work closely with the CAD to continuously improve the DFT methodology. Qualifications B.Tech / M,Tech / Phd in Electronics, Computer science or Electrical Engineering Minimum 15+ years of experience in DFT Strong understanding of DFT Architecture

Product Validation Engineer - Portable SSD (pSSD) As an pSSD Product Validation Engineer at Sandisk., your responsibilities will include: Execute Test Plan/Design, test cases and develop Test Scripts to validate pSSD products. The front end for these products will be USB3.x and USB4 whereas the backend will be nVME SSD As a validation engineer, you will execute the product validation of all retail pSSD products for different market segments such as Mainstream+, Mainstream, Essential, Desktop. Western Digital is a market leader in these products You will drive all validation functions including but not limited to Platform compatibility, power and performance, reliability, regulatory and safety compliance from conception till mass production You will work with systems architecture team to define validation architecture, infrastructure requirements, test plan development and execution for the lifecycle of the product You will also work with test development and automation team to define requirements for tools and automation test environment you would demonstrate high degree of skills to understand one or more areas of FW: Front End (USB protocol to be precise), Back end/Media management, FTL or Security. You would also exhibit high degree of competency in understanding NVMe/PCIe specifications, along with understanding Customer specific requirements. You will be working in partnership with Firmware development teams through the lifecycle of the product while finding defects and validating the fixes by creating grey and Whitebox tests. Be able to demonstrate success in communicating status, issues, concerns, strategies of programs and projects - including development of appropriate indicators. Must be able to deal with ambiguity and operate with little direction to meet defined goals. Must be able to collaborate with others to achieve goals and task completion. Comprehend and articulate validation strategies, plans and status. Review, track and document test results and sightings. Drive issues to closure by interfacing/collaborating with other product development teams Experience Bachelor s or Master s degree in Computer Science or Engineering with 0-2 years of experience in nVME SSD Validation. Understanding of Whitebox and grey box test methods for Client SSDs is a plus. Good understanding of USB protocol with experience in debugging using USB protocol analyzer Good hands on experience in debugging NVMe Protocol issues using Lecroy/JDSU analyzers is highly desired. Must have prepared good test plans involving access patterns, NVMe protocols, FW test hooks and VS commands for one or more following areas of FW: Front End, Back End, FTL and Security. Integrate tests into an automated test environment and collaborate with test execution teams to drive validation plans/strategy. Good Knowledge of Linux operating system debugging and Coding in Python. Effective oral and written communication with strong analytical, problem solving, and project management skills Demonstrated ability to work well with others and collaborate effectively in a team environment Expert planning and tracking skills, able to see big picture, well-organized, focused on results, capable of managing multiple projects, excellent time management with respect to priorities and self-management. Must have excellent knowledge of system storage and the relationship to the platform ingredients: CPU, Memory, PCIe, drivers, OS, firmware, etc.

Test Development Engineer-Telecom Hardware testing /Validation/Design/Test Automation Meet the Team Join Cisco's Product Operations Team, an integral part of Supply Chain Operations (SCO), responsible for New Product Introduction (NPI) and Product Lifecycle Management from the manufacturing and supply chain perspective. Our team collaborates closely with design engineering teams at early stages of product development to ensure smooth product launches and continued support until End of Life (EOL). Your Impact As a Test Development Engineer, you will play a critical role in maintaining product quality, optimizing test processes, and ensuring cost-effective manufacturing testing for Cisco's networking products and routers. Your responsibilities include: Defining the Manufacturing Test Strategy and driving its execution. Conducting Design for Testability (DFT) assessments and test coverage analysis to identify risks and mitigation plans. Collaborating with product design teams (Hardware, Software, and Development Test) to ensure seamless integration. Developing automated manufacturing test scripts and implementing test automation for efficiency. Conducting failure root cause analysis to improve product reliability and quality. Supporting proto builds and mass production at remote manufacturing sites. Managing test capacity, equipment, and budgets to meet business objectives. Developing and deploying board and system-level functional tests for complex electronic systems. Using tools such as Traffic Test Analyzers (Spirent/IXIA) to test Ethernet Interfaces (10G/100G/200G/400G/800G). Planning and delivering test processes on schedule while ensuring the highest standards of quality. Minimum Qualifications Bachelor's degree in Electrical/Electronics & Communication Engineering or equivalent. 8+ years of relevant experience in product test and validation. Strong knowledge of Ethernet technologies (10G/100G/200G/400G/800G) and hardware protocols (e.g., I2C, SPI, PCI, PCIe). Expertise in Manufacturing Test Solutions, including Test Fixture Development, ICT, and BSCAN. Solid understanding of hardware and system testing with skills in component-level debugging and fault isolation. Proficiency in scripting languages such as Python for test automation. Experience in Design for Testability (DFT) for both structural and functional testing. Knowledge of network routers and switches (preferred). Strong verbal and written communication skills. Preferred Qualifications Knowledge of product hardware development processes, from concept to End of Life (EOL). Proven ability to develop test solutions for hardware validation and manufacturing. Familiarity with test equipment and traffic analyzers for Ethernet interface testing. Ability to lead debugging processes for remote test engineers. Who You Are A self-driven team player who collaborates effectively. A continuous learner, adaptable to new challenges and technologies. Flexible to work across various time zones to meet business needs. Who You'll Work With You will work closely with cross-functional teams including product design engineering (Hardware and Software), supply chain teams, and manufacturing operations teams to define and implement manufacturing tests that meet the highest quality and efficiency standards.

Job Description As a Senior Manager at Sandisk., your responsibilities will include: Managing a team of talented engineers to execute validation on RPG Products portfolio who will be working on the below Define Test Plan/Design, test cases and develop Test Scripts to validate RPG products. Protocols include but not limited to USB (Upto and Beyond Gen4, SD, nVME) As a validation lead, you will own/drive the product validation of all retail products for different market segments such as Mainstream+, Mainstream, Essential, Desktop. Western Digital is a market leader in these products You will drive all validation functions including but not limited to Platform compatibility, power and performance, reliability, regulatory and safety compliance from conception till mass production You will work with systems architecture team to define validation architecture, infrastructure requirements, test plan development and execution for the lifecycle of the product You will also work with test development and automation team to define requirements for tools and automation test environment you would demonstrate high degree of skills to understand one or more areas of FW: Front End (USB/SDIO protocol to be precise), Back end/Media management, FTL or Security. You would also exhibit high degree of competency in understanding NVMe/PCIe specifications, along with understanding Customer specific requirements. You will be working in partnership with Firmware development teams through the lifecycle of the product while finding defects and validating the fixes by creating grey and Whitebox tests. Be able to demonstrate success in communicating status, issues, concerns, strategies of programs and projects - including development of appropriate indicators. Must be able to deal with ambiguity and operate with little direction to meet defined goals. Must be able to collaborate with others to achieve goals and task completion. Comprehend and articulate validation strategies, plans and status. Review, track and document test results and sightings. Drive issues to closure by interfacing/collaborating with other product development teams Qualifications Bachelor s or Master s degree in Computer Science or Engineering with 8-10 years of experience in nVME SSD Validation. Understanding of Whitebox and grey box test methods for Client SSDs is a plus. Go

The Opportunity Were looking for the Wavemakers of tomorrow. What Youll Do Will be responsible for verification of IP, Block, or Subsystem at Soc Level Generate appropriate documentation for verification Responsible for analyzing/debugging given blocks/tasks in verification Should be able to develop and own the verification environment, verification components developed What Youll Need: 12+ years of experience with a Bachelors/ masters degree in the field of Electrical, Electronics, or computer engineering Should have a good understanding of verification flow, challenges, and requirements of functional verification Have worked on IP level or Block level or SoC level functional verification Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology & philosophy Expert in System Verilog, Verilog, and OVM/UVM verification methodology Have working experience on AMBA interface protocols (AXI, AHB, APB) Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must Hands-on experience on working one or more of the following protocols is a must - UART, I2C, SPI, QSPI, I3C, eMMC, CAN, Hands-on experience working with one or more of the following protocols is desired - PCIe, USB, DDR, LPDDR, GBE, SATA Experience with Perl, Python or similar scripting languages will be helpful Ability to adapt & learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals. We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

We are seeking a highly skilled and experienced Engineers to join our team. The ideal candidate will be responsible for performance verification of System-on-Chip (SoC) designs using Platform Architect and Emulation Platform. This role involves working closely with SoC architects and cross-functional teams to optimize SoC performance and ensure the successful delivery of high-quality products. Key Responsibilities: Develop and maintain performance models for SoC designs using Synopsys Platform Architect or Emulation Platform Collaborate with architecture, design, software and verification teams to define performance requirements and ensure alignment with overall system goals. Analyze and optimize system performance, including DDR, CPU, GPU, Interconnects and high-speed interface like PCIe, UCIe etc Identify performance bottlenecks and propose solutions to improve system efficiency. Conduct performance simulations and provide detailed analysis and reports. Mentor and guide junior engineers in performance modelling and analysis techniques and best practices. Stay updated with the latest advancements in SoC performance modelling and industry solutions. Qualifications Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. 15+ years of experience in SoC performance modelling and analysis. Proficiency in using Platform Architect or Emulation platform for performance modelling and analysis Strong understanding of SoC architecture, including CPU, GPU, DDR and interconnect subsystems. Any knowledge of NPUs and AI accelerators would be an added advantage. Experience with performance simulation tools and methodologies. Excellent problem-solving skills and attention to detail. Strong communication and collaboration skills. Ability to work independently and as part of a team. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

you will: Develop and integrate products deployed by leading service providers worldwide. Collaborate with a vibrant, BU-wide technical community to exchange ideas and innovate on next-generation technology. Explore opportunities for personal growth while mentoring colleagues and working on cutting-edge technologies. As a key member of this team, you will: Work alongside seasoned engineers to architect, design, and develop some of routers and solutions for the world's largest service provider, web centers, and enterprises. Contribute to the evolution of these systems to support exciting new customer business paradigms. Interact and collaborate with some of the finest talent in the industry, making work both fun and challenging. Engage with other groups such as Product Management, Marketing, Sales, Customer Support, and Advanced Services. Who You Are: You possess: In-depth knowledge of C and a solid understanding of Python. Extensive experience in a Unix/Linux-based development environment. Excellent coding, automation, and debugging skills. Strong teamwork and communication skills. Familiarity with hardware architectures such as PCI, PCIe, DMA, I2C, SPI , NPUs/DPUs and processors like x86, AMD, and ARM . Experience with board bringup is a plus. Experience with emerging technologies such as AI/ML and cloud computing is a plus. Experience and Qualifications: Experience: 9 to 12 years in embedded firmware development. Education: BE/B.Tech/ME/M.Tech/MS in CS/EE/IT/ECE, MCA, or similar education. Proven ability to derive design and code based on technical standards and write comprehensive, focused design documents. Experience in developing software/firmware for networking equipment. Excellent knowledge of software architecture and system design.