2 Pattern Validation Jobs

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3.0 - 7.0 years

0 Lacs

karnataka

On-site

Job Description: As an Engineer (DFT) at eInfochips in Bangalore, India, you will have hands-on experience in various DFT aspects including Scan insertion, MBIST and JTAG, ATPG, and Pattern validation at both block level and Fullchip level. You will be proficient in using Synopsys tools such as DFT MAX and TetraMAX, Cadence tools like RTL Compiler, Encounter Test, modus, Janus, as well as Mentor Graphics tools such as Tessent tool chain, TestKompress, Debussy, VCS, Questa, and IUS. Additionally, familiarity with PT tool from Synopsys will be advantageous. Key Responsibilities: - Hands-on experience in Scan insertion - Proficiency in MBIST and JTAG implementation - Expertise in ATPG and Patte...

Posted 1 month ago

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

As an Engineer (DFT) at eInfochips located in Bangalore, India, you will be responsible for hands-on experience in various DFT aspects including Scan insertion, MBIST and JTAG, ATPG, and Pattern validation at both block level and Fullchip level. You will be proficient in the usage of Synopsys tools such as DFT MAX and TetraMAX, as well as Cadence tools like RTL Compiler, Encounter Test, modus, and Janus. Additionally, experience with Mentor Graphics tools like Tessent tool chain, TestKompress, Debussy, VCS/Questa/IUS, and PT tool from Synopsys will be advantageous. This is a full-time position falling under the category of Engineering Services.,

Posted 3 months ago

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