13 Pattern Generation Jobs

As a DFX Engineer at our company, you will be responsible for SoC RTL verification and debug, GLS simulations and debug, Verilog coding, and verification in Test Mode. It is preferred to have experience in pattern generation and Silicon debug, while MBIST/SCAN related experience is not required. Your key responsibilities will include: - Performing SoC RTL verification and debug - Conducting GLS simulations and debug - Utilizing Verilog coding for verification - Demonstrating a good understanding of JTAG and verification in Test Mode - Benefiting from experience in pattern generation and Silicon debug To be considered for this role, you should meet the following qualifications: - 6-10 years o...

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globa...

Education BE/ BTech (Electronics/ Electrical/ Electronics and Communication) MS or MTech would be preferred The Candidate Is Expected To Have Worked On Scan insertion and DRC cleanup Pattern generation for Stuck-At, delay test, iddq, path delay and fault grading. Memory testing. Should also know the algorithms. Should also have knowledge about diagnostics. JTAG or P1500 or other interface mechanism Desirable competencies The Candidate Is Expected To Have Exposure To Compression tools is highly desirable LBIST, mixed-signal testing, logic equivalence Writing testbenches and should be capable of writing RTL code for DFT blocks as and when required. Bridge fault detection is desirable ATE exper...

As a candidate for the role, you should possess a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or have equivalent practical experience. Additionally, you need to have at least 5 years of experience in Application-Specific Integrated Circuit (ASIC) design for test, including managing the silicon life cycle through DFT pattern bring-up on Automatic Test Equipment (ATE) and manufacturing. It is crucial that you have familiarity with ATPG, Low Value (LV), Built-in Self Test (BIST), or Joint Test Action Group (JTAG) tool and flow. Preferred qualifications for this position include proficiency in a programming language such as Pe...

Role Overview: As a member of our dynamic team, you will contribute to the development of custom silicon solutions that drive the future of Google's direct-to-consumer products. Your role will be pivotal in innovating products that are globally cherished, influencing the next wave of hardware experiences to deliver exceptional performance, efficiency, and integration. You will work towards Google's mission of organizing the world's information and making it universally accessible and useful, synergizing the best of Google AI, Software, and Hardware to craft profoundly beneficial experiences. The team is dedicated to researching, designing, and advancing new technologies and hardware to enhan...

You have an exciting opportunity as a DFT Lead with Synopsys Tools in Bangalore. With over 10 years of experience in DFT, you are well-versed in all aspects including SCAN/ATPG, MBIST, and Boundary Scan. Your expertise lies in DFT logic integration and verification, along with debugging low coverage issues and DRC fixes. You have hands-on experience in gate-level ATPG simulation with and without timing, as well as pattern generation, verification, and delivery to the ATE team. Post silicon, you excel in debug and support on failing patterns, ensuring smooth operations. Your proficiency in tools like TestMAX from Synopsys is commendable. You have a knack for developing and automating flows an...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are seeking innovative and out-of-the-box thinking Design For Test (DFT) Engineers to be a part of the Fast Solution Team under the Test Group at Synopsys. You are someone who thrives in a project-oriented environment, delivering comprehensive DFT solutions ranging from integra...

You will be responsible for DFX Verification as a DFX Engineer at Eximietas. With 4-10 years of experience, you should have a good background in SoC RTL verification and debug, GLS simulations and debug, Verilog coding, and a solid understanding of JTAG and verification in Test Mode. It would be beneficial to have experience in pattern generation and Silicon debug. The role does not require MBIST/SCAN related experience. The location for this position is Visakhapatnam. If you meet the requirements and are interested in this opportunity, please share your updated resume with us at maruthiprasad.e@eximietas.design.,

You should hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or possess equivalent practical experience. Additionally, you should have at least 5 years of experience in Application-Specific Integrated Circuit (ASIC) design for test, encompassing the silicon life cycle through DFT pattern bring-up on Automatic Test Equipment (ATE) and manufacturing. It is crucial to have familiarity with ATPG, Low Value (LV), Built-in self-test (BIST), or Joint Test Action Group (JTAG) tool and flow. Ideally, you should also have experience with a programming language like Perl, along with expertise in Synthesis, Lint, Change Data Capture ...

As a candidate for the role, you should possess a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or have equivalent practical experience. Additionally, you need to have at least 5 years of experience in Application-Specific Integrated Circuit (ASIC) design for test, including managing the silicon life cycle through DFT pattern bring-up on Automatic Test Equipment (ATE) and manufacturing. It is crucial that you have familiarity with ATPG, Low Value (LV), Built-in Self Test (BIST), or Joint Test Action Group (JTAG) tool and flow. Preferred qualifications for this position include proficiency in a programming language such as Pe...

Job Descriptions for DFT: Required Technical and Professional Expertise in DFT Minimum 6 to12 years of relevant experience . Proficient in DFT architectures & methodologies that includes MBIST insertion, pattern generation etc. Sound knowledge of DFT tools/methodology from cadence /Synopsys/Mentor tools Good Experience in Python/Perl/TCL scripting Job Location : Bangalore Job Descriptions for DFT: Required Technical and Professional Expertise in DFT Minimum 9 to 13 years of relevant experience . Proficient in DFT architectures & methodologies that includes Scan insertions, ATPG, MBIST, JTAG, etc. Sound knowledge of DFT tools/methodology from cadence /Synopsys/Mentor tools Good Experience in ...

Key Responsibilities: Develop and implement DFT architecture with a focus on MBIST for advanced SoCs. Integrate MBIST IPs, generate test insertion and verification infrastructure. Work on DFT planning, insertion, simulation, and pattern generation. Perform ATPG and MBIST pattern generation and debug failures from silicon bring-up. Collaborate with RTL, Physical Design, and Verification teams throughout the design cycle. Support silicon bring-up and yield improvement activities post-silicon. Ensure high coverage and test quality in scan and MBIST. Required Skills and Experience: B.E/B.Tech or M.E/M.Tech in Electronics or related field. Minimum 7 + years of hands-on experience in DFT with a st...

Introduction As a Hardware Developer at IBM, youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in todays market. Your Role and Responsibilities : We are seeking highly motivated DFT engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBMs microprocessor chip design team. As a member of functional DFT team ( Power on Reset, Architecture Verification Program, Array BIST teams ), you will be required but n...