3.0 - 5.0 years

5 - 14 Lacs

hyderabad

Work from Office

Dear Candidate's find the below details & JD Experience: 3-5 years Notice period: immediate - 15 days Location: Hyderabad interview: 2-3 rounds Job Description: - Develop standard cell layouts and detailed drawings from schematics - Perform physical verification and layout optimization - Collaborate with design engineering and CAD teams - Ensure design rules, yield, and reliability requirements are met. - Expertise in Cadence tools, including Virtuoso and Caliber - Strong understanding of layout fundamentals and physical verification - Excellent problem-solving and communication skills. Interested Designers can share their Updated resume at kalyanreddy.k@acesoftlabs.com Note: matching profil...

Posted 3 weeks ago

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Photo Mask || Mask Layout Design Engineer Acesoft Labs

3.0 - 8.0 years

10 - 20 Lacs

hyderabad

Work from Office

Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...

Posted 1 month ago

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Layout || Mask Designer Acesoft Labs

3.0 - 8.0 years

10 - 15 Lacs

bengaluru

Work from Office

Posted 1 month ago

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Analog Layout Engineer Acesoft Labs India Private Limited

3.0 - 5.0 years

8 - 23 Lacs

Hyderabad, Telangana, India

On-site

Experience: 3-5 years Notice period: immediate - 15 days Location: Hyderabad Interview: 2-3 rounds Mandate Skills: Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, CMOS process, standard cell layout, analog, mixed-signal and custom digital block designs , Virtuoso schematic editor Virtuoso layout L, XL & Verification tools like Mentor Caliber Interested Engineers can share their resumes at [HIDDEN TEXT] Note: matching profiles will get get Mail/Call from us.

Posted 3 months ago

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