2 Osat Jobs

Associate Director (Semiconductor Fabrication (FAB) Facilities - Clean Room) Job Summary We are seeking a highy skied FAB Expert HVAC Engineer to ead Dry Cean room design efforts for semiconductor fabrication (FAB) faciities. The idea candidate wi have deep expertise in semiconductor manufacturing processes, IS0 14644, industria drying and Laminar fow systems. This roe invoves coaborating with cross-functiona teams, ensuring compiance with industry standards, and driving innovative soutions for process efficiency and cost optimization. Responsibiities: Process Design & Optimization: Deveop cean room HVAC system process and design basis. Deveop optimum system configuration for cooing / heating/ humidification and De-humification. Equipment & Technoogy Integration: Assess and recommend equipment ike Dry-cooing, dehumidification and desiccant dryers. Coaborate with vendors for equipment seection, instaation, and vaidation. Compiance & Standards: Ensure adherence to industry reguations (SEMI, ISO, OSHA, ASHRAE, NFPA, NBC-2016 etc.). Work with reguatory bodies and interna teams to meet safety and environmenta requirements. Coaboration & Coordination: Work cosey with architects, MEP engineers, and faciity panners for efficient utiity ayout designs. Coordinate with cients and stakehoders to aign process requirements with project goas. Provide technica guidance to junior engineers and support training initiatives. Project Documentation: Understanding requirements for cean rooms Cooing / heating oad estimations with Psychrometric anaysis of process. Design basis report SLDs, I/O summery and Contro ogics Preferred Quaifications: Experience in greenfied and brownfied FAB design. Famiiarity with sustainabiity practices in semiconductor manufacturing. Understanding of oca authority reguations for FAB faciity approvas and permitting Quaifications Bacheor's or Masters degree in Chemica Engineering, Mechanica Engineering, or a reated fied. Ph.D. in semiconductor process engineering is a pus. 15+ years of experience in semiconductor fabrication, process engineering, or reated fieds. Hands-on experience with semiconductor HVAC and utiity design. Strong understanding of the semiconductor manufacturing processes (ithography, etching, deposition, CMP, metroogy, etc.). Experience with Energy modeing and simuation toos is an advantage. Additiona Information Technica Skis: Strong knowedge of utiity design for the semiconductor FABs. Proficiency in software toos ike AutoCAD, Revit, BIM, and IES-VE. Soft Skis: Exceent probem-soving, anaytica, and decision-making abiities. Strong communication skis for cross-functiona teamwork and cient interactions. Abiity to manage mutipe projects and work in a fast-paced environment.

Work with Us. Change the Word. At AECOM, we're deivering a better word. Whether improving your commute, keeping the ights on, providing access to cean water, or transforming skyines, our work heps peope and communities thrive. We are the word's trusted infrastructure consuting firm, partnering with cients to sove the words most compex chaenges and buid egacies for future generations. There has never been a better time to be at AECOM. With acceerating infrastructure investment wordwide, our services are in great demand. We invite you to bring your bod ideas and big dreams and become part of a goba team of over 50,000 panners, designers, engineers, scientists, digita innovators, program and construction managers and other professionas deivering projects that create a positive and tangibe impact around the word. We're one goba team driven by our common purpose to deiver a better word. Join us. Job Summary AECOM is seeking a highy skied FAB Expert Space Management to ead the panning, aocation, and optimization of space within semiconductor fabrication (FAB) faciities. This roe invoves ensuring efficient utiization of ceanroom areas, equipment ayouts, materia fow, and support spaces whie maintaining compiance with industry standards. The idea candidate wi work cosey with process engineers, architects, and faciity panners to deveop ayouts that enhance operationa efficiency, safety, and sustainabiity. Responsibiities: Pant Layout, Space Panning & Layout Optimization: Deveop overa pant ayout for semi-conductor projects ensuring compiance to the statutory requirements. Deveop and optimize space ayouts for ceanrooms, sub-fabs, utiities, and supporting infrastructure ensuring compiance to O&M and EHS requirements. Ensure efficient aocation of equipment, process toos, and materia fow pathways. Maximize space utiization whie maintaining fexibiity for future expansions or modifications. Faciity Coordination & Design Integration: Coordinate with process engineers to aign space requirements with production needs. Ensure proper separation of process zones, hazardous materia areas, and cean storage spaces. Coaborate with process, civi, architects, structura engineers, and MEP teams to aign space panning with faciity design. Coaborate with the MEPF teams to ensure compiance with ceanroom cassification requirements (ISO 14644) and contamination contro strategies. Pan for utiities, access corridors, and ogistics fow to minimize production disruptions. Faciitate ergonomic and accessibiity considerations for operators and maintenance personne. Cash Coordination for interference free design Reguatory Compiance & Safety Considerations: Ensure compiance with oca authority reguations, fire codes, and industry safety standards. Address environmenta and sustainabiity considerations, incuding energy efficiency and waste management. Work with permitting agencies to secure approvas for space-reated modifications. Project Documentation: Deveop Pant Layout, space panning reports, GA drawings, and 3D modes to communicate ayout designs. Assist in feasibiity studies and cost-benefit anaysis for space utiization strategies. Preparation and updation of pant / system ayouts for AHJ approvas Support commissioning and vaidation of space ayouts before faciity operations begin. Quaifications Bacheors or Masters degree in Chemica Engineering, Architecture, Industria Engineering, Mechanica Engineering, Faciity Panning, or a reated fied. 15 + years of experience in FAB faciity panning, space management, or semiconductor manufacturing environments. Hands-on experience in ceanroom ayout panning, materia handing systems, and factory automation. Additiona Information Soft Skis: Strong anaytica and probem-soving abiities. Exceent communication and coordination skis with cross-functiona teams. Abiity to manage mutipe projects and adapt to fast-paced environments. Technica Skis: Experience in greenfied and brownfied FAB projects. Knowedge of sustainabiity best practices in semiconductor manufacturing. Famiiarity with oca authority reguations for space panning and faciity approvas. Proficiency in AutoCAD, Revit, BIM, and other faciity panning toos. Understanding of buk gases, speciaty gases, chemicas, ceanroom cassifications, HVAC requirements, contamination contro and MEP requirements. Famiiarity with Lean manufacturing, Six Sigma, and process optimization techniques.