Standard Cell Characterization Exiger Technologies

3.0 - 8.0 years

20 - 35 Lacs

bengaluru

Work from Office

We are looking for passionate and skilled Standard Cell Characterization Engineers to join our semiconductor design team in Bangalore. The role involves development, characterization, and validation of standard cell libraries to ensure optimal performance, power, and area (PPA). Responsibilities: Develop and support standard cell libraries. Perform PPA trade-off analysis between different cell architectures. Collaborate with layout team on floor plan, schematic, and layout guidelines. Design and implement combinatorial, sequential, and power management circuits. Run equivalence verification (e.g., ESPCV). Characterize and generate library views across multiple PVT corners. Support PnR, Simulation, and Signoff flows. Hands-on with EDA tools (SPICE, RC extraction, schematic/layout editors). Work with LEF, NLDM, CCS, .LIB views. Automate workflows using Python, Perl, or TCL scripting. Requirements: B.E/B.Tech/M.Tech in Electronics/VLSI or related field. 36 years of experience in Standard Cell Characterization. Strong knowledge of circuit design fundamentals, SPICE simulations, and EDA flows. Good debugging and analytical skills.

Posted 14 hours ago

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Analog Design Engineer- Staff Synopsys

4.0 - 8.0 years

0 Lacs

noida, uttar pradesh

On-site

The successful candidate will be responsible for Characterization, CAD views generation, and Packaging of General purpose and Specialty IOs. You will independently drive the generation and validation methodologies for various views including .lib (NLDM/NLPM, CCST/P/N, variation modeling, etc.), APL, CMM, BPA, Verilog, ATPG, NDM, LEF, IBIS, among others. In addition to this, you will create, validate, and release these IP packets ensuring timeliness and highest quality. Furthermore, mentoring team members on different flows and methodologies will be part of your responsibilities. Your main tasks and duties will include setting up the generation and validation flow methodologies for different EDA views, handling the complete Characterization, packaging, QA, and release process independently, ensuring high-quality and timely deliverables, ensuring downstream flow compliance of different views, defining specifications for automation by the Software team, exploring new views and flows across various technologies and foundries, and driving their implementation in our development environment. You will also collaborate with Design and layout teams to understand design and flow requirements, as well as analyze customer issues and provide timely resolutions. Qualifications for this role include a B.Tech/BE/M.Tech/MS in Electronics Engineering, a minimum of 4 years of experience in IP characterization and packaging, prior experience in setting IP Characterization and EDA views generation and validation methodologies/flows, a strong understanding of both Electrical and Physical views, working experience in design simulation environment (preferred), hands-on experience with scripting languages (preferred), basic understanding of IO designs (preferred), and experience in Digital implementation flows where IP views are utilized (a plus).,

Posted 1 week ago

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