5.0 - 9.0 years

0 Lacs

karnataka

On-site

Role Overview: You will conceptualize, document, and design tools, flows, and methods (TFM) for use in physical design implementation of IPs, SoCs, and the interaction/handoff/reuse between IPs and SoCs. You will establish regression flows, drive improvement in RTL to GDS flows, and create and implement methodologies for improving robustness, power, performance, area, and timing for optimizing physical design constraints. Additionally, you will develop new physical design techniques through innovative scripts, checkers, flows, and other CAD-based automation to simplify and expedite the design process. You will analyze retrospective data on current generation quality and efficiency gaps to id...

Posted 1 month ago

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SoC DV Lead Coventine Digital

8.0 - 13.0 years

7 - 17 Lacs

Bengaluru

Work from Office

Job Description: We are looking for an experienced SoC DV Lead with a strong background in SoC verification and hands-on experience in writing C test cases for SoC-level DV. Key Responsibilities: Lead SoC DV activities from planning to closure Develop and debug C-based test cases for system-level verification Work closely with design, architecture, and firmware teams Perform coverage analysis and ensure comprehensive validation Guide and mentor junior DV engineers Key Skills: SoC-level design verification C programming for test development Debugging and problem-solving Exposure to UVM/SystemVerilog (preferred) Strong understanding of SoC architecture

Posted 3 months ago

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