Network Packet Processing Core DV Sr Engineer

As a Qualcomm Hardware Engineer, your role involves planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. - Develop verification environment and testbench components such as BFM and checkers - Develop a comprehensive test plan for unit level verification of IP/Module features and implement test cases - Verify design in unit level environment using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification - Write functional cover-groups and cover-points for coverage closure - Perform RTL code coverage, assertion coverage, functional coverage, and gate-level simulations - Verify designs at the system level and block level using constrained random verification - Operate at an Expert level in System Verilog and UVM based verification - Code SV Testbench, drivers, monitors, scoreboards, checkers - Have strong and independent design debugging capability - Understand AHB, AXI, and other bus protocols, digital design, and system architecture - Understand TCP/IP Packet Processing Algorithms like Filtering, Routing, NAT, Decipher, Checksum, Ethernet Bridging, Tunneling - Communicate effectively with Engineering Management and team members - Be self-motivated with a good teamwork attitude and function with minimal guidance - Bachelor's or Masters Degree in Engineering in Electronics, VLSI, Communications, or a related field - 2-5 years of strong experience in digital front end ASIC design verification,