37 Nand Jobs - Page 2

As a Director of NVEG PE Hardware (Test Platform Enablement) at Micron Technology, you will have the opportunity to lead a team of engineers in developing and qualifying cost-effective engineering test platforms. Your strategic leadership will be crucial in enabling the PE test infrastructure to test, debug, and characterize NAND components and system products. Collaboration with cross-functional teams such as Test Engineering, System Integration, ASIC, and FW teams will be essential in qualifying and ramping up cutting-edge NAND and system Micron products. Your key responsibilities will include designing, developing, and qualifying PE test hardware, platforms, firmware, and software. Collaboration with various teams to align testing efforts with business goals, providing engineering test solutions for product development, and driving the adoption of automation tools to enhance testing efficiency will be crucial aspects of your role. Additionally, you will be responsible for supporting new protocol enablement, conducting test capability gap analysis, and providing guidance on career development within your team. To excel in this role, you should possess knowledge of storage interfaces such as High-Speed ONFI, UFS, PCIe, and have an understanding of memory and storage system behavior, architecture, and design. Strong statistical knowledge, data analysis, problem-solving, and decision-making skills are essential, along with excellent organizational, communication, presentation, and leadership skills. The ability to work independently, lead cross-functional teams, and adapt to change in a fast-paced environment will be key to your success. A minimum of a Bachelors degree in Electrical, Electronics, or Computer Engineering, along with 10+ years of experience in semiconductor testing, including hardware and software knowledge, with at least 5 years in a leadership role, is required for this position. Micron Technology is a global leader in innovative memory and storage solutions, driving advancements in artificial intelligence and 5G applications. If you are self-motivated, enthusiastic, and possess the necessary skills and experience, we invite you to explore a career with us at Micron Technology, Inc. For more information, please visit micron.com/careers. If you require assistance with the application process or need reasonable accommodations, please contact hrsupport_india@micron.com. Micron strictly prohibits the use of child labor and complies with all applicable labor laws and standards.,

As an Associate Software Engineer Intern at Micron Technology, you will be part of a global leader in innovating memory and storage solutions. Our vision is to transform how the world uses information to enrich life for all, accelerating the transformation of information into intelligence. We inspire the world to learn, communicate, and advance faster than ever before. Micron Technology, Inc. is dedicated to providing innovative memory and storage solutions that impact the way information is used to enhance lives globally. With a strong customer focus, technological leadership, and operational excellence, we offer a diverse portfolio of high-performance DRAM, NAND, and NOR memory and storage products under the Micron and Crucial brands. Our team's daily innovations drive the data economy, facilitating progress in artificial intelligence and 5G applications across various platforms, from data centers to mobile user experiences and the intelligent edge. At Micron, we are committed to upholding labor standards and do not condone the use of child labor. We comply with all relevant laws, regulations, and international labor standards to ensure ethical practices within our organization. For more information about our company and career opportunities, please visit micron.com/careers. If you require assistance with the application process or need reasonable accommodations, feel free to reach out to hrsupport_in@micron.com. Join us on our journey to shape the future of information technology and make a positive impact on the world.,

Looking for PCB layout design Engineers with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Hands-on experience with High-speed interfaces like DDR3,DDR4, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constrains setup for high-speed modules to match its requirement (Length match, impedance, delay tuning requirements) Experience in Power supply layout design types: AC to DC, DC to DC converters and SMPS. Creation of file type conversions from PCB to DXF, IDF, Step file Power supply layout designs & its critical requirements to meet stringent isolations. Gerber validation and generations of final deliverables for DFM. Working experience on Gerber viewers using Cam350, ODB++ viewer. Collaborating with multiple functional teams like design, SI/PI, mechanical, DFM, DFA etc. in a product development environment knowledge on Power dc, Thermal design, simulation and analysis knowledge of OrCAD schematic Design Tool Collaboration with cross functional teams: Software, Electrical, Mechanical and PCB CAD teams Hands-on experience with Cadence Allegro/Altium EDA/PADS tools is essential. Educational Qualification: B Tech/M. tech/BE/ME, Diploma Location: Hyderabad Shift: General Exp.: 4-6 Years Work Week: Monday to Friday

Looking for PCB layout design Engineer with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Exposure with complex 2U, 3U server form factor-based PCB designs. Hands-on experience with High-speed interfaces like DDR3,DDR4/5, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constraints setup for high-speed modules to match its requirement (Length match, impedance, delay tuning requirements) Experience in Power supply layout design types: AC to DC, DC to DC converters and SMPS. Creation of file type conversions from PCB to DXF, IDF, Step file collaboration with Mechanical Engineer. Power supply layout designs & its critical requirements to meet stringent isolations. Gerber validation and generations of final deliverables for DFM. Working experience on Gerber viewers using Cam350, ODB++ viewer. Collaborating with multiple functional teams like design, SI/PI, mechanical, DFM, DFA etc. in a product development environment knowledge on Power dc, Thermal design, simulation and analysis knowledge of OrCAD schematic Design Tool Collaboration with cross functional teams: Software, Electrical, Mechanical and PCB CAD teams Hands-on experience with Cadence Allegro/Altium EDA/PADS tools is essential. Education Requirements: B. Tech/B.E./M. Tech./M.E. Shift: 9:30 AM to 6:30 PM Work Mode: Office (Monday to Friday)

As a Senior Base STD Characterization Engineer, you will work in a highly innovative, motivated, young, and dynamic design team capable of verifying complete products using state of the art STD Cells , Custom Cells on latest CMOS process technology Responsibilities Silicon smart based STD cell characterization experience. Writing vector/ARC for STD Cells Responsibilities for hspce (hspice/spectre) based characterization. Circuit understanding Basic building blocks - AND , NAND , NOR , latches , flops design understanding Block level circuit simulation , Analysis capability STD cell timing checks - linearity , monotonicity , QA experience Analysis of Circuits , Timing concepts schematic analysis Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Opportunities to work closely with cross functional groups such as Product Engineering and Design Architecture. May also review vendor capability to support product development. 3-5 years of experience

As a Senior Base STD Characterization Engineer, you will work in a highly innovative, motivated, young, and dynamic design team capable of verifying complete products using state of the art STD Cells , Custom Cells on latest CMOS process technology Responsibilities Silicon smart based STD cell characterization experience. Writing vector/ARC for STD Cells Responsibilities for hspce (hspice/spectre) based characterization. Circuit understanding Basic building blocks - AND , NAND , NOR , latches , flops design understanding Block level circuit simulation , Analysis capability STD cell timing checks - linearity , monotonicity , QA experience Analysis of Circuits , Timing concepts schematic analysis Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Opportunities to work closely with cross functional groups such as Product Engineering and Design Architecture. May also review vendor capability to support product development. 3-5 years of experience

As a Senior Base STD Characterization Engineer, you will work in a highly innovative, motivated, young, and dynamic design team capable of verifying complete products using state of the art STD Cells , Custom Cells on latest CMOS process technology Responsibilities Silicon smart based STD cell characterization experience. Writing vector/ARC for STD Cells Responsibilities for hspce (hspice/spectre) based characterization. Circuit understanding Basic building blocks - AND , NAND , NOR , latches , flops design understanding Block level circuit simulation , Analysis capability STD cell timing checks - linearity , monotonicity , QA experience Analysis of Circuits , Timing concepts schematic analysis Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Opportunities to work closely with cross functional groups such as Product Engineering and Design Architecture. May also review vendor capability to support product development. 3-5 years of experience

Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Application Engineer, you will provide technical expertise of hardware through trainings, product demonstrations, and the design, debug, test, and quality support of customer products. Qualcomm Hardware Application Engineers collaborate with cross-functional teams to assess the potential application of company products that meet and exceed customer needs. Minimum Qualifications: "¢ Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 2+ years of Hardware Applications Engineering or Hardware Design experience or related work experience. OR Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 1+ year of Hardware Applications Engineering or Hardware Design experience or related work experience. OR PhD in Electrical/Electronics Engineering, Computer Engineering, or related field. IOT JD Title IOT Applications Engineering "“ Senior Engineer Job Function Qualcomm is seeking candidates to assist its customers in designing IoT solutions utilizing Qualcomm hardware and software. The individual will contribute to the dynamic Customer Engineering team for product designs and will be responsible for supporting Qualcomm's expanding portfolio of platforms and applications. This role involves collaborating closely Qualcomm customers to support hardware design sign-offs, system/PCB/chip-level debugging, and ownership of design collaterals that helps customers to bring out products faster. Preferred Qualifications A strong understanding of Digital/baseband HW design and PCB design is required. Good troubleshooting skills with the ability to analyze and debug during board bring up (boot-up) are essential. An understanding of LDO/SMPS is essential, along with experience in power management for portable devices being advantageous. Solid knowledge in High-Speed digital interfaces, such as memory Bus I/F (UFS, eMMC, LPDDR, NAND), Display interfaces (parallel and serial, preferably MIPI DSI), Camera interfaces (parallel and serial, preferably MIPI CSI), High Speed peripherals (USB, SDC, PCIe, Ethernet), and Standard Peripheral interfaces (UART, SPI, I2C, JTAG, HDMI) are necessary. Experience with Digital HW/baseband systems and board-level design, as well as familiarity with Digital ASICs and system design, is important. Understanding of system-level clocking schemes, interface-level handshakes are necessary A strong understanding of mobile and consumer electronics products is needed. Hands-on experience with oscilloscopes, logic analyzers, test and measurement tools are required. Basic knowledge of ARM processors and experience with JTAG emulators, display drivers, and memory is preferable. Knowledge of multi-core system/inter-chip system design is advantageous. A strong understanding of PCB signal/power integrity is necessary Must be comfortable in reviewing schematics and suggesting improvements is required. Experience with schematic entry is a plus. Must have knowledge to review PCB layout in various CAD tools like Cadence Allegro, Siemens Mentor Graphics suite. Knowledge of multi-layer PCB designs, vias, and stack-up configuration is essential. The ability to interact with multi-geography customers and stakeholders is desired. Knowledge of prototyping platforms like Arduino and Raspberry Pi is beneficial. About The Role As a member of Qualcomm's Customer Engineering team, responsibilities include creating chip and chipset documentation, reference schematics, and training materials for global customer support. Candidate will assist with hardware design reviews, respond to technical queries, and troubleshoot designs at the system, SoC, and PCB levels. A minimum of 3 years' relevant experience is required, along with skills in hardware, digital/high speed/power management, and Silicon validation. Keywords Board Design, Board bring up, UFS, LPDDR, NAND, eMMC, MIPI, USB, UART, SPI, I2C, Logic Analyzer, PADS, Allegro, LDO, SMPS, Clocks, Crystal, ARM processor, JTAG Educational Requirements RequiredBachelor's, Electronics and/or Electrical Engineering PreferredMaster's, Electronics and/or Electrical Engineering

Job Title: Linux Core Platform Storage Development Lead Experience : 8 to 10 + Years Location: Hyderabad Key Responsibilities: 1. Architect & Lead Storage Subsystem Development: Design and lead implementation of Linux-based storage stack for embedded or server platforms. Define architecture for storage interfaces (eMMC, UFS, NVMe, SATA, SD, USB mass storage, etc.). Optimize for performance, power, and reliability on target SoC or platform. 2. Driver Development & Integration: Develop and maintain Linux kernel drivers for storage devices and controllers. Ensure upstream alignment with mainline Linux or maintain vendor-specific forks as needed. Integrate vendor storage controller IPs and firmware. 3. File System & Block Layer Expertise: Work with Linux file systems (ext4, f2fs, xfs, btrfs). Optimize storage stack performance using IO schedulers, caching strategies, and tuning. 4. Reliability, Data Integrity & Power Resilience: Implement support for journaling, wear leveling (especially for flash), secure erase, and TRIM. Ensure data integrity during power loss (power-fail robustness). Work with hardware teams on power rail sequencing and power management integration. 5. Cross-Functional Collaboration: Coordinate with SoC vendors, QA, product management, and firmware/hardware teams. Collaborate with bootloader, security, and OTA (Over-The-Air) update teams for seamless storage handling. 6. Debugging & Performance Analysis: Use tools like blktrace, iostat, fio, perf, strace, and kernel logs for performance and issue analysis. Root cause field issues (e.g., storage corruption, I/O latency) across layers. 7. Compliance & Validation: Validate storage against JEDEC/UFS/SD/USB/NVMe standards. Ensure support for secure boot, encrypted storage (dm-crypt, LUKS), and SELinux/AppArmor policies where needed. 8. Mentorship & Leadership: Lead and mentor a team of kernel and platform developers. Conduct code reviews and establish best practices for Linux storage development.

Key Responsibilities Develop and maintain firmware for storage devices. Implement new features and optimize existing functionalities. Perform debugging and troubleshooting of firmware issues. Collaborate with cross-functional teams to ensure seamless integration of firmware with hardware. Create and maintain documentation for firmware development processes. Requirements Bachelors or masters degree in computer science, Electrical Engineering, or a related field. 2 to 10+ years of experience in firmware development for storage or embedded systems. Strong firmware design and debug experience using assembly and C programming. Deliver on cutting-edge storage products with interfaces like SAS, SATA, NVMe, PCIe. Work with cross functional teams to develop HDD/SSD/NAND products would be a strong plus. Strong problem-solving and analytical skills.

Looking for PCB layout design Engineer with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Exposure with complex 2U, 3U server form factor-based PCB designs. Hands-on experience with High-speed interfaces like DDR3,DDR4/5, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constraints setup for high-speed modules to match its requirement (Length match, impedance, delay tuning requirements) Experience in Power supply layout design types: AC to DC, DC to DC converters and SMPS. Creation of file type conversions from PCB to DXF, IDF, Step file collaboration with Mechanical Engineer. Power supply layout designs & its critical requirements to meet stringent isolations. Gerber validation and generations of final deliverables for DFM. Working experience on Gerber viewers using Cam350, ODB++ viewer. Collaborating with multiple functional teams like design, SI/PI, mechanical, DFM, DFA etc. in a product development environment knowledge on Power dc, Thermal design, simulation and analysis knowledge of OrCAD schematic Design Tool Collaboration with cross functional teams: Software, Electrical, Mechanical and PCB CAD teams Hands-on experience with Cadence Allegro/Altium EDA/PADS tools is essential. Education Requirements: B. Tech/B.E./M. Tech./M.E. Experience: 5 to 8 Years Location: Hyderabad Shift: 9:30 AM to 6:30 PM Work Mode: Office (Monday to Friday)

Looking for PCB layout design Engineers with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Hands-on experience with High-speed interfaces like DDR3,DDR4, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constrains setup for high-speed modules to match its requirement (Length match, impedance, delay tuning requirements) Experience in Power supply layout design types: AC to DC, DC to DC converters and SMPS. Creation of file type conversions from PCB to DXF, IDF, Step file Power supply layout designs & its critical requirements to meet stringent isolations. Gerber validation and generations of final deliverables for DFM. Working experience on Gerber viewers using Cam350, ODB++ viewer. Collaborating with multiple functional teams like design, SI/PI, mechanical, DFM, DFA etc. in a product development environment knowledge on Power dc, Thermal design, simulation and analysis knowledge of OrCAD schematic Design Tool Collaboration with cross functional teams: Software, Electrical, Mechanical and PCB CAD teams Hands-on experience with Cadence Allegro/Altium EDA/PADS tools is essential. Educational Qualification: B Tech/M. tech/BE/ME, Diploma Location: Hyderabad Shift: General Exp.: 4-6 Years Work Week: Monday to Friday