129 Modelsim Jobs - Page 3

Through our dedicated associates, Conduent delivers mission-critical services and solutions on behalf of Fortune 100 companies and over 500 governments - creating exceptional outcomes for our clients and the millions of people who count on them. You have an opportunity to personally thrive, make a difference and be part of a culture where individuality is noticed and valued every day. Job Track Description: Performs business support or technical work, using data organizing and coordination skills. Performs tasks based on established procedures. In some areas, requires vocational training, certifications, licensures, or equivalent experience. General Profile Expands skills within an analytical or operational process. Maintains appropriate licenses, training, and certifications. Applies experience and skills to complete assigned work. Works within established procedures and practices. Works with a moderate degree of supervision. Functional Knowledge Has developed skillset in a range of processes, procedures, and systems. Business Expertise Supports the achievement of company goals by integrating teams for the best outcome. Impact Impacts a team through quality of services and information provided. Follows standardized procedures and practices and receives moderate supervision and guidance. Leadership Has no supervisory responsibilities. Manages own workload. Problem Solving Ability to problem solve, self-guided. Evaluates issues and solutions to provide the best outcome for the client and end-users. Interpersonal Skills Exchanges information and ideas effectively. Responsibility Statements Reviews current processes and identifies trends. Reviews work produced for errors. Evaluates for performance standards (SLAs) required under contract. Compares various sampling techniques and identifies correct samples for auditing. Evaluates workflow tools to run reports. Coaches Level 1 auditors on sampling techniques and business process knowledge. Reconciles transaction processing for data accuracy. Interacts with external auditors to include (SOC 1) Service and Organizational Control Report. Performs other duties as assigned. Complies with all policies and standards. Conduent is an Equal Opportunity Employer and considers applicants for all positions without regard to race, color, creed, religion, ancestry, national origin, age, gender identity, gender expression, sex/gender, marital status, sexual orientation, physical or mental disability, medical condition, use of a guide dog or service animal, military/veteran status, citizenship status, basis of genetic information, or any other group protected by law. People with disabilities who need a reasonable accommodation to apply for or compete for employment with Conduent may request such accommodation(s) by submitting their request through this form that must be downloaded:click here to access or download the form. Complete the form and then email it as an attachment toFTADAAA@conduent.com.You may alsoclick here to access Conduent's ADAAA Accommodation Policy. At Conduent we value the health and safety of our associates, their families and our community. For US applicants while we DO NOT require vaccination for most of our jobs, we DO require that you provide us with your vaccination status, where legally permissible. Providing this information is a requirement of your employment at Conduent.

locationsHYDERABAD, IND time typeFull time posted onPosted 3 Days Ago job requisition idR1148332 . TBA Offers of employment are conditional upon passage of screening criteria applicable to the job.

We are seeking an exceptional Senior ASIC Verification Engineer to join our innovative semiconductor team. You will lead verification initiatives for complex ASIC designs and drive technical excellence across projects. About the Role : You will be responsible for developing advanced verification environments, leading cross-functional technical initiatives, and mentoring team members while ensuring the highest quality standards in our ASIC designs. What You'll Do : - Design and implement advanced System Verilog/UVM verification infrastructures - Lead verification planning and execution for complex ASIC projects - Develop comprehensive test strategies ensuring thorough design validation - Drive debug resolution through collaboration with cross-functional teams - Mentor and provide technical guidance to verification team members - Enhance and optimize verification methodologies - Own end-to-end SOC verification environments Required Skills & Experience : - BS/MS in Electrical/Computer Engineering - 2+ years of hands-on ASIC verification experience - Expert-level SystemVerilog, UVM, and object-oriented programming skills - Strong proficiency with industry tools like VCS, Xcelium, QuestaSim - Advanced debugging and problem-solving capabilities - Excellent communication and collaboration abilities - CLP and GLS - Python/Perl scripting expertise Nice to Have : - Experience with PCIe, DDR, USB, C2C - Knowledge of on-chip interconnects and processor subsystems - Background in formal verification methods - Prior experience on Emulators

About The Role #body.unify div.unify-button-container .unify-apply-now:focus, #body.unify div.unify-button-container .unify-apply-now:hover{color:rgb(0,0,0) !important;}#body.unify div.unify-button-container .unify-apply-now:focus, #body.unify div.unify-button-container .unify-apply-now:hover{background:rgba(230,231,232,1.0) !important;} Apply now Principal Software Developer Job Location (Short): Hyderabad, India Workplace Type: Hybrid Business Unit: ALI Req Id: 1232 .buttontextb0d7f9bdde9da229 a{ border1px solid transparent; } .buttontextb0d7f9bdde9da229 a:focus{ border1px dashed #5B94FF !important; outlinenone !important; } Responsibilities We are looking for a young and productive software developer having 2-4 years of experience to join our team who works on providing 3DVisualization solutions for graphic interoperability and design review. Design and implementation of new functionalities in existing and new software applications. Quickly troubleshoot the issues identified in existing functionalities. Programming in C++, C#. Evaluating customer problems and developing solutions to them. Working in an agile environment. Knowledge on kubernetes, Azure devops is added advantage. Education / Qualifications Bachelor/Master degree in computer science engineering Good programming skills with hands on experience in C++/C#. Experience in the development of desktop applications. Experience with Git or a similar distributed version control system Good understanding of coding standards and following them consistently. Strong understanding of OOPS concepts. Good problem-solving and communication skills. About Hexagon Hexagon is the global leader in digital reality solutions, combining sensor, software and autonomous technologies. We are putting data to work to boost efficiency, productivity, quality and safety across industrial, manufacturing, infrastructure, public sector, and mobility applications. Our technologies are shaping production and people related ecosystems to become increasingly connected and autonomous – ensuring a scalable, sustainable future. Hexagon (Nasdaq StockholmHEXA B) has approximately 24,500 employees in 50 countries and net sales of approximately 5.4bn EUR. Learn more at?hexagon.com?and follow us?@HexagonAB. Hexagon’s R&D Centre in India Hexagon’s R&D Centre in India is the single largest R&D centre for the company globally. More than 2,000 talented engineers and developers create innovation from this centre that powers Hexagon's products and solutions. Hexagon’s R&D Centre delivers innovations and creative solutions for all business lines of Hexagon, including Asset Lifecycle Intelligence, Autonomous Solutions, Geosystems, Manufacturing Intelligence, and Safety, Infrastructure & Geospatial. It also hosts dedicated service teams for the global implementation of Hexagon’s products. R&D India – MAKES THINGS INTELLIGENT Asset Lifecycle Intelligence Produces insights across the asset lifecycle to design, construct, and operate more profitable, safe, and sustainable industrial facilities. Everyone is welcome At Hexagon, we believe that diverse and inclusive teams are critical to the success of our people and our business. Everyone is welcome—as an inclusive workplace, we do not discriminate. In fact, we embrace differences and are fully committed to creating equal opportunities, an inclusive environment, and fairness for all. Respect is the cornerstone of how we operate, so speak up and be yourself. You are valued here. .buttontext1c1d8f096aaf95bf a{ border1px solid transparent; } .buttontext1c1d8f096aaf95bf a:focus{ border1px dashed #0097ba !important; outlinenone !important; } #body.unify div.unify-button-container .unify-apply-now:focus, #body.unify div.unify-button-container .unify-apply-now:hover{color:rgb(0,0,0) !important;}#body.unify div.unify-button-container .unify-apply-now:focus, #body.unify div.unify-button-container .unify-apply-now:hover{background:rgba(230,231,232,1.0) !important;} Apply now

Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : SAP Sales and Distribution (SD) Good to have skills : Pricing Analytics and Modelling Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Developer, you will design, build, and configure applications to meet business process and application requirements. Your day will involve collaborating with teams to develop solutions and ensure seamless application functionality. Roles & Responsibilities:-Responsible for analyzing business/technical needs and translating process into practice through the current Information Technology tool sets. The role will also implement new solutions through configuration and creation of functional specifications and facilitate solution realization. In addition, the role will have responsbilities for conducting testing and trouble shooting solutions. Analyze business/technical needs and translate process into practice through the current Information Technology tool sets. Implement new solutions through configuration and creation of functional specifications and facilitate solution realization. Conduct full integration testing of new or changed business/technical processes. Develop business/technical cycle tests for use by stakeholder community. Document all process changes and provide knowledge to relevant stakeholders Troubleshoot, investigate and persist. Develop solutions to problems with unknown causes where precedents do not exist by applying logic and inference with creativity and initiative. Provide cross-functional support and maintenance for responsible business/technical areas. Conduct cost/benefit analysis through evaluation of alternative design approaches to determine best-balanced solution. Best-balanced solution is one that satisfies the immediate stakeholder needs, meets system requirements and facilitates subsequent change. Assume leadership role in a small size initiatives by playing the key contributor, facilitator or group lead. Professional & Technical Skills: Must To Have Skills: Proficiency in SAP Sales and Distribution (SD) Good To Have Skills: Experience with Pricing Analytics and Modelling Strong understanding of SAP SD modules and functionalities Experience in customizing and configuring SAP SD applications Knowledge of integration with other SAP modules Ability to troubleshoot and resolve technical issues efficiently Additional Information: The candidate should have a minimum of 5 years of experience in SAP Sales and Distribution (SD) This position is based at our Hyderabad office A 15 years full-time education is required Qualification 15 years full time education

Skills: Programming Language : Strong in VHDL along with Working knowledge on Verilog/System-Verilog Preferable Skills: * Use of tools such as Quartus, Vivado, Libero and their IPs * Experience with using any simulator (Modelsim, XSIM, etc.) * Deep understanding of FPGA design flow including RTL design, verification, logic synthesis, timing analysis, floor-planning, ECO, bring-up & lab debug. * Experience with gate-level understanding of RTL and synthesis * Experience with basic lab equipment such as Logic analyzers, scopes, protocol analyzers, etc. * Development experience and board level debugging on Ethernet (1G, 10G) experience is preferable * Experience in DDR3/DDR4 is preferable * Experience in AMBA/AXI is preferable * Good interpersonal and communication skills Vhdl

AMD is looking for a talented, self-driven and motivated engineer to technically lead AIG s Simulation Modeling projects working on AMD s XDNA (AI Engine) architecture and the Vitis AI family of software tools. The XDNA is an industry leading architecture in terms of performance per watt and is used in AMD s client and embedded devices as the primary engine for Machine Learning workloads. It is the hardware engine behind Windows Co-pilot on AMD devices. The team provides a fast-paced environment offering each of its members immense opportunity to interact with a wide variety of people including from other organizations like hardware designers, marketing, support, and even direct customer interaction, and truly learn and grow their skills and capabilities. THE PERSON: The ideal candidate should be passionate about software engineering and possess leadership skills to drive sophisticated technical issues to resolution. They should have demonstrated ability to identify technical problems, explore and propose viable options, and apply technical solutions. They should be able to excel in a global team environment with strong verbal and written communication skills. . KEY RESPONSIBILITIES: Vitis AI is AMD s primary SDK that enables users to compile and run their ML models on the XDNA architecture. As a senior member of this high-performance team, the selected candidate will have responsibility to model the XDNA architecture in terms of functionality, accuracy and simulation speed. Candidate will work with compiler, runtime/driver teams to bring up latest AI models like CNNs, Transformers, StableDiffiusion, NLPs etc. on the XDNA simulator. This is a crucial part of AMD s shift-left strategy for the successful bring up of new devices and day 0 enablement of models. Candidates would develop a deeper understanding of the various ML models, and how they are executed, identify performance bottlenecks and enable faster development. PREFERRED EXPERIENCE: Minimum 10 years of relevant work experience. Strong background in C++ based development and debug, dealing with multi-threaded infrastructure and performance optimization Experience in creating cycle accurate modeling of IPs in C++ or SystemC / TLM. Understanding of SoCs, and bringing up of software stack from driver to application on simulation model. Understanding hardware metrics like latency/throughput on any sub-system, and what changes impact those metrics. Experience in software development environment on both Linux and Windows is required. Experience in technologies like Virtual Platforms, SystemC/QEMU models, Emulation platforms, Hw/Sw co-design, and Performance analysis is desired. Familiarity with hardware languages like VHDL, Verilog and System Verilog for simulation using tools like Modelsim, VCS, Questa Sim is highly desired. ACADEMIC CREDENTIALS: Bachelor s or M asters degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Minimum of 5+ years"™ experience in the area of DFT-, ATPG, Scan Insertion, MBIST, JTAG -In depth knowledge of DFT concepts. -In depth knowledge and hands on experience in DFT(scan/mbist) insertion, ATPG pattern generation/verification, mbist verification and post silicon bring up/yield analysis -Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations. -Ability to analyze and devise new tests for new technologies/custom RAM design/RMA etc. -Expertise in scripting languages such as perl, shell, etc. -Experience in simulating test vectors. -Knowledge of equivalence check and RTL lint tool (like spyglass). -Ability to work in an international team, dynamic environment -Ability to learn and adapt to new tools and methodologies. -Ability to do multi-tasking & work on several high priority designs in parallel. -Excellent problem-solving skills

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 3+ years"™ experience in the area of DFT-, ATPG, Scan Insertion, MBIST, JTAG -In depth knowledge of DFT concepts. -In depth knowledge and hands on experience in DFT(scan/mbist) insertion, ATPG pattern generation/verification, mbist verification and post silicon bring up/yield analysis -Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations. -Ability to analyze and devise new tests for new technologies/custom RAM design/RMA etc. -Expertise in scripting languages such as perl, shell, etc. -Experience in simulating test vectors. -Knowledge of equivalence check and RTL lint tool (like spyglass). -Ability to work in an international team, dynamic environment -Ability to learn and adapt to new tools and methodologies. -Ability to do multi-tasking & work on several high priority designs in parallel. -Excellent problem-solving skills

As a FPGA Verification Engineer at Nokia, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. This role typically requires 3-6 years of experience developing SystemVerilog UVM-based test environments and implementing comprehensive test plans - at block, sub-chip and chip levels Strong proficiency in Hardware Verification Languages (HVL), with practical coding experience for verification tasks Practical experience using industry-standard simulators such as VCS, NC-Sim, or ModelSim (MTI), along with strong skills in waveform-based debugging. Solid understanding and practical application of UVM or similar modern verification methodologies. Experience with scripting languages such as Perl is highly valued and will help you stand out. It would be nice if you also had: Working knowledge of RTL design and familiarity with technologies like Ethernet, PCIe, and preferably telecom protocols. Strong analytical, troubleshooting, and problem-solving skills, with a structured and thorough approach to work. Good written and oral communication skills are required. Excellent written and verbal communication skills. Flexible, innovative, and self-driven team player with a strong willingness to take initiative. Design and develop comprehensive FPGA verification plans. Create and implement verification environments and testbenches. Develop and execute test scenarios for running simulations. Perform coverage analysis to ensure thorough verification. Provide lab support during FPGA and board bring-up phases. Collaborate closely with design and system teams to drive verification solutions. Independently manage verification tasks and projects. What We Offer: Opportunity to work in short product development cycles, allowing you to quickly see the real impact of your contributions on products and business success. International career development opportunities with internal mobility programs that encourage professional growth and advancement within the company. Access to a variety of social, wellness, and hobby clubs to support a balanced lifestyle and foster a sense of community. A friendly, inclusive, and supportive atmosphere where collaboration and mutual respect are core values. The chance to work alongside highly skilled, motivated, and innovative colleagues who are passionate about technology and excellence.

Working closely with a world-class R&D team, you ll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM). Working closely with customers, you will bring the detailed requirements into the factory to enable R&D for a strong, robust, and successful product development. Working closely with product development team, you will validate and end-to-end solution both internally (before shipment) as well as in customer environment. Driving the deployment and smooth execution of SLM solutions into customers projects. Enabling customers to realize the value of silicon health monitoring throughout the lifecycle of silicon bring-up, validation, through in-field operations. The Impact You Will Have: Enhancing Synopsys Silicon Lifecycle Management (SLM) IP portfolio and end-to-end solution. Driving the adoption of Synopsys SLM solutions at premier customer base worlwide. Influencing the development of next-generation SLM IPs and solutions. What You ll Need: BSEE/MSEE in Electrical Engineering, Computer Engineering, or related field. 4+ years of hands-on experience with SoC-level functional verification or Design-for-Test (DFT) or both. Good knowledge of AXI, APB Background in verification, with at least sub-system level verification Debugging abilities to identify issues in functional verification. Knowledge of DMA, ideally should have verified a sub-system with DMA Knowledge of High-speed IO sub-systems like PCIe and USB A thorough understanding of memory mapping concepts is essential. End to end knowledge of how transactions/data flow between the HSIO interface to/from memory Knowledge and experience with Memory BIST/DFT/ATE/SLT/any other test solutions Ability to evaluate technical suggestions from customers and work with internal teams (product management/R&D) to make decisions Customer facing experience is a plus - educating/guiding customer on technical details of a solution Good to have: Hands-on debug experience of silicon is a plus Some programming experience to write/debug simple drivers in C Detailed knowledge of the PCIe and USB protocols Architecture/micro-architecture experience Working with FPGAs

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running.The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division , where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, weve united two industry leaders to create an optical networking powerhousecombining cutting-edge technology with proven leadership to redefine the future of connectivity. Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. As a FPGA Verification Engineer at Nokia, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. This role typically requires 36 years of experience developing SystemVerilog UVM-based test environments and implementing comprehensive test plans at block, sub-chip and chip levels Strong proficiency in Hardware Verification Languages (HVL), with practical coding experience for verification tasks Practical experience using industry-standard simulators such as VCS, NC-Sim, or ModelSim (MTI), along with strong skills in waveform-based debugging. Solid understanding and practical application of UVM or similar modern verification methodologies. Experience with scripting languages such as Perl is highly valued and will help you stand out. It would be nice if you also had: Working knowledge of RTL design and familiarity with technologies like Ethernet, PCIe, and preferably telecom protocols. Strong analytical, troubleshooting, and problem-solving skills, with a structured and thorough approach to work. Good written and oral communication skills are required. Excellent written and verbal communication skills. Flexible, innovative, and self-driven team player with a strong willingness to take initiative. Design and develop comprehensive FPGA verification plans. Create and implement verification environments and testbenches. Develop and execute test scenarios for running simulations. Perform coverage analysis to ensure thorough verification. Provide lab support during FPGA and board bring-up phases. Collaborate closely with design and system teams to drive verification solutions. Independently manage verification tasks and projects. What We Offer: Opportunity to work in short product development cycles, allowing you to quickly see the real impact of your contributions on products and business success. International career development opportunities with internal mobility programs that encourage professional growth and advancement within the company. Access to a variety of social, wellness, and hobby clubs to support a balanced lifestyle and foster a sense of community. A friendly, inclusive, and supportive atmosphere where collaboration and mutual respect are core values. The chance to work alongside highly skilled, motivated, and innovative colleagues who are passionate about technology and excellence.

Experience: 6+ years of experience in pre-silicon RTL Verification /IP Verification / SOC verification, Strong knowledge of System Verilog and working knowledge of recent verification methodologie Required Candidate profile Notice Period: 0- 60 days Education: BE/ B.Tech/ Master degree in Electrical Engineering or Computer Science

Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead, guide, mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress, potential challenges encountered and milestones achieved to stake holders and team members Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise 15 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

SOURCERIGHT TECHNOLOGIES (INDIA) PRIVATE LIMITED is looking for FPGA RTL Design Engineer to join our dynamic team and embark on a rewarding career journey. Research and draft blueprints, engineering plans, and graphics. Develop test prototypes. Identify solutions to improve production efficiency. Use design software to develop models and drawings of new products. Maintain existing engineering records and designs. Assess all engineering prototypes to determine issues or risks. Estimate cost limits and budgets for new designs. Supervise the manufacturing process of all designs. Coordinate with other engineers, management, and the creative department.

Design Verification Engineer (5+ years) ASIC/SoC/FPGA Design Verification (Bangalore, Chennai and Hyderabad) Design Verification with planning, architecture, development, maintenance, and execution on complex IPs and/or SOCs. Strong knowledge of digital design principles and computer architecture. Proficiency in verification languages like Verilog or SystemVerilog. Experience with UVM (Universal Verification Methodology).

Since June 2021, frog is part of Capgemini Invent . frog partners with customer-centric enterprises to drive sustainable growth, by building and orchestrating experiences at scale, while harnessing the power of data and technology. Were inventing the future of customer experiences by delivering market-defining business models, products, services, brand engagements and communications. Joining frog means youll be joining the pond, a global network of studios, each with a thriving in-person and vibrant virtual culture. frogs are curious, collaborative, and courageous, united by our passion for improving the human experience across our areas of expertise, while each bringing our unique and diverse skills and experiences to the table. We draw on our global reach and local knowledge to solve complex problems and create innovative, sustainable solutions that touch hearts and move markets. frogs prize humour, positivity, and community just as highly as performance and outcomes. Our culture is open, flexible, inclusive, and engaging. Working at frog means being empowered to meet the moment, and Make Your Mark on every project, in your studio, your community and the world at large. Equal Opportunities at frog Frog and Capgemini Invent are Equal Opportunity Employers encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status, or any other characteristic protected by law.

Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high-quality integration and verification of the IP block. Drives quality assurance compliance for smooth IP SoC handoff. Key Responsibilities: Design and develop cache architectures, including L1, L2, and L3 caches. Optimize cache performance, power, and area through innovative design techniques. Work closely with backend (BE) engineers to achieve timing closure and resolve any issues. Conduct static timing analysis (STA) and optimize the design for timing. Utilize lint, CDC (Clock Domain Crossing), and other design tools to ensure design quality and robustness. Implement and adhere to best practices in RTL design Collaborate with microarchitecture, RTL, verification, and physical design teams to ensure seamless integration of cache subsystems. Document design specifications, implementation details, and verification results. Participate in design reviews and provide feedback on other team members' designs. Qualifications Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field. 5-15 years of proven experience in design and micro-architecture. Strong understanding of memory hierarchy, cache coherence, and performance optimization techniques. Proficiency in hardware description languages (HDL) such as Verilog or VHDL. Experience integrating BIST and DFT features into RTL designs. Experience implementing Error Correction Code (ECC) mechanisms in cache designs. Knowledge of error detection, correction, and recovery techniques. Experience with simulation and verification tools (e.g., ModelSim, VCS). Experience using lint, CDC, and other design tools to ensure design quality. Proficiency in static timing analysis (STA) and timing closure techniques. Familiarity with physical design constraints and considerations. Excellent problem-solving skills and attention to detail. Strong communication and teamwork abilities.

Roles and Responsibilities Good communication and analytical problem solving capability. Should be having hing level understanding for Design, develop and test various types of antennas for various applications. Conduct research and evaluate the performance of novel antenna design CST/ HFSS/ MATLAB software skills are preferred Develop and maintain technical documentation, including test plans and reports Should have knowledge related to fabrication and testing of the designed antenna. Good communication and analytical problem solving capability. Hands-on experience on FPGA / RTL Design involving verilog HDL,Cadence, Vivado ISE/Xilinx ISE, Modelsim and Synopsys will be an added advantage. Desired Candidate Profile B.E. or B.Tech with minimum one year of work experience. M.E. or M.Tech fresher. Perks and Benefits Salary, monthly grocery and medical insurance.

Job Title: Member of Technical Staff (MTS) DFT Verification Experience: 6+ years Location: Bangalore Job Description: We are seeking a dedicated and experienced Member of Technical Staff (MTS) specializing in DFT Insertion and Verification . The candidate will play a key role in ensuring the robustness and reliability of Tile and SoC designs by implementing and verifying advanced test architectures. Key Responsibilities: Perform SMS (Structural Mode Scan) Insertion and verification at both Tile and SoC levels. Design and verify Memory BIST (Built-In Self-Test) architectures, including initialization and integration. Implement and validate memory repair strategies, including fuse programming (eFuse) and redundancy management. Debug and optimize DFT flows to meet high fault coverage and manufacturability standards. Collaborate with cross-functional teams to ensure seamless DFT integration across various design phases. Analyze test results, resolve silicon and test-related issues, and contribute to yield improvements. Required Skills: Expertise in SMS Insertion and verification for Tile and SoC level designs. Proficiency in Memory BIST architecture, including repair mechanisms and eFuse configuration. Hands-on experience with DFT tools like Mentor Tessent, Synopsys DFT Compiler, or Cadence Modus. Strong scripting skills in Python, Perl, or TCL for automation of test flows. Knowledge of RTL design and debugging (Verilog/VHDL). Excellent problem-solving and analytical skills, especially in debugging silicon failures. Preferred Qualifications: Experience with low-power DFT methodologies and advanced compression techniques. Familiarity with industry standards for JTAG and boundary scan. Hands-on experience with post-silicon validation, bring-up, and characterization.

About The Role Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high-quality integration of the GPU block. As a principal engineer, recognized as a domain expert who influences and drives technical direction across Intel and industry. Develops and mentors other technical leaders, grows the community, acts as a change agent, and role models Intel values. Aligns organizational goals with technical vision, formulates technical strategy to deliver leadership solutions, and demonstrates a track record of relentless execution in bringing products and technologies to market. Qualifications Minimum Qualifications:BS+15 Years of relevant experience in the semiconductor I industry. experience15+ years of experience in/withVerilog and system verilog, synthesizeable RTL Modern design techniques and energy-efficient/low power logic design and power analysis. 10+ years of experience in/withHaving achieved multiple tape-outs reaching production with first pass silicon. Hands on experience with FPGA emulation, silicon bring-up, characterization and debug Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Siplont Sytems Pvt Ltd is looking for SoC Verification Engineer to join our dynamic team and embark on a rewarding career journey. Analyzing customer needs to determine appropriate solutions for complex technical issues Creating technical diagrams, flowcharts, formulas, and other written documentation to support projects Providing guidance to junior engineers on projects within their areas of expertise Conducting research on new technologies and products in order to recommend improvements to current processes Developing designs for new products or systems based on customer specifications Researching existing technologies to determine how they could be applied in new ways to solve problems Reviewing existing products or concepts to ensure compliance with industry standards, regulations, and company policies Preparing proposals for new projects, identifying potential problems, and proposing solutions Estimating costs and scheduling requirements for projects and evaluating results

SOC Verification engineers with 3+ years of experience Knowledge of ARM architecture, CPU fundamentals & Cache coherency Experience with C/C++, assembly, and scripting languages. Familiarity with low-power design and verification Develop CDV UVM verification environments at system level Verify CPU connectivity to IP blocks Develop SoC test plans and test cases and track metrics including code and functional covera Job Requirement: Bachelors or Masters in EE/CS or related field 3+ years of SoC in ASIC/FPGA verification experience Proficiency in SV and UVM Experience with simulation, emulation, and formal verification Strong debugging and problem-solving skills Experience (years) : 3+ Year Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

? Do Consulting Execution An ambassador for the Wipro tenets and values, secures great feedback from multiple clients Consulting project Manager or equivalent coordinates teams of consultants, responsible for assuring quality of deliverables Flexible in approach, ability to coordinate resource with expertise in various areas Decisive and directive delivery focus with a can do attitude, demonstrates both hard and soft skills Coaches, mentors and motivates team and client staff, build trust and confidence through focus on quality and delivery Effective at engaging with clients, extracting information, e.g., developing facilitation and communication skills Responsible for ensuring project administration is up to date e.g., SoW, tagging, etc., Business development Ensures high levels of individual utilisation achievement in line with the levels expected as part of the goal setting process Consistently agrees personal extensions with client Demonstrates developing network of relationships with clients and provides required intelligence/insights to solve’ clients business problems Builds relationships with client peers and provides required intelligence/insights to solve clients business problems Leads smaller scale meetings with sales teams, leads proposal development to a high standard working with sales teams as appropriate Anchors market research activities in chosen area of work Consistently plays a major role in opportunity identification, raising potential pursuits to practice leadership team, helping them proactively in pursuits