6 Microelectronics Jobs

We have roles in the digital and analog domains wherein you will be:Working towards definition, design, verification, and documentation for SoC(System on a Chip) developmentDetermining architecture design, logic design, and system simulationPerforming all aspects of SoC design flow-from high-level design tosynthesis, place and route, timing, and power-to create a design databasethat is ready for manufacturingTranslating SoC requirements to analog circuit specifications, architectingand designing analog IPs: ADC/DAC, LDOs, PLLs, temperature sensors, etc.Designing innovative analog and mixed signal circuits and contributing todelivering analog IPs in advanced Intel process nodesCollaborating with the SoC team for IP integration, silicon tests, etc.Developing and supporting OFT strategy and implementationCollaborating with the bench validation team for silicon validation,debugging, etc.Hardware Engineering Intern Qualifications: QualificationsAny candidate for a temporary full-time internship position must be:Currently enrolled in a relevant Bachelor's/Master's degree from a reputedacademic instituteAvailable for a 1-year internship (course completion by June/July 2026)Willing to ramp-up quickly on required areas like Microelectronics, RTL,verification/validation, structural design/physical design, analog, and so on Job Type: Student / Intern

GPU Formal Verification Engineer , your project responsibilities will include the following, Develop high quality formal verification test benches to verify complex designs in GPU. It will involve creating & owning the test plan, test bench, performing debugs , deep bug hunting using formal tools and developing sign off quality testbenches and ensuring coverage closure & convergence metrics Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals Currently, we are looking for candidates who can match one or more of the profileslisted below, Strong knowledge of Formal Property Verification & Assertion Based Verification, Formal Test planning and coverage analysis, Formal sign off & proof convergence strategies Hands-on experience with industry standard formal tools, such as JasperGold, VCFormal or Questa Formal Strong System Verilog Assertions knowledge, proficiency in Verilog, and scripting (Python, Perl, Tcl) is required Knowledge of GPU pipeline design is a plus, not mandatory Understanding of equivalence based methodologies such as DPV and SEQ is desired Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver Experience Minimum 5 years of Design verification experience Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above Education Requirements BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent courses from reputed universities Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

About The Role This position is for an experienced, motivated, and passionate circuit design engineer with expertise in the area of custom circuits memories, SSARF SRAM, Register File, ROM design for GHI CCG SAI Circuits Team. In this position you will be working in a team responsible for delivering high quality designs for graphics projects. You would also be involved in key decisions finalizing the memory architecture that best meets the design requirements of the program, technical readiness involving circuit simulations and responsibility for implementation as well as convergence of the design while meeting high circuit quality. The key responsibilities include ownership of tools, flows, methodologies as well as coming up with innovative design implementations with focus on power and area reduction. The role would require deep understanding of transistor and circuit behavior, strong communication, problem solving skills, time management and multitasking skills. The team members have also an opportunity to diversify their skills into other custom circuits as well as working with the client in integration of the custom circuits. Qualifications Minimum QualificationsMinimum 4-7 years of experience in designing and delivering of SRAM's/RF's/ROM's. Understanding of semiconductor device physics; VLSI Technology and VLSI circuits (analog/digital), Familiarity with spice simulations and Verilog and other tools for design and development of memory IP's like ESPCV, Nanotime, Nova, Totem etc. Knowledge of scripting (PERL/TCL/Python) is desirable, Preferred Educational QualificationsME/Mtech/MS in Microelectronics/VLSI Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Role & responsibilities a) The Designer is assigned to a project as a key member of the HVAC design team who will be doing engineering/drafting activities to carry out HVAC design work based on standard company procedure / other procedures. b) He / She is also responsible for ensuring that the Groups technical policies, are followed, considering any special contractual requirements. c) His / Her Job responsibilities include develop detailed design in HVAC, schematic design, ducting layout, space planning and proper design development and timely execution within his discipline of the design and requestioning in accordance with the control estimate and specific requirement of the project and manage the activity as assigned by the Lead Engineer /DM . d) Inter discipline coordination & active participation in HVAC Engineering efforts to carry out HVAC design work as per the requirement of the project. e) Strong experience of executing pharmaceutical / Life Science /Biotech facility / Specialty Chemical projects in terms of HVAC design & ducting layout preparation. f) Possess the HVAC design & layout preparation for Microelectronics Facility, Semiconductor Wafer Fab Facility, Testing & Assembly facility. g) Working Proficiency in the latest version of AutoCAD, Navisworks, Revit, Plant-3D and BIM workflows. h) Sound knowledge of designing of ducting, piping, and HVAC equipment layout & MTO preparation. i) Use of various BIM software (Specially Revit) for preparation of schedules to extract quantity take-offs for cost estimating. j) An understanding of Revit family creation and the use of parameters for purpose of scheduling. k) Well-versed in Revit modelling and establishing working drawings (plan, sections, details, 3D views etc.) l) Contributes to a culture of excellence in quality work and successful projects m) Build appropriate relationships with relevant project stakeholders & works towards achieving best for project outcomes. n) Provide feedback & coaching to junior team members and supports internal learning and development / knowledge sharing in area of expertise within Jacobs. o) Develop working relationships across various disciplines and should possess good communications & writing skills. Identify and address issues that would impact on desired project outcomes Preferred candidate profile A degree or diploma in Mechanical Engineering Discipline with good experience in HVAC designing field. Candidate should possess knowledge of work independently for developing the HVAC & ducting layouts. Candidate should have technical & working knowledge of HVAC designing for pharma industry, FMCG & Microelectronics projects. Candidate should have basic knowledge of following would be : a) Sound knowledge in understanding of pharmaceutical / Life Science /Biotech facility / Microelectronics architectural layout and process sequence with filling machine isolator AHU design, Acclimation room design. b) HVAC system design, Zoning & Pressurization Layout preparation, Duct sizing, Equipment Layout. c) Sound experience of Hazardous Area Classification & Strong experience in carrying out HVAC layout preparation & Ducting layouts for such areas. d) Should be compatible to work independently & possess sound knowledge of understanding & making of PIDs / AFIDs, HVAC Equipment & Valves selection and data sheet preparation for HVAC system. e) Should be compatible to work independently for the HVAC layouts & ducting layouts for FAB Building, WWT Building, CUP Building, HPM Building including Chemical & Gas, OSAT Building, Warehouse. f) Should be able to produce the exhaust designing & ducting layouts of Hazardous Air Pollutant (HAP) - Process Exhaust of Semiconductor Fab through Localized & Centralized Scrubber system. g) Should have experience in the design the Process Exhaust system like Acid Exhaust, Ammonia Exhaust, Arsenic Exhaust, VOC Exhaust from all perspective starting from POC/LPOC, VMB tool Connection, Lateral/Submain, Exhaust Risers, Exhaust Mains, Scrubbers, Exhaust Fans & Stack Design. h) Should have experience in developing the P&ID of Process Exhaust, Cleanroom Make Up air, General Make up air FFU, Wet Mechanical P&ID. i) Possess working knowledge & layouts preparation in accordance with Building codes and regulations . j) Sound knowledge of designing of ducting, piping, and HVAC controls (BMS & Validated EMS System) and should be able to prepare the AF&IDs within line with project requirement. k) MTO/BOQ Preparation for complete HVAC System (Low Side & High Side). l) Ducting layouts & Interdisciplinary coordination of LAF/Fume hood/Bio safety cabinets. m) Ducting layouts & Interdisciplinary coordination of dust extraction system and should be able to extract the layouts required for Sound, Static Pressure and Acoustic calculations. n) Possess knowledge of preparation of ducting layouts for OEL-5 category potent & BSL Facilities. o) Possess knowledge of current pharma, ASHRAE, SMACNA, ISO, Singapore Standards & Clean room guidelines is must.

Designs, implements, verifies, and supports the enablement and adoption of hardware design tools, flows, and methodologies. Defines methodologies for hardware development related to technology node and EDA tool enabling. Creates and verifies unique hardware designs, assembles design platforms, and integrates components into hierarchical systems to provide deployment coverage for end-to-end EDA tool testing on new technology nodes. Develops, tests, and analyzes engineering design automation tools, flow, and methodologies to improve efficiency and optimize power and performance. Supports development and enhancement of platforms, databases, scripts, and tools flows for design automation. Builds deep understanding of digital design, verification, structural and physical layout, fullchip integration, power and performance, clocking, and/or timing to enhance future TFM development. Collaborates with EDA vendors on defining and early testing of nextgeneration design tools. Qualifications Minimum Qualifications: BE/Btech in VLSI/ Microelectronics / ECE Preferred Qualifications: ME/MTECH in VLSI/ Microelectronics/ ECE Completed Physical design 6 months course would help.

About The Role : Develops, maintains, and ensures quality assurance of process design kit (PDK) collateral, including PDK runset, PDK extraction, and modeling transistors for Intel design teams to enable new processes and methodologies to be followed across Intel's product lines. Develops automation of QA flow methodologies for specific technology nodes to scale up QA coverage. Documents and monitors QA results. May include developing test patterns to quality the physical design rules for correct implementations. Performs validation for PDK library covering collaterals, partition cells, 3DIC packaging, and back end physical design checks. Ensures that the design teams meet the requirements of the process node. Leads root cause analysis for issues related to designing to a specific process technology and continuously drives initiatives to enhance design methodologies. Creates and maintains technology files with symbols, device parameters, Pcells, design verification decks, layouts, process constraints, design rule checks, and/or layout versus schematic runsets for silicon designers to understand the design process. Resolves issues and bugs found within the PDK collateral. Builds test structures and runs simulation, physical verification, and parasitic extraction to ensure proper model and design solutions. May also deliver design flows, guidelines, and tutorials through sample design databases, test chips, and libraries. Collaborates with silicon design, process engineering, and high volume manufacturing teams to identify new process technologies and ensure new solutions are high quality and ensure ease of use for both internal and external design communities. Works with EDA vendors on tool improvements to enhance performance and add functionality. Qualifications This position involves developing and maintaining compact device models in internal and external circuit tools while working in a highly interactive team environment. Responsibilities include:1. Developing process file extraction quality and performance evaluation tools.2. Devising methodologies to extract compact model parameters from IV and CV data for developing semiconductor processes.3. Working closely with technology development and design engineers who use or develop circuit tools, compact models and process files. Minimum Qualifications Master's with 8+ years or PhD with 3+ years in Electrical Engineering, Microelectronics or related fields with an emphasis in semiconductor device physics. Additional Desired Qualifications 1. Graduate level courses or projects relevant to device simulation, circuit simulation and/or compact model development.2. Expertise in python scripting.3. Ability to be cognitively flexible and agile in a fast-changing software environment.4. Good interpersonal written and verbal communication skills and ability to work well in a team environment. Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in theTechnology Development and Manufacturing Groupare part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.