102 Microarchitecture Jobs - Page 3

As a GPU Design and micro-Architect at Qualcomm India Private Limited, you will be responsible for collaborating across functions like GPU architecture and Systems to design and develop the next generation GPU features. Your key responsibilities will include working closely with Architecture teams to create micro-architecture and hardware specifications for features, taking ownership of design and RTL, reviewing test plans with Design Verification teams, and ensuring validation of all design features across products. Additionally, you will collaborate with physical design teams to optimize power, performance, and area metrics for the GPU blocks. Qualifications: - Bachelor's degree in Compute...

Positions are open for immediate Co-op/internship(6 months or more duration) in the areas of CPU and SOC verification from unit level to chip level as well as all aspects of verification such as functional, microarchitecture, performance, and formal. We are looking for all levels of talent, from entrance to advanced level of experience. Responsibilities Work closely with architecture and RTL designers on verifying the functionality correctness of the design Reviewing Architecture and Design Specifications Develop test plans and test environments Develop tests in assembly, C/C++, or vectors according to test plans Develop coverage monitors and analyze coverage to ensure all the test cases in ...

You are a seasoned Microarchitect and RTL Design Engineer with a strong background in microarchitecture and RTL coding. Your main responsibility will be to design and develop microarchitectures for a set of highly configurable IPs, ensuring optimal performance, power, and area. You will collaborate with software teams to define configuration requirements, verification collaterals, and work with verification teams on assertions, test plans, debug, coverage, etc. To qualify for this role, you should have a BS or MS in Electrical Engineering, Computer Engineering, or Computer Science along with 8+ years of current hands-on experience in microarchitecture and RTL development. Proficiency in Veri...

You will be part of a highly skilled and challenging high-speed parallel PHY design team, working on interfaces such as DDR, LPDDR, etc. Your responsibilities will include designing and developing high-speed interface PHY and its sub-blocks, such as high-speed data paths, analog calibration, training, IP initialization, low power control, test, loopback, etc. You will be accountable for various aspects of design and verification from specification to silicon, as well as interface design for the controller and SoC. Your role will also involve active participation in problem-solving and implementing opportunities for improvement. Additionally, you will mentor and coach other design team member...

As a member of the team at this organization, you will play a crucial role in the development of custom silicon solutions that will drive the future of Google's direct-to-consumer products. Your contributions will be instrumental in the innovation process that leads to the creation of products that are beloved by millions around the globe. Your expertise will be key in shaping the next generation of hardware experiences, ensuring exceptional performance, efficiency, and integration. With a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience, and a minimum of 3 years of experience in Register-Transfer Leve...

As a Senior ASIC RTL Design Engineer at Google, you will play a crucial role in shaping the future of custom silicon solutions that drive Google's direct-to-consumer products. Your expertise in RTL design will be instrumental in delivering innovative hardware experiences with superior performance, efficiency, and integration. With a Bachelor's degree in Electrical Engineering or Computer Engineering, or equivalent practical experience, and a minimum of 15 years of experience in ASIC RTL design, you are well-equipped to excel in this role. Your proficiency in Verilog/System Verilog and microarchitecture will be essential in contributing to the development of ARM-based SoCs, interconnects, and...

As a candidate for this role, you should hold a Bachelor's degree in Electrical/Computer Engineering or possess equivalent practical experience. You should also have at least 2 years of experience working with RTL design using Verilog/System Verilog and microarchitecture, particularly in the realm of ARM-based SoCs, interconnects, and ASIC methodology. A Master's degree in Electrical/Computer Engineering would be considered a preferred qualification for this position. Additionally, experience with methodologies for RTL quality checks (such as Lint, CDC, RDC) and low power estimation, timing closure, and synthesis would be beneficial. Join a dynamic team that is dedicated to pushing boundarie...

Description We are seeking an experienced Data Analyst to join our team in India. The ideal candidate will have 5-15 years of experience in data analysis, with a strong ability to derive insights and contribute to data-driven decision-making. Responsibilities Analyze and interpret complex data sets relating to the business. Develop and maintain reports, dashboards, and data visualizations. Collaborate with cross-functional teams to understand data requirements and provide insights. Identify trends, patterns, and insights to drive business decisions. Assist in the implementation of data collection systems and other strategies that optimize statistical efficiency and data quality. Skills and Q...

You will be responsible for Logic design, micro-architecture, and RTL coding, with hands-on experience in SoC design and integration for complex SoCs. It is essential to have expertise in Verilog/System-Verilog and knowledge of AMBA protocols like AXI, AHB, APB, as well as SoC clocking, reset, debug architecture, and peripherals such as USB, PCIE, and SDCC. Understanding Memory controller designs and microprocessors will be advantageous. Collaborating closely with SoC verification and validation teams for pre/post Silicon debug is a key aspect of this role. Your role will require hands-on experience in Low power SoC design, Multi Clock designs, and Asynchronous interfaces. Proficiency in usi...

MIPS is looking for a highly experienced and motivated Engineering Manager to lead the CPU team. In this critical role, you will manage a team of skilled engineers dedicated to developing high-performance CPU cores based on the RISC-V architecture. Your responsibilities will include overseeing the entire RTL design lifecycle, ensuring technical excellence, innovation, and timely delivery. You will lead and mentor a team of microarchitecture and RTL design engineers focused on high-performance CPU core development. Your role will involve driving the design execution of CPU subsystems, meeting performance, power, area, and quality goals. You will be responsible for creating and refining microa...

You will provide technical leadership in conceptualizing and architecting the frontend digital design of products at Cadence. Your role will involve defining micro-architecture and driving successful implementation. Additionally, you will mentor and guide the team, drive processes, and design principles to achieve high-quality designs and PPA. You are expected to stay updated with standard specifications, develop insights into customer requirements and PPA trends, and contribute to defining the product feature roadmap. Your experience should include involvement in product development from concept to silicon, allowing you to provide technical support across cross-functions and contribute to p...

This role is for an IP / SoC RTL Senior / Lead Design Engineer to be responsible for the development and integration of IP and sub-systems. The ideal candidate will have strong expertise in logic design, RTL coding, and ASIC development, with a focus on creating high-performance, complex digital designs. Responsibilities Responsible for IP / sub-system level micro-architecture development and RTL coding . Prepare block/sub-system level timing constraints . Integrate IP/sub-system into larger designs. Perform basic verification in either an IP verification environment or on an FPGA. Skills Expertise in Verilog is a must. Experience in Logic design, micro-architecture, and RTL coding is essent...

NVIDIA has a rich history of over 25 years in transforming computer graphics, PC gaming, and accelerated computing through innovative technology and exceptional individuals. The company is currently leveraging the potential of AI to shape the next era of computing, where GPUs serve as the central intelligence of various devices like computers, robots, and self-driving cars. To achieve groundbreaking milestones, NVIDIA seeks individuals with a vision, a drive for innovation, and a commitment to excellence. As an NVIDIAN, you will be part of a diverse and supportive environment that fosters creativity and encourages top-notch performance. Join us to be a catalyst for change and create a lastin...

Qualcomm India Private Limited is seeking a candidate with a minimum of 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV. The ideal candidate should have experience in Logic design/micro-architecture/RTL coding, along with hands-on experience in designing and integrating complex multi clock domain blocks. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols like AXI, AHB, APB, clocking/reset/debug architecture are necessary. Experience in Multi Clock designs and Asynchronous interface is a must, as well as familiarity with tools in ASIC development such as Lint, CDC, Design compiler, and Primetime. Collaboration with Design verification and validation ...

Job Overview With 125 Arm-powered products shipped every second, we&aposll be in a over a trillion smart devices by 2035. Your smartphone, award-winning VR gaming, the world&aposs fastest supercomputer our engineers are designing the advanced core processors leading the race towards a connected, autonomous, hyper-performance future. The Architecture and Technology Group (ATG) at Arm develops technologies and products for Arms future architecture roadmap. Architecture Verification product group develops Architecture Compliance Kits that are used by multiple development teams to validate that implementations are compliant to the Arm architecture specification. This role gives you an opportunit...

As an RTL Engineering Lead at Google, you will play a vital role in driving innovation and developing custom silicon solutions for Google's direct-to-consumer products. Your contributions will be instrumental in shaping the future of hardware experiences that cater to millions of users worldwide. By leveraging your expertise, you will enhance performance, efficiency, and integration in the next generation of Google products. With a Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience, along with 6 years of hands-on experience in micro-architecture and coding, particularly in memory compression, interconnects, coherence, cache, Dynamic Random-Acces...

We are seeking a highly skilled Physical Design Engineer to own the RTL to GDS physical implementation flows for high-performance and low-power designs. You will be responsible for synthesis, floor-planning, place and route, clock tree synthesis, timing and power closure, EM/IR, PDV, and final PD sign-off. This role requires deep collaboration with micro-architects, expertise in physical design tools, and a strong understanding of modern sub-micron technology nodes. Roles and Responsibility: Own RTL to GDS physical implementation flows for synthesis, floor-planning, place and route, clock tree synthesis, timing & power closure, EM/IR, PDV, and final PD sign off. Own physical design & impleme...

We are seeking a highly skilled Microarchitect and RTL Design Engineer to design and develop microarchitectures for highly configurable IPs, ensuring optimal performance, power, and area. You will collaborate with software and verification teams on various aspects of the design lifecycle, from defining configuration requirements to debugging and coverage. This role requires extensive hands-on experience in microarchitecture and RTL development, proficiency in Verilog/SystemVerilog, and an in-depth understanding of on-chip interconnects and NoCs. Roles and Responsibilities: Design and develop microarchitectures for a set of highly configurable IPs. Perform microarchitecture and RTL coding , e...

You will be responsible for developing the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Additionally, you will participate in defining the architecture and microarchitecture features of the block being designed. You will apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals, as well as design integrity for physical implementation. It will be your responsibility to review the verification plan and implementation to ensure design features are verified...

You will be part of a highly skilled and challenging high-speed parallel PHY design team, focusing on DDR, LPDDR, and other similar interfaces. Your responsibilities will include designing and developing high-speed interface PHY and its sub-blocks, such as data paths, analog calibration, training, IP initialization, low power control, test, and loopback. You will be involved in various aspects of design and verification from specification to silicon, including interface design for controllers and SoCs. Actively participate in problem-solving and implementing improvements, as well as mentoring and coaching other design team members on technical issues. Collaborate with Analog designers to ens...

You will be responsible for joining OnSemi's growing team in Bengaluru, India as a Sr. Principal Digital Design Engineer focused on New Product Development in Power Management. Your primary responsibilities will include working on the development of various Power Management products for consumer, industrial, and automotive applications such as DC-DC PMIC/POL, multiphase controllers, drivers, converters, LED drivers, SiC drivers, switches, and efuses. Your key responsibilities will involve collaborating with different product lines for RTL implementation of power convertor controller designs, working on digital design architecture, RTL, low power design, synthesis, and timing analysis. You wi...

As an experienced professional in ASIC development with a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, you will be leading a team of engineers in Bengaluru to deliver AI/ML compute intensive IPs and subsystems. With 8 years of experience in Verilog/SystemVerilog, VHDL, or Chisel, and 4 years of people management expertise, you will collaborate with Architecture, Firmware, and Software teams to drive feature closure and develop microarchitecture specifications. Your responsibilities will include taking ownership of complex IPs or subsystems, implementing RTL, and driving design methodology, libraries, debug, and code review in coordi...

You have an exciting opportunity to join a dynamic team at MarvyLogic in Bengaluru/Bangalore. With over 10 years of experience in ASIC RTL Design and a Graduate Degree in Electrical/Electronics Engineering (Post Graduate degree is a plus), you will be a valuable addition to our team. As a member of our team, you will be responsible for various tasks related to ASIC RTL Design. Your expertise in Verilog/System Verilog proficiency, experience with multiple clock and power domains, and integration and validation of high-speed PCIe IP core will be crucial. You will also need familiarity with PCIe protocol analyzers and debug, as well as PCIe driver and application software for Linux/Windows. You...

You are a highly experienced RTL Design Engineer with 12-20 years of experience, specializing in PCIe IP development. Based in Noida/Bangalore, you will be responsible for designing and supporting the RTL of Cadence's PCIe IP solution. Your role will involve working with existing RTL, adding new features, ensuring customer configurations are clean, supporting customers, and ensuring design compliance with LINT and CDC guidelines. To qualify for this position, you must hold a BE/BTech/ME/MTech degree in Electrical/Electronics/VLSI and have extensive experience as a design and verification engineer, with a focus on RTL design using Verilog. Additionally, you should have experience with System ...

Responsibilities: In this role, he/she would be the technical lead responsible for driving design, quality and debug throughput of top-level development and support post-silicon debugs. Working with architects and verification leads and driving quality microarchitecture specifications. Developing design infrastructure and needed improvements Developing design strategy for quality. Driving design closure to meet schedule with quality Working with each domain (sub-system) lead and guide them to get better quality and design outcome. Helping management with risk assessment on features, quality, and schedules Working with sub-system design leads to identify potential areas of formal verification...