102 Microarchitecture Jobs - Page 2

Role Overview: As a CPU Design Principal Engineer, you will be responsible for developing logic design, register transfer level (RTL) coding, and simulation for a CPU, including generating cell libraries, functional units, and the CPU IP block for integration in full chip designs. You will actively participate in defining the architecture and microarchitecture features of the CPU. Your role will involve applying various strategies, tools, and methods to write RTL and optimize logic to meet power, performance, area, and timing goals, as well as ensuring design integrity for physical implementation. Additionally, you will review verification plans and implementations to ensure correct design f...

As a GPU Design and micro-Architect at Qualcomm India Private Limited, you will be responsible for working across functions like GPU architecture and Systems in designing and micro-architecting the next generation GPU features. Your key responsibilities will include: - Collaborating closely with Architecture teams to develop micro-architecture and hardware specifications for features. - Taking ownership of design and RTL. - Reviewing test plans and validating all design features across products in collaboration with Design Verification teams. - Working closely with physical design teams to achieve optimal power, performance, and area metrics for the GPU blocks. To qualify for this role, you ...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation. 3 years of experience with the Register-Transfer Level quality check tool flows (e.g., Lint, Clock Domain Crossing, Reset Domain Crossing, Synthesis). Preferred qualifications: Experience with methodologies for Register-Transfer Level (RTL) quality checks (e.g., Lint, CDC, RDC). Experience with IP integration methodology, IP Design, ARM-based SoCs, ARM-protocols and ASIC methodology. Expe...

Alternate Job Titles: ASIC Digital Design, Staff Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced digital design engineer with a deep-rooted curiosity for advancing technology. With a strong foundation in RTL coding, microarchitecture, and high-speed digital IP, you thrive on tacklin...

Role Overview: You have 12+ years of experience in Digital ASIC/Processor Design with strong fundamentals in core areas such as Microarchitecture, Computer Arithmetic, Circuit Design, and Process Technology. Your communication skills are excellent, enabling you to collaborate effectively with design teams globally. Key Responsibilities: - Lead, train, and mentor a team of junior engineers for a large modem design project in advanced process nodes - Collaborate with RTL, DFT, and PD leads to take a project from Post-RTL to Netlist release, focusing on area, timing, power, and testability - Write timing constraints, conduct synthesis, formal verification, CLP, Primetime, PTPX, and CECO tasks -...

As a Performance Modelling Engineer at Arm's Central Technology (CT) Group, your role involves examining and defining future Arm solutions for the next generation of challenges. You will be creating system-level performance models, exploring new technologies, and evaluating their impact on system architecture and configuration to ensure optimal performance, power, and area (PPA) for markets like premium mobile, infrastructure, and automotive. **Responsibilities:** - Engaging with architects on future systems within Arm. - Creating full system models using a range of IP models from across the company. - Running system performance characterization and optimization studies. - Developing explora...

Role Overview: You will be responsible for ASIC RTL design with 10+ years of experience and proficiency in Verilog/System Verilog. Your role will involve working with multiple clock and power domains, integrating and validating various MIPI cores, debugging, and implementing CSI/DSI controllers. Additionally, you will be creating micro-architecture specifications, reviewing vendor IP integration guidelines, running integrity check tools, and participating in design verification and physical implementation processes. Key Responsibilities: - Possess 10+ years of ASIC RTL Design experience and proficiency in Verilog/System Verilog - Work with multiple clock and power domains - Integrate and val...

In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. You will be part of a team developing SoCs used to accelerate machine learning computation in...

As an engineer at Qualcomm India Private Limited, you will have the opportunity to work on cutting-edge Wireless Technology projects, specifically focusing on IEEE 802.11 standards. Your role will involve collaborating with design teams globally and contributing to the development and implementation of hardware blocks for complex SoCs. You will also play a critical part in the WLAN subsystem, ensuring the successful delivery of IPs to the SOC design team. Strong fundamentals in Microarchitecture, Computer Arithmetic, Circuit Design, and Process Technology will be essential for excelling in this role. Key Responsibilities: - Develop HW blocks (IP design) and conduct High/Mid/Low level Design ...

Role & responsibilities Preferred candidate profile Digital Design Engineer Technical Skills • Must-Have: • Proven experience in RTL coding and RTL integration of sub-blocks into larger components • Strong expertise in RTL linting debug and error/warning fixes using VcSpyglass • Deep knowledge in analyzing and resolving CDC/RDC violations using Questa • Solid understanding of clocking and reset concepts, including synchronization, generation, and division • Nice-to-Have: • Familiarity with memory subsystems, Tensilica DSP cores and/or communication/control peripheral bus systems • Understanding of on-chip interconnect structures such as Arteris FlexNoC and AMBA protocols • Basic knowledge of...

As a Systems Engineer at Qualcomm India Private Limited, you will be joining the Engineering Group to analyze and evaluate GPU architecture and microarchitecture for optimizing performance and power consumption. Your responsibilities will include GPU power modeling, workload analysis, and developing tests for pre-silicon and post-silicon power verifications. You will work closely with RTL designers, architects, verification specialists, compilers, drivers, silicon implementation teams, and post-silicon teams. Knowledge of Graphics architecture is considered advantageous for this role. Key Responsibilities: - Analyze and evaluate GPU architecture and microarchitecture - Optimize performance a...

Role Overview: As a Senior ASIC RTL Design Engineer at Google, you will be a key member of a team dedicated to creating custom silicon solutions for Google's direct-to-consumer products. Your role will involve pushing boundaries and contributing to the innovation that drives products loved by millions globally. Your expertise will play a crucial part in shaping the future of hardware experiences, ensuring unparalleled performance, efficiency, and integration. Responsibilities: - Lead a team to deliver fabric interconnect design for ASICs. - Develop and enhance RTL design to meet power, performance, area, and timing objectives. - Define key details such as interface protocols, block diagrams,...

As a member of the team working on custom silicon solutions for Google's direct-to-consumer products, you will play a crucial role in shaping the future of hardware experiences. Your contributions will drive innovation behind products that are beloved by millions worldwide, delivering exceptional performance, efficiency, and integration. **Key Responsibilities:** - Collaborate with architects to develop microarchitecture - Perform Verilog/SystemVerilog RTL coding - Conduct functional/performance simulation debugging - Carry out Lint/CDC/FV/UPF checks - Participate in test planning and coverage analysis - Develop RTL implementations meeting power, performance, and area goals - Be involved in ...

In this role, you'll be part of a team working on shaping the future of AI/ML hardware acceleration, specifically focusing on cutting-edge TPU (Tensor Processing Unit) technology. Your main responsibilities will include: - Driving the development of Complex IPs and Subsystems in collaboration with a team of engineers in the Bengaluru design organization. - Taking ownership of the micro-architecture and implementation of IPs and subsystems. - Collaborating with Architecture, Firmware, and Software teams to ensure feature closure and develop micro-architecture specifications. - Leading design methodology, libraries, debug, and code review activities in coordination with other IPs Design Verifi...

As a SoC Power Management Design Engineer at AMD, your role will involve developing and designing custom silicon for gaming consoles, datacenter, client, or embedded computer vision SOCs and related platforms. You will collaborate with the lead SoC architect to define customer-specific architectures, contribute to product specifications, and make performance and power trade-offs. Your work will span from early concept development through final production, requiring excellent organization and communication skills. You will work with expert architects and designers globally, presenting your findings to colleagues and customer engineering teams. Key Responsibilities: - Drive physical design and...

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will be responsible for designing cutting-edge solutions that impact various industries. Your role will involve working with multiple clock and power domains, integrating and validating MIPI cores, debugging, and implementing CSI/DSI controllers. Your expertise in Verilog/System Verilog will be crucial in creating micro-architecture specifications, reviewing vendor IP integration guidelines, and running integrity check tools to ensure compliance with coding standards. Additionally, you will play a key role in the design verification and physical implementation processes to meet performance goals. **Key Responsibilities:** - Utiliz...

As an experienced ASIC/FPGA digital designer with 7-10 years of experience, you will be responsible for the following key responsibilities: - Utilize your expertise in Verilog/VHDL, Micro-architecture, and RTL Implementation to contribute to the development of cutting-edge technology. - Apply your knowledge in USB, PCIe, and Ethernet domains to design and implement efficient solutions. - Utilize tools such as Synopsys/Cadence Synthesis/STA tools and FPGA to optimize performance and functionality. - Proficiency in scripting skills will be an added advantage in enhancing the design process. Qualifications required for this role include: - BE in Electronics & Communication Engineering In additi...

As a Design Engineer-2 FPGA Architecture at Lattice Semiconductor, you will be part of a dynamic team focused on FPGA architecture modeling and system architecture advancements. You will have the opportunity to contribute, learn, innovate, and grow within a fast-paced, results-oriented environment. Your responsibilities will include working in RTL design, utilizing best-in-class coding styles, algorithms, and both Verilog and System Verilog. You will be involved in architecture modeling and evaluation of Lattice FPGAs and Software tools to measure performance, power, and area for various workloads. Additionally, you will drive subsystem development, ensuring designs meet high standards of qu...

As a member of our team, you will play a key role in developing custom silicon solutions that drive the future of Google's direct-to-consumer products. You will be at the forefront of innovation, contributing to products that are cherished by millions globally. Your expertise will be instrumental in shaping the next wave of hardware experiences, delivering exceptional performance, efficiency, and integration. In your role within the platform IP team, you will be involved in designing foundation and chassis IPs for Pixel SoCs, including components such as NoC, Clock, Debug, IPC, MMU, and other peripherals. Collaboration with cross-functional teams such as architecture, software, verification,...

Responsibilities: * Collaborate with cross-functional teams on microarchitectural design and optimization. * Develop RTL code using System Verilog and ARM processors.

You have a passion for leading edge CPU/SoC architecture, design and verification. You are a team player who has excellent communication skills and enjoys collaborating with architects engineers located in different sites and time-zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Work with CPU micro-architects and designers to optimize future CPU cores Analyze the competition and identify areas for future improvement in our products Characterize workloads, project performance, and debug performance problems Run performance simulations and analyze results to evaluate CPU architectural features Enhance exi...

As a candidate for this role, you will have the opportunity to work directly with customers in the development of RTL code, quality checks, and bug fixing. You should possess 4-7 years of experience and be well-versed in micro-architecture and design of digital IPs and subsystems. Your responsibilities will include understanding the RTL design and microarchitecture of IPs, integrating them into sub-systems, defining SoC IP architecture, and developing RTL. In this position, you will be responsible for conducting RTL Quality Checks such as Clock Domain Crossing (CDC) check, Lint, Design for Testability (DFT) checks, Low Power Checks, as well as RTL Synthesis and STA support. Your expertise in...

The ideal candidate for this role should hold a Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field or possess equivalent practical experience. Additionally, you should have at least 5 years of experience working with ML/AI frameworks and libraries such as TensorFlow, PyTorch, and scikit-learn. It is essential to have a background in hardware description languages like Verilog, SystemVerilog, and VHDL, along with experience in applying ML/AI techniques. Preferred qualifications include hands-on experience with ML/AI applications in hardware design, verification, and Low Power, such as formal verification with ML and coverage closure with ML...

Alternate Job Titles: ASIC Digital Design, Staff Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced digital design engineer with a deep-rooted curiosity for advancing technology. With a strong foundation in RTL coding, microarchitecture, and high-speed digital IP, you thrive on tacklin...

As an experienced professional in ASIC development with a background in Electrical Engineering, Computer Engineering, or related fields, you will play a crucial role in shaping the future of AI/ML hardware acceleration. Your primary responsibility will be to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. Working within a dynamic team environment, you will contribute to the innovation behind products loved by millions worldwide, focusing on verifying complex digital designs with a specific emphasis on TPU architecture and its integration within AI/ML-driven systems. Your role will also involve collaborating with cross-functio...