144 Microarchitecture Jobs - Page 2

As a pre-sales support specialist at Alphawave Semi, your role will involve proposing architecture to customers based on their requirements, working with the team to develop architecture and micro-architecture, and ensuring successful project delivery. You will manage the design/RTL team, collaborate with customers to provide technical support and agreed collaterals, and drive flow and methodology improvements for high reuse. Additionally, you will engage with IP vendors to obtain the right configurations of the IP, oversee teamwork allocation, schedule, risk mitigation, and deliverables from the design team, reporting to the Director - ASIC Design. To excel in this role, you should hold a B...

Role Overview: You will be joining Lattice Semiconductor as a Design Engineer-2 FPGA Architecture, becoming part of the Architecture team focused on FPGA architecture modeling and advanced system architecture. This role offers ample opportunities for contribution, learning, innovation, and growth within a dynamic team. Key Responsibilities: - Located in Pune, India, as a full-time individual contributor, you will focus on FPGA projects within Pune and similar time zones. - Your tasks will involve RTL design, implementing best-in-class coding styles, algorithms, and utilizing Verilog and System Verilog. - You will work on architecture modeling and evaluate Lattice FPGAs and Software tools to ...

As a Design Engineer with over 10 years of experience at Qualcomm India Private Limited, your role will involve working on the SoC Interconnect for the next generation System-on-chip (SoC) for various product categories like smartphones, notebooks, smart glasses, and tablets. Your responsibilities will include: - Leading the NoC design as part of the BDC infrastructure (NoC/Interconnect) core team - Specifying, designing, and implementing interconnect and related IPs - Collaborating with SoC team, verification team, physical design team, SoC Floorplan, core teams, and interconnect teams from other sites - Partnering with SoC performance team to meet performance requirements and with silicon ...

Role Overview: You will be responsible for designing and developing synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Additionally, you will create micro-architecture specs and ensure that designs meet performance, power, and area targets. You will own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT readiness. Collaboration with verification teams for test planning, debugging, and coverage closure will also be a key part of your role. Furthermore, you will integrate IPs into top-level SoC and resolve timing and functionality issues. Finally, you will support emulation, FPGA prototyping, and silicon bring-up activities with cross-functi...

Introduction The Post-Silicon Enablement team plays a critical role in the silicon productization lifecyclefrom early architecture and design engagement to pre-silicon validation, bring-up, and post-silicon characterization. By collaborating closely with design teams early in the process, we ensure that quality, testability, and debuggability are built into the silicon from the ground up. We work closely with design, verification, and validation tool development teams to define and execute comprehensive pre- and post-silicon test plans. Our mission is to root-cause, resolve, and remediate silicon issues efficiently and effectively. Your Role And Responsibilities Architect and drive the devel...

As an experienced candidate with 8 to 15 years of experience, you will be responsible for the following key aspects: - Strong understanding of the design convergence cycle, including architecture, micro-architecture, Verification, Synthesis, and timing closure. - Expertise in managing IP dependencies and planning front-end design tasks. - Design and development of high-speed serial IO protocols. - Implementation of clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, and low power modes. - Desirable experience in CPU, bus fabrics, or coherence/noncoherent NOC domains. Your skills should include: - Excellent communication and interpersonal skills. -...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

ob Description: Should have an exposure on formal verification engineers responsible for IP and SoC design verification. Deploys and manages leading formal verification processes, procedures, verification tools, and technologies based on latest model and algorithms. Works with design and microarchitecture teams to identify design bugs and improve overall microarchitecture. Manages stakeholders, works with respective IP/SoC teams, keeps them updated on the progress, and drives problem scoping and solution. Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results...

Introduction As a Hardware Developer at IBM, you'll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today's market. Your Role And Responsibilities As a Logic designer, you will be responsible for design and development of the POR Boot Engine, Boot security features, and the test & debug infrastructure for very high performance Processors chips. You will be part of the design team which will deliver this critical infrastructure to IBM's Mainframe and POWER processors. Develop the features, present the proposed archite...

Role Overview: You will be a Microarchitect and RTL Design Engineer with a focus on designing and developing microarchitectures for highly configurable IP's. Your role will involve ensuring optimal performance, power, and area through microarchitecture and RTL coding. Collaboration with software teams to define configuration requirements and working with verification teams on assertions, test plans, debug, and coverage will be key aspects of your responsibilities. Key Responsibilities: - Design and develop microarchitectures for a set of highly configurable IP's - Implement microarchitecture and RTL coding to achieve optimal performance, power, and area - Collaborate with software teams to d...

Alternate Job Titles: Senior Digital Design Engineer ASIC Design Engineer High-Speed SerDes Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced ASIC Digital Design Engineer with a strong background in digital design for high-speed serial interfaces. You have a deep understa...

As a Senior Verification Engineer at Suresh Chips and Semiconductor (SCHIPSEMI) in Muzaffarpur, your role will involve functional verification of complex designs, including developing test plans, debugging designs, validating silicon processes, and ensuring compliance with design specifications. You will collaborate closely with cross-functional teams to ensure flawless execution in pre-silicon design stages. Key Responsibilities: - Execute IP/SS verification of complex blocks (CPU SS) - Verify Fabric/NOC/Interconnect blocks - Utilize protocols such as AMBA suite (AXI-44/AHB), PCIe (preferably Gen5, Gen6), CXL, DDR, interrupt handling, and power management - Proficient in System Verilog (SV)...

As an experienced RTL Design/Hardware Engineer at Qualcomm India Private Limited, you will be responsible for designing and leading all Front-end design activities for Display Sub-systems, delivering cutting-edge solutions for various Qualcomm business units like VR, AR, Compute, IOT, and Mobile. Your key responsibilities will include: - Performing RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks. - Collaborating closely with technology/circuit design teams to close IP block specifications/requirements. - Working closely with verification/physical design teams to complete the IP desig...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems for cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. **Key Responsibilities:** - Drive Functional GPU issue reported by internal SW testing or external customers. - Participate in the reproduction of the issue in the lab in Windows/Android/Auto platforms and ...

As a Senior RTL Design | Senior Design Verification Engineer at Marquee Semiconductor, you will be responsible for Spec to RTL sign-off with Microarchitecture, RTL Design, and Verification. You should have the ability to work independently on verification, from Feature extraction to Constrained Random Tests, ensuring full functional and code coverage. Experience with Low-power verification is considered a significant advantage. Qualifications required for this role include a degree in EE/ECE/CS. The position is based in Bangalore, and it is an on-site role. Please send your resume to resume@marqueesemi.com with the subject line Senior RTL Design | Design Verification Engineer Bangalore.,

We are seeking an innovative Performance Architect to develop system software in Python and C++, focusing on fabric and cache architecture models. You will collaborate closely with architects and micro-architects to create advanced performance models for various IPs and optimize core software algorithms. This role requires expertise in performance modeling of IPs and SoCs, a deep understanding of computer architecture, and strong object-oriented programming skills. Roles & Responsibilities: Develop system software in Python and C++ . Develop fabric and cache architecture models and data structures. Work closely with architects and micro-architects to find innovative ways to develop performan...

You will be responsible for the following tasks: - Experience in Logic design, micro-architecture, and RTL coding is a must - Hands-on experience with SoC design and integration for SoCs - Proficiency in Verilog/System-Verilog - Knowledge of AMBA protocols such as AXI, AHB, APB, SoC clocking/reset/debug architecture, and peripherals like USB, PCIE, and SDCC - Understanding of Memory controller designs and microprocessors is an added advantage - Hands-on experience in constraint development and timing closure - Collaborate closely with the SoC verification and validation teams for pre/post Silicon debug - Hands-on experience in Low power SoC design - Experience in Synthesis and understanding ...

As a Functional Verification Engineer, you will be responsible for verifying RTL designs using SystemVerilog and UVM. Your role involves developing testbenches, building reusable components, and ensuring complete functional coverage of IPs or SoC-level designs. Key Responsibilities: - Develop and maintain UVM-based testbenches for IP/subsystem/SoC verification - Create test plans from microarchitecture/design specifications - Write and debug directed and constrained-random tests - Implement functional coverage, assertions (SVA), and checkers - Run regressions using simulators like VCS, Xcelium, or Questa - Interface with RTL, DFT, and Firmware teams to track and resolve bugs - Analyze wavefo...

As an RTL Design/Hardware Engineer at Qualcomm India Private Limited, your role will involve designing and leading all Front-end design activities for Display Sub-system, delivering cutting-edge solutions for various Qualcomm business units like VR, AR, Compute, IOT, and Mobile. You will collaborate closely with cross-functional teams located in different time zones to research, design, and implement performance and power management strategies for the product roadmap. Key Responsibilities: - Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks. - Work closely with technology/circu...

Role Overview: You should have 6 to 9 years of experience in Synthesis, Constraints, and interface timing challenges. It is preferable to have good knowledge of Power. Your role will require strong domain knowledge in RTL Design, implementation, and Timing analysis. You should be experienced in RTL coding using Verilog/VHDL/System Verilog and have experience in micro-architecture & designing cores and ASICs. Additionally, you should be familiar with Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc. Exposure in scripting (Pearl/Python/TCL) is expected, and you should have strong debugging capabilities in Synthesis, timing analysis & implementation. Collaboration with cross-f...

**Job Description:** **Role Overview:** You will be part of a team that is dedicated to pushing boundaries and developing custom silicon solutions for Google's direct-to-consumer products. Your contribution will play a crucial role in shaping the next generation of hardware experiences, ensuring unparalleled performance, efficiency, and integration for products loved by millions worldwide. **Key Responsibilities:** - Lead a team in delivering fabric interconnect design. - Develop and refine RTL design to meet power, performance, area, and timing goals. - Define details such as interface protocol, block diagram, data flow, and pipelines. - Oversee RTL development and debug functional/performa...

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. **Key Responsibilities:** - Full chip design for multi-million gates SoC - Digital design and development (RTL) - Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification - Manage IP dependencies, planning and tracki...

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will be an integral part of our culture that values passion for technology solutions impacting businesses. You will have the opportunity to pursue your individual passions while gaining a deep understanding of various industries and emerging technologies to build futuristic and impactful solutions. Working with us may even help you evolve personally towards a more fulfilling life. **Key Responsibilities:** - Possessing 10+ years of ASIC RTL Design experience with proficiency in Verilog/System Verilog - Demonstrating experience with multiple clock and power domains - Having extensive experience in the integration and validation of ...

Role Overview: You will be part of the RTL team and will work on various aspects of a RISC-V design for an advanced technology node. Your primary focus areas will include the processor pipeline, d-cache, i-cache, the l2-pipeline, and a custom memory controller. As a vertical engineer, you are expected to possess a strong RTL or architecture/microarchitecture background and be capable of understanding and solving complex problems at the RTL level. Key Responsibilities: - Work on multiple areas of a RISC-V design, including the processor pipeline, d-cache, i-cache, the l2-pipeline, and a custom memory controller - Collaborate with the team to ensure efficient RTL design and implementation - Ut...

Role Overview: You will be responsible for understanding the design convergence cycle, including architecture, micro-architecture, verification, synthesis, and timing closure. Your expertise will be crucial in managing IP dependencies, planning front-end design tasks, and designing high-speed serial IO protocols. Additionally, you will need to implement clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, and low power modes. Experience in CPU, bus fabrics, or coherence/noncoherent NOC domains will be highly beneficial. Your excellent communication and interpersonal skills will be essential for effective collaboration in a fast-paced, product-orien...