65 Memory Design Jobs - Page 2

We are seeking experienced Memory Layout Engineers with hands-on expertise in 3nm or below process nodes. The ideal candidate should have a strong background in custom layout design and verification for advanced semiconductor technologies.

Role Overview: As a Memory Design Engineer in the DRAM and Emerging Memory Group (DEG) at Micron Technology, Inc., you will be involved in designing and analyzing digital and analog circuits for memory products. Your responsibilities will include: Key Responsibilities: - Contributing to the development of new product opportunities by assisting with the design, layout, and optimization of Memory/Logic/Analog circuits - Parasitic modeling, design validation, reticle experiments, and tape-out revisions - Managing the layout process including floor-planning, placement, and routing - Performing verification processes with modeling and simulation - Contributing to cross-group communication for sta...

Job Description: Memory design engineer. Responsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : We Prefer graduate or postgraduate from a University or Engineering School, in Electronic Engineering or equivalent Engineering Degree. You have some understanding of computer architecture and concepts. We expect you to have basic understanding of CMOS Transistors, their behaviors. We expect some basic understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. Understanding of Power versus Per...

Job Title: Verification Engineer Job Location: Hyderabad Experience: 5 to 8 years Education: B.E./B.Tech/M.E./M.Tech in ECE, Electrical, or VLSI Design or equivalent Job Description: we are seeking a Verification Engineer specializing in Static Timing Analysis (STA) and Standard Cell Characterization for advanced memory product development (HBM, DRAM). The role involves working closely with cross-functional design and verification teams to ensure robust, high-performance memory solutions. Responsibilities: Perform Static Timing Analysis at block, cell, and full-chip levels for DRAM/memory designs. Characterize standard cells (up to 40% effort) using PrimeLib, SiliconSmart Create and validate...

Role Overview: You will be responsible for independently executing mid-sized customer projects in the field of VLSI Frontend, Backend, or Analog design with minimal supervision. As an individual contributor, you will own tasks related to RTL Design/Module and provide support and guidance to engineers in various areas such as Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Your role will involve anticipating, diagnosing, and resolving problems while coordinating with cross-functional teams to ensure on-time quality delivery approved by the project manager and client. Additionally, you will be expected to automate design tasks flows, write scri...

About Tessolve: Tessolve is a leading semiconductor services company, offering design, test, validation, and related services to global customers. We work on SoC / IP development, advanced node challenges, and are keen on pushing the boundaries in memory / VLSI design Job Title: Memory Design Engineer Experience: 4-10 years Location: Location: Bangalore Job Type: Full-Time Industry: Semiconductors / VLSI / EDA Education: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or related field Job Description: We are looking for a skilled and experienced Memory Design Engineer to join our team. The ideal candidate will have a strong background in designing and developing high-performance and l...

Job Description: We're looking for a verification SME, responsible for the SoC verification process and designing the next-generation HBM DRAM products. Deep understanding of SoC Verification, testbench architecture, SoC verification methodologies, and 2.5D & 3D package integration. Responsibilities: • Develop test plans at SOC Level and analyze Coverage. • Build verification environments to verify complex SOCs. • Develop Random/Directed test in RTL and GLS environments. • Review architectural specifications to ensure high quality. • Work with customers to understand their verification &validation requirements • Debug and identify root causes and solutions for pre-silicon and post-silicon is...

Responsibilities: * Collaborate with cross-functional teams on characterization and validation * Ensure compliance with industry standards and customer requirements Health insurance Provident fund

Role Overview: As a Lead Memory Design Engineer, you will be responsible for driving the architecture, design, and development of advanced memory IPs including SRAMs, ROMs, CAMs, and Register Files. Your role will involve leading a team of designers, collaborating with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes. Key Responsibilities: - Define architecture and design specifications for custom memory IPs. - Optimize circuits such as memory cell arrays, sense amplifiers, and decoders. - Lead schematic-level design and simulation. - Collaborate with layout and verification teams. - Guide post-layout activi...

General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. Minimum Qualifications: Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, El...

As a member of the SRAM design group in Bangalore, you will play a crucial role in developing various types of SRAMs, Registerfiles, and ROMs in advanced technology nodes like 4nm, 2nm, and beyond. Your primary responsibility will be to design highly competitive circuits that meet performance/power specifications requested by customers. Additionally, you will guide and lead a group of engineers to deliver the SRAM IP within the given timelines. You will analyze circuits to identify potential robustness gaps and find solutions to improve the design's robustness. It will be your ownership to take the responsibility from SPEC to GDS and DK delivery. Moreover, you will review circuits, robustnes...

Dear Candidate's, find the below Details & JD Location: Hyderabad NP: Immediate-15 Days Experience: 3-5 Years(02 Positions) 5-7 Years(01 Position) interview: 03 Rounds Job Description: Good understanding of digital / mixed signal circuits and experience in Digital /Mixed signal Verification. Understand the usage of tools like Virtuoso, Xcellium, Simvision, vsim, Waveview, Finseim, Hspice. • Hands on experience in writing Verilog, Real Number Models is a plus. • Hands on experience in building SV testbenches at Block and Fullchip Level. • Hands on experience in SV, UVM based Verification. Good scripting skills using perl, python is a plus. • Previous work experience in DRAM memory related fie...

Role & responsibilities : * Pre-Silicon Support: Simulate, analyze, and debug pre-silicon full-chip designs to ensure functional accuracy. * Test Case Development: Develop stimulus and test cases to increase the functional coverage for DRAM, SRAM, and other emerging memory technologies. Core Requirements: * Strong Communication Skills: Ability to collaborate effectively within a team. * Leadership: Guide new team members and engineers, sharing your knowledge and experience. * Analytical Expertise: Deep understanding of complex CMOS and/or gate-level circuit designs. * Proficiency in SPICE and/or Verilog simulations. Preferred candidate profile : Required Skills: * Experience with SystemVeril...

Description: Job Title: Memory Circuit Design Verification Engineer Memory Circuit Design Verification Engineer Description As a Memory Circuit Design Verification Engineer, you will work in a highly innovative, motivated, young and dynamic design team capable of verifying complete products using state of the art memory technologies. You will need to have the ability to evaluate full chip and/or block level functionality and provide solutions to help the timely delivery of a functionally correct design. Unique Opportunities Complete ownership of verification and end to end analysis of complex full chip gate level custom designs with advanced low power and power management technologies spread...

Role Overview: As a Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. Your role will involve working on cutting-edge products across various systems such as Digital, Analog, RF, and optical systems. Collaborating with cross-functional teams, you will develop solutions to meet performance requirements and contribute to the company's mission of enabling next-generation experiences. Key Responsibilities: - Work on memory design with at least 2 years of experience - Develop embedded SRAM/ROM using compiler approach - Possess fundamental knowledge of bit cell characteristics such as SNM, WM,...

Role & responsibilities Description : Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience in Designing & Verification Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects ...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Memory Design Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :About The Role (Memory Design Engineer) :Job Overview:Memory Design & Characterization Engineer with 3-5 years of expQualification:Good understanding of Memory Design & Characterization using Silicon Smart or equivalent Good if candidate Hands-on experience on AOCV/LVF working experience...

Hands-on technical, finfet expertise (nodes 12nm or below) and manage a team of 5+ members. Proven track record of managing a team of >5 members. Experience within the service industry. Performs layout and takes corrective actions in such a way that the final result meets all requirements as stated in the Design document, section layout, including all remarks from review, the customer and back annotation. Performs layout in such a way that the final result meets all general layout guidelines and matches 1-to-1 with parameter devices and hierarchy used in simulations. Create floorplan Performs DRC and takes corrective actions if needed until DRC is error free Performs LVS and takes corrective...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

Candidate should have worked in memory domain and preferably candidate should have worked on Memory characterization, design and validation. Candidate should be familiar with layout parasitic extraction and challenges in deep submicron technologies. Candidates should be familiar with Spice decks and should be able to write spice decks, stimulus and test vectors and validate them. Candidates should have good knowledge and should have hands on experience with fast simulator tools. Candidate should have good memory design knowledge and should have debugging skills and should be familiar with waveform viewers etc . Candidate should be familiar with NMDL + CCST. libs and should have hands on expe...

Role & responsibilities Description: Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and ...

Job description About The Role Designs, develops, and builds digital circuits for custom blocks including SRAM, register files, memory compilers, and caches. Designs floorplans, performs circuit design, schematic entry, simulation for major blocks, and verifies functionality to optimize custom circuit for power, performance, area, timing, and yield goals. Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design. Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and memory circuit design issues. Optimizes performance, power, and area, reduce leakage...

As part of Synopsys, you will be at the forefront of innovations that are reshaping the way we live and work. From self-driving cars to Artificial Intelligence, 5G to the Internet of Things, we are driving the Era of Smart Everything with cutting-edge technologies in chip design and software security. If you are driven by a passion for innovation, we invite you to join our team. The Silicon Design & Verification business focuses on accelerating the development of high-performance silicon chips. As the world's leading provider of solutions for designing and verifying advanced silicon chips, we are committed to designing the next-generation processes and models essential for chip manufacturing...

Role & responsibilities Core Requirements Basic understanding of CMOS and gate level circuit designs Familiarity with SPICE Familiarity with Verilog simulations Good communication skills and ability to work well in a team Preferred Qualities Analytical capability for complex gate level circuit designs Experience in SystemVerilog, PLI coding Experience in UVM Test Bench Experience in DRAM, SRAM or other memory related fields Experience Level 5+ years Preferred candidate profile

Role Responsibilities: Map the IP ecosystem and anticipate future Foundation IP product requirements for Google's custom silicon solutions. Collaborate with Architecture, Product Management, Design, SOC IP Integration, and IP QA teams to ensure product excellence. Work with IP vendors to influence new features, schedules, and IP portfolios to maximize product differentiation. Drive SOW, ECOs, change/version controls, and develop IP QA checklists and guidelines to ensure quality and performance. Job Requirements: Master's degree in Electrical Engineering or equivalent practical experience. 6 years of experience in memory, standard cell, GPIO, and other custom designs. Experience with RTL to G...