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4 Memory Controllers Jobs

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7.0 - 9.0 years

0 Lacs

india

On-site

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Lead Verification Engineer THE ROLE: Candidate should have worked on complex design with hands on experience in developing testbench, UVC, test-planning and execute test plan, coverage development and closure. Candidate actively involve in technical discussion and test plan review. THE PERSON: Experience requires demonstrated technical expertise in functional verification of complex designs including: test planning, test bench development, stimulus generation, checking, and functional coverage. Experience or exposure to Verilog, System Verilog, Object Oriented Programming/C++, Perl, and logic simulation is a requirement Experience or exposure to UVM/OVM is a must. Must demonstrate strong Object Oriented programing skills and concepts. Experience with memory controllers, dfi, dram memory models(ddr4/5, lpddr4/5, hbm, NVDIMM) and/or ddr phys is a plus Requires strong communication skills and the ability to work independently as well as in a cross-site team environment. KEY RESPONSIBILITIES: Work with all stakeholders such as design architect and block designer to understand features to be verified. Follow the process and good practices to develop UVC and testbench for design verification. PREFERRED EXPERIENCE: Experience with memory controllers, dfi, dram memory models(ddr4/5, lpddr4/5, hbm, NVDIMM) and/or ddr phys is added advantage ASIC design verification experience with 7+Years Hands on experience in developing complex UVC Good debugging skill and good knowledge of verification tool and methodology Hands on experience with coverage planning, coding, and coverage closure Should have worked on developing testplan at module level/IP level /Chip-level project Mentoring Juniors and ensuring that the team achieves technical goals with high quality. ACADEMIC CREDENTIALS: B.E/B.Tech in ECE, Electrical engineering degree or Master's degree preferred with emphasis in Electrical/Electronics Engineering. Preferred VLSI major in post-graduation #LI-SR5 Benefits offered are described: . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

Posted 10 hours ago

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12.0 - 16.0 years

0 Lacs

karnataka

On-site

You will be joining a team of highly skilled engineers who are responsible for designing and developing cutting-edge routing and optical products using the latest industry tools. As part of your role, you will be involved in the following key responsibilities: - Designing and implementing complex FPGAs. - Participating in the architecture definition, implementation, and verification phases. - Developing detailed design specifications and test plans. - Implementing block-level RTL, performing synthesis, and achieving timing closure. - Collaborating with cross-functional teams including hardware, software, diagnostics, and signal integrity groups. - Assisting in complex subsystem level lab bring-up, integration, and unit test validation. - Contributing to the design process adoption within the team. - Working on improving design, development, and verification methodologies. To be successful in this role, you should possess the following qualifications: - Background in networking and system design. - Experience in designing with Xilinx, Microsemi, and Altera FPGAs. - Proficiency in HDL languages such as Verilog, VHDL, and System Verilog. - Hands-on experience with Ethernet-based protocols, PCIe, AXI, memory controllers, OTN, I2C, SPI, UART, etc. - Familiarity with simulation flows like UVM and VMM is an added advantage. - Knowledge in signal integrity and system bring-up is a plus. - Basic knowledge of Unix systems and scripting tools is beneficial. - Ability to work independently, provide mentorship, and demonstrate strong leadership skills. - Self-motivation, teamwork, and excellent communication skills are essential. Educational Background: Typically requires a minimum of 12 years of experience in FPGA designs with an MTech/BTech in EE/EC domain. #WeAreCisco: At Cisco, every individual contributes their unique skills and perspectives towards our shared purpose of creating an inclusive future for all. Our passion for connection drives us to celebrate diversity and focus on unlocking potential. Cisconians have the opportunity to explore multiple career paths within the company, with a strong emphasis on learning and development at every stage. Our technology, tools, and culture support hybrid work trends, enabling everyone to excel and grow. We recognize the importance of uniting communities, with our employees actively participating in 30 employee resource organizations known as Inclusive Communities. These groups foster belonging, promote learning to become informed allies, and drive positive change. Additionally, dedicated paid time off for volunteering (80 hours per year) allows us to give back to causes we care about, with nearly 86% of Cisconians participating. Driven by our people, our purpose is to lead the way in technology that powers the internet. We help our customers reimagine their applications, secure their enterprise, transform their infrastructure, and achieve sustainability goals. Every action we take is a step towards a more inclusive future for all. Join us on this journey and take your next step to be yourself, with us!,

Posted 2 days ago

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5.0 - 7.0 years

0 - 0 Lacs

bangalore, chennai, kurnool

On-site

Description We are seeking an experienced Data Analyst to join our team in India. The ideal candidate will have 5-15 years of experience in data analysis, with a strong ability to derive insights and contribute to data-driven decision-making. Responsibilities Analyze and interpret complex data sets relating to the business. Develop and maintain reports, dashboards, and data visualizations. Collaborate with cross-functional teams to understand data requirements and provide insights. Identify trends, patterns, and insights to drive business decisions. Assist in the implementation of data collection systems and other strategies that optimize statistical efficiency and data quality. Skills and Qualifications Proficiency in SQL and experience with database management systems. Strong knowledge of data visualization tools (e.g., Tableau, Power BI, or similar). Experience with statistical analysis software (e.g., R, Python, SAS, or similar). Familiarity with data warehousing concepts and ETL processes. Excellent analytical and problem-solving skills. Strong attention to detail and ability to work with large data sets. Effective communication skills to present findings to stakeholders.

Posted 3 days ago

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5.0 - 9.0 years

0 Lacs

noida, uttar pradesh

On-site

The Verification role requires you to be proficient in Functional and Performance verification, utilizing effective methodologies at different levels such as Module, Subsystem, SoC, and System. It is essential to have the skills to translate requirements into a verifiable plan. You will collaborate with SoC and IP developers locally and globally to implement best practices and enhance productivity continuously. A meticulous approach towards achieving zero defects is crucial. Your responsibilities will include creating verification test benches, verification components, test cases for simulation, formal verification, and emulation. Additionally, you will be responsible for debugging failures and formulating simulation scenarios for various analyses. Your key tasks will involve team leadership, technical guidance, and Verification planning. You will be responsible for developing, fine-tuning, and implementing verification test benches. Furthermore, you will create verification test bench components like drivers, monitors, response checkers, and leverage advanced UVM VIPs. Your role will also entail generating direct and constrained-random stimuli using C and SystemVerilog, examining RTL code, functional coverage, and assertion results. You will be expected to work on functional coverage development and system Verilog assertions. Proficiency in formal verification techniques, robust debugging skills, failure re-creation, and root cause analysis are essential requirements. Strong debugging and logical reasoning skills are crucial for this position. To excel in this role, you must have a strong background in C and UVM/SystemVerilog-based Test environments. Understanding the design/architecture and the ability to debug RTL/Gate netlist are mandatory skills. Coverage-driven Verification expertise is required to fulfill the Functional and Performance requirements of the SoC and manage regression effectively. Knowledge of Microcontroller architecture, ARM Cores, Interconnect (NIC, FlexNoC), Cache Coherency, and Bus Protocols like AHB/AMBA, AXI, ACE is essential. Additional skills that would be advantageous for this role include experience with Memory controllers (Flash, SRAM, DDR3/4/LPDDR), Protocols such as PCIe, MIPI, GPU, Ethernet, and Serial/Quad flash. Familiarity with Formal verification methodologies and Apps, AVIP, PinMuxing Verification, Randomization, and Low Power intent verification using UPF is beneficial. Exposure to pre-silicon validation/emulation tools like Veloce, Zebu, FPGA Prototyping would be considered a plus.,

Posted 3 weeks ago

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