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8.0 - 13.0 years
12 - 22 Lacs
noida, pune, bengaluru
Work from Office
Key Responsibilities Develop and implement simulation testbenches , low-power simulation setups , and coverage monitors to achieve target verification goals. Write and maintain assembly/C language diagnostics , assertion checkers , and coverage-driven verification environments . Create and review detailed test plans , debug verification failures , and analyze coverage metrics . Collaborate closely with cross-functional teams to ensure seamless integration and verification. Work independently as well as contribute effectively in a team environment. Mandatory Skills & Expertise Design Verification Experience: Minimum 8+ years in pre-silicon DV. Languages & Tools: Strong knowledge of Verilog , SystemVerilog assertions , and advanced testbench methodologies . Expertise in developing complex testbenches using OVM/UVM methodology . Experience with popular EDA simulation tools . Protocols & Standards: Hands-on experience in AMBA protocol , PCIe MAC , USB MAC , Bluetooth MAC , and Wi-Fi 802.11 MAC layer protocols . Low-Power Verification: Proficiency in Low Power Simulation/UPF setup and debugging related simulation failures Programming & Scripting: Familiarity with scripting languages like Perl , Unix Shell , or equivalent. Exposure to assembly language programming is an added advantage. Core Knowledge: Strong understanding of computer architecture and design verification fundamentals . Interested can share resume on Shubhanshi@incise.in
Posted 22 hours ago
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