1017 Lvs Jobs - Page 7

About The Role Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : SAP FI S/4HANA Accounting Good to have skills : SAP FI S/4HANA Central Finance Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various teams to ensure that application requirements are met, overseeing the development process, and providing guidance to team mem...

BE Mechanical/Electrical with 6-10 years of experience in the Energy/Manufacturing sector/Auto Sector Preferred candidates from high voltage industry Candidates will be responsible for - Procurement from Import and Domestic (Timely placement of PO's, ensuring on time delivery, incoterm, optimizing freight, timely forecasting etc) Procurement of casting ,machining, sheet metal, fabrication, electrical articles & equipment's (CT/VT/Panels etc)for production (assembly) ensuring freight optimization & product cost out for high voltage GIS(Gas Insulated Switchgear) upto 400kv. Inventory management -Ensuring ITR targets Built safety stocks for Delivery, quality critical parts ensuring lead times I...

Description: We are seeking a highly skilled and experienced Senior Simulation Engineer to join our team. In this role, you will be responsible for conducting advanced thermal, power integrity, and mechanical vibration simulations for Printed Circuit Boards (PCBs) and electronic systems. Requirements: We are seeking a highly skilled and experienced Senior Simulation Engineer to join our team. In this role, you will be responsible for conducting advanced thermal, power integrity, and mechanical vibration simulations for Printed Circuit Boards (PCBs) and electronic systems. 4+ years of work experience in the following areas: Ansys PCB thermal simulation PCB power density analysis Mechanical vi...

Hello Connections!!!, Greetings from ElevarSoC We are hiring for Memory Layout Engineer with 3+Years of Experience for Banglaore location. hashtag#Bangalore Immediate / 2 weeks preferred hashtag#Below the jd Technical Skill: Experience in Memory/Custom Layout design. Memory Leafcell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design for better performance. Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations. Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions. Proficient in Cadence Virtuoso layout...

Job Title: Physical Design EngineerLocation: [Insert Location or indicate Remote/Hybrid]Type: [Full-Time / Contract]Industry: Semiconductors / VLSI / ASIC DesignJob Summary:We are seeking a skilled Physical Design Engineer to join our chip development team. In this role, you will be responsible for implementing and optimizing the physical layout of complex ASICs from RTL to GDSII. You’ll collaborate closely with RTL design, verification, and DFT teams to ensure successful tape-out of high-performance, low-power silicon designs.Key Responsibilities:Own and execute physical design tasks including floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and physical verifi...

In a fast-paced leading-edge design environment with endless possibilities of innovation and learning, you will be responsible for ensuring flawless execution in specific areas of SoC level Physical Design such as Physical Verification, Tapeout, ESD Verification, and Pre-emptive Quality audits of incoming designs. This is a great opportunity to join a team of talented individuals working on state-of-the-art complex SoC Designs as part of Intel Foundry Design Services and Reference Design Development teams. - Integration and generation of layout and netlist views of different levels of hierarchy up to SoC. - Layout verification and signoff for IP blocks, APR partition, and SoC levels of hiera...

Job Overview In Arm's Solutions Engineering group, our primary focus extends beyond advanced System-on-Chip (SoC) development As Physical Design (PNR) Engineers, we play a critical role in shaping the future landscape of chip implementation methodologies Our expertise lies in optimizing physical designs through advanced placement and routing techniques, ensuring optimal power efficiency, enhanced performance, and improved area utilization We actively refine PNR methodologies, influence Electronic Design Automation (EDA) tools, and build comprehensive knowledge bases essential for custom SoC and CPU designs Collaborating closely across Arm's organizational divisions, we drive innovative and r...

Role Overview: As a Layout Design Engineer, your main role will involve hands-on experience with layouts of important memory building blocks such as control, sense amplifiers, I/O Blocks, bit cell array, and decoders in a compiler context. You should have worked on 16nm / 14nm / 10nm / 7nm / Finfet process technologies. Additionally, you should have hands-on experience with top-level memory integration and expertise in DRC, LVS, Density verification, and cleaning physicals across the compiler space. A good handle on IR/EM related issues in memory layouts is also essential. Key Responsibilities: - Work on layouts of memory building blocks in a compiler context - Ensure top-level memory integr...

As a Layout Design Engineer at RFIC Solutions Inc., you will be responsible for the Layout design of RF and Analog circuits in a fast-paced environment. Your key responsibilities will include: - Excellent problem solving skill of DRC, LVS issues - Parasitic extraction of layout and layout quality checking - Custom layout experience must include high frequency circuits such as LNAs, Mixers, VCOs, etc. - Full familiarity with Cadence Virtuoso and ADS (Advance Design System) Caliber tools for 65nm and lower design processes - Full understanding of hierarchical planning (top down and bottom up) and integration To qualify for this role, you should have an M.Tech or BE/B.Tech in Electronics and Te...

As a Physical Verification Engineer, you will be responsible for performing layout verification of integrated circuits (ICs) using industry-standard tools. Your role will include checking for DRC, LVS, ERC, and other checks to ensure the design is manufacturable and compliant with foundry rules. Key Responsibilities: - Perform layout verification of ICs using industry-standard tools - Check for DRC, LVS, ERC, and other verification checks - Ensure the design is manufacturable and compliant with foundry rules Qualifications Required: - 4-7 years of experience in physical verification of IC layout - Proficiency in industry-standard physical verification tools - Strong understanding of DRC, LVS...

Physical Design Manager www.omnidesigntech.com Location: Bengaluru / Hyderabad About Omni Design Technologies Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of inno...

Physical Design Manager www.omnidesigntech.com Location: Bengaluru /Hyderabad About Omni Design Technologies Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innov...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. S...

Company Description Mobiveil Technologies Inc. is a rapidly growing technology company specializing in the creation of Intellectual Properties, frameworks, and solutions for the Networking, Storage, Consumer, Enterprise, and Device Mobility markets. Leveraging decades of experience, Mobiveil delivers high-quality, high-speed serial interconnect Silicon IP cores and custom and standard form factor hardware boards to customers globally. With dedicated integration support, flexible business models, and strong industry presence, Mobiveil solutions offer significant value to customers' marketing and engineering goals. The company is headquartered in Silicon Valley, with engineering centers in Mil...

Analog & Mixed Signal Layout Engineer High-Speed Analog Layout Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated Analog & Mixed Signal (A&MS) Layout Engineer with over 6 years of experience in the development of high-speed analog and mixed-signal integrated circuits. You are passion...

ANALOG LAYOUT ENGINEER An experienced Analog Layout design engineer should be innovative, collaborative, meticulous, and curious. KEY RESPONSIBILITIES: Layout of basic digital and analog building blocks using analog transistor level components. Layout of analog macros, power pads, and input/output pads using above blocks Working closely with Analog designers in floorplanning; power grid and signal flow planning Physical and electrical verification include DRC, LVS, EM/IR, ERC, PERC Latch up and PERC ESD Creation of blackbox models for other groups in the design flow PREFERRED EXPERIENCE: Must have detailed knowledge of CMOS circuit theory. Must have ability to communicate with various teams ...

Job Overview We are seeking a talented Analog Layout Engineer with 3- 5 years of experience in advanced semiconductor technologies (5nm and below). The ideal candidate will have hands-on expertise in custom layout design, FinFET technology nodes, and EDA tools like Cadence Virtuoso and Calibre. This is a fantastic opportunity to work on cutting-edge analog and mixed-signal circuit layouts as part of a high-performance team. Key Responsibilities Execute full custom layout design for high-speed analog and mixed-signal blocks. Collaborate closely with circuit design teams to interpret and implement layout specifications. Perform layout verification, including DRC, LVS, and parasitic extraction ...

Position Summary Role and Responsibilities About Samsung Semiconductor India Research (SSIR) With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segmentsin component solutions, featuring industry-leading technologies inSystem LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions,AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPsand much more. As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers...

The Opportunity The auxiliary design engineer has a responsibility to understand technical requirements for auxiliary power system networks and is fed with adequate power for the equipment and station to run without any interruption, there by ensuring safety of the end equipment and HVDC station as a whole. How You'll Make An Impact You will demonstrate knowledge in the design of MVS, LVS, Diesel Generator, Auxiliary/distribution Transformer & battery system. You will be responsible for the preparation of SLD, List of loads/load list/feeder list. You will be responsible for estimating material, equipment sizing activity (Diesel Generator & Auxiliary/Distribution transformer) and cable sizing...

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nat...

Key Responsibilities: Perform physical verification at the SoC, core, and block levels, including DRC, LVS, ERC, ESD, DFM, and tapeout tasks. Address complex physical design challenges related to sign-off and ensure timely resolution. Maintain deep understanding of physical verification workflows and methodologies across RTL to GDS2. Collaborate with Place-and-Route (PNR) teams to support verification sign-offs at various stages. Troubleshoot and resolve LVS issues, particularly for complex analog-mixed signal IP integrations. Support verification of full-chip components including I/O rings, corner cells, seal rings, RDL routing, and bumps. Contribute to the development of sign-off methodolo...

Senior Physical Design Engineer Physical Design >> Senior Physical Design Engineer Post Senior Physical Design Engineer Required Experience 5 to 10 Years Location: Delhi NCR, Bangalore, Hyderabad Openings 8-10 Education BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication) Physical Design Engineer knowledge of PD Flow from netlist to GDS (Floorplanning, Synthesis, Power Planning, Placement & Optimization, CTS, Routing, ECO steps, Timing/SI) Good idea about OCV/MMMC and multi power designs (Level shifters, Isolation cells etc) Should have worked extensively on XTalk/SI/EM Knowledge about CTS, Clock tree methodology and clock skewing. Tool specific knowledge: ICC, innovus, primetim...

Work Type: Full Time - Work From Office Roles & Responsibilities: Key Responsibilities: Design and simulate analog circuits (e.g., amplifiers, ADCs, DACs, PLLs, etc.) using industry-standard tools. Guide students and Ph.D. scholars in their VLSI projects , providing technical mentorship. Develop VLSI-related course materials , hands-on labs, and project documentation. Collaborate with academic institutions and research teams to create industry-relevant projects . Provide technical training and workshops on VLSI design methodologies and tools . Work on ASIC/FPGA implementations and optimize circuit performance. Stay updated with emerging trends in VLSI and semiconductor technologies . Require...

Company: Eteros Technologies India Private Limited Eteros Technologies, Inc. is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad • Our world-wide customers are amongst The Who's who in the semiconductor industry. Eteros works not only with some of the top 20 semiconductor startups in the world but boasts of customers who are among the most respected publicly traded semiconductor companies. • Eteros engineers work on cutting edge technology nodes while working on the state-of-the art designs in the AI/ML, Datacen...