433 Lvs Jobs - Page 17

Development and maintenance of PDK's with focus on physical verification rule decks Job Description In your new role you will: Develop/maintain DRC, LVS, RCX, Latchup rule decks and develop QA to meet high quality standards Develop new Pcell's (symbol/layout) or enhance existing Pcell's Work closely with the Design Teams, Technology Teams, and Fab groups to understand specifications and requirements Work closely with Technology department and Fab to define design rules and translate them into an accurate Calibre DRC and LVS rule decks Meet timelines and provide innovative solutions to achieve high level of satisfaction among PDK users Address change requests from the Device Design and Device Characterization groups in a consistent and effective way Demonstrate strong teamwork, communication skills and work ethics Respond effectively to design center/teams requests in a timely and consistent manner Develop and maintain component tests Your Profile You are best equipped for this task if you have: Familiar with full-custom and semi-custom design flows/design concepts Minimum 5+ years of relavent experience Expertise in developing PDK components – PV rule decks , Device libraries and techfiles Expertise in EDA tools (Calibre, Virtuoso, QRC) and their interfaces with PDK’s Strong background in semiconductor device physics Strong layout and design verification experience including but not limited to Calibre: DRC, LVS, PERC, Assura QRC Good understanding of IC fabrication process and IC Design Process Good understanding of electronic circuits, layout techniques, Pcell usage and physical verification Expertise in programming/scripting languages w.r.t PDK development and QA Python, Perl, TCL, Cadence SKILL, Ruby Hands on experience with Configuration, Release and Build Management Exposure to issue tracking tools (JIRA) is a definite plus Exposure to formal QA procedures will be an added advantage Experience with MS-Office, ideally basic knowledge in working on UNIX/Linux platforms Excellent programming skills with computational thinking Proactive with good communication (assertive) and interpersonal skills Avid programmer with excellent debugging skills to diagnose and devise workarounds for PDK/flow/design issues Contact: Gowri Shenoy, LinkedIn #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND and Emerging memory. We are looking for an energetic, ambitious, result-driven individual with strong work ethic and integrity to join us as the Scribe Design Engineer. The Scribe Design Non-Array (SDNA) team is responsible for the design, layout, and verification of CMOS electrical test structures that enable CMOS device development, Compact modeling, Reliability modeling and Fab process monitoring. In this role you will work with a group of Engineers in India, Japan, and the US. As part of a global team, you will contribute to physical layout, floor planning and verifying through DRC and in-house verification tools. This role will allow you to work on all technology types at Micron. Specific Responsibilities Include But Not Limited To Understand the technology challenges, work with partner groups to provide CMOS Test Structure design and layout solution for N, N+1 and N+2 process technology nodes Verify integrity of the TEG design through LVS, DRC, E-simulation, and in-house verification tools Attend necessary area and part type meetings to understand the scope and Coordinate activities related to Scribe scheduling, design, improvement and Tape Out. Be a strong customer interface to maintain high customer satisfaction with the Scribe Teams service Learn and apply Micron Layout methodology for TEG solutions Understand the Fab Quality performance of our Scribe designs Strive to continuously improve the accuracy and repeatability of our Structures Use Metrics and data to drive decisions and improve performance. Provide advice and counsel to senior management on significant technical issues related to CMOS TEG design solutions and automation. Define and lead complex and multi-disciplinary projects that are critical for SCRIBE Design solutions Qualifications For This Position Include Hands on experience and proficiency in EDA tools (Cadence Virtuoso Layout and Schematic Editor, Calibre,Hspice etc.) Layout and Verification skills in Cadence and Calibre (DRC, LVS) Able to run pre and post simulations and analyze the simulations with silicon data. Good knowledge of semiconductor device physics, operation, parametric testing and DFM. Strong understanding micron memory process Good project management skills Overview of fab process steps and overall wafer fabrication processes – Familiarity with device characterization is a plus. Familiarity with linux/unix system and scripting languages Phyton/Skill is a plus. Demonstrated innovative problem-solving skills. Willingness to learn new skills and explore unfamiliar concepts. Ability to develop and maintain relation with cross-functional teams and partners. Good oral and written communication skills to interact with global and local teams. Education & Experience Requirements BE/B.Tech in with at least 10 years of relevant experience ME/M.Tech in Electrical or Electronics Engineering or other similar discipline with at least 8 years of relevant experience About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Experience – 5+ Years in Layout Design, Memory Layout experience is preferred. Qualifications For This Position Include Hands on experience and proficiency in EDA tools (Cadence Virtuoso Layout and Schematic Editor, Calibre etc.) Excellent circuit design, layout, schematic, and verification skills including DRC, LVS and circuit simulation (hspice) Good knowledge of semiconductor device physics & operation and parametric measurements Knowledge of Memory Array design architectures, fab processes, and failure modes is preferred Excellent problem solving and strong interpersonal skills Willingness to learn new skills and explore unfamiliar concepts Proficiency in Perl, Skill code and UNIX shell scripting languages is desired, but not required About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. IPPD: Physical design engineer Physical Implementation activities for high performance Cores for 16/14/7/5nm or lower technologies, which includes all or some of the below. Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), Low Power verification, PDN, Timing Closure and or power optimization Exposure to PD implementation of PPA critical cores. Exposure to timing convergence of high frequency data-path intensive Cores and advanced STA concepts. Able to handle Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes. Understanding of clocking architecture. Tcl/Python/Perl Scripting aware for small automation Strong problem-solving skills , good communication skills and good team player Collaborate with design, DFT and PNR teams and support issue resolutions wrt constraints validation, verification, STA, Physical design, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As CPU Physical Design CAD engineer, you will build and support the world"™s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area. Roles and Responsibilities Develop, integrate and release new features in our high-performance place-and-route CAD flow Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area Maintain, support and debug implementation flows, and resolve project-specific issues Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. Work with EDA vendors to define roadmap and to resolve tool issues Preferred Qualifications: Bachelors/Masters degree in Electrical/Electronics Engineering or Computer Science Ten+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD role High level of proficiency in Tcl as well as Python Experience with automation Experience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV Experience with advanced technology nodes (5nm or lower) Solid understanding of digital design, timing analysis and physical verification Strong user of industry-standard place-and-route tools such as Cadence Innovus Proven track record of managing and regressing place-and-route flows

Job Area: Engineering Services Group, Engineering Services Group > Layout Engineer General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. Minimum Qualifications: "¢ Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 3+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 5+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR High School diploma or equivalent and 7+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. "¢ 3+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap). SRAM Mask Layout Designer Qualcomm is a company of inventors seeking to revolutionize the CPU market in an age of new possibilities. Are you interested in joining Qualcomm"™s high performance CPU team as an SRAM Mask Layout Designer? You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. As a Mask Layout Designer, you will develop block or macro level layouts and floorplans for high performance custom memories according to project requirements, specifications, and design schematics. Minimum qualifications — 5+ years of experience and a high school diploma or equivalent — OR 5+ years experience and BS in Electrical Engineering — OR 3+ years experience and MS in Electrical Engineering — Direct experience with custom SRAM layout — Experience in industry standard custom design tools and flows. — Knowledge of leading-edge FinFET and/or nanosheet processes (5nm or newer). — Experience in Layout design of library cells, datapaths, memories in deep sub-micron technologies. — Knowledge of all aspects of Layout floorplanning and hierarchical assembly. — Knowledge of Cadence Virtuoso and Calibre LVS/DRC. Preferred qualifications — Good understanding of device parasitics and reliability considerations during layout. — Good understanding of critical circuits and layout styles. — Ability to write Skill code for layout automation. — Knowledge of improving EMIR in layout. — Good communication skills to work with different teams to accurately describe issues and follow them through for completion. Roles and Responsibilities — Design layout for custom memories and other digital circuits based on provided schematics. — Read and interpret design rule manuals to create optimal and correct layout. — Own the entire layout process from initial floorplanning to memory construction to physical verification. — Use industry standard verification tools to validate LVS, DRC, ERC etc. — Interpret the results from the verification suite and perform layout fixes as needed. — Provide layout fixes as directed by the circuit design engineers. — Work independently and execute memory layout with little supervision. — Provide realistic schedules for layout completion. — Provide insight into strategic decisions regarding memory layout and

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As CPU Physical Design CAD engineer, you will build and support the world"™s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area. Roles and Responsibilities Develop, integrate and release new features in our high-performance place-and-route CAD flow Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area Maintain, support and debug implementation flows, and resolve project-specific issues Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. Work with EDA vendors to define roadmap and to resolve tool issues Preferred Qualifications: Bachelors/Masters degree in Electrical/Electronics Engineering or Computer Science Ten+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD role High level of proficiency in Tcl as well as Python Experience with automation Experience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV Experience with advanced technology nodes (5nm or lower) Solid understanding of digital design, timing analysis and physical verification Strong user of industry-standard place-and-route tools such as Cadence Innovus Proven track record of managing and regressing place-and-route flows

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. IPPDPhysical design engineer Physical Implementation activities for high performance Cores for 16/14/7/5nm or lower technologies, which includes all or some of the below. Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), Low Power verification, PDN, Timing Closure and / or power optimization Exposure to PD implementation of PPA critical cores. Exposure to timing convergence of high frequency data-path intensive Cores and advanced STA concepts. Able to handle Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes. Understanding of clocking architecture. Tcl/Python/Perl Scripting aware for small automation Strong problem-solving skills , good communication skills and good team player Collaborate with design, DFT and PNR teams and support issue resolutions wrt constraints validation, verification, STA, Physical design, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: About The Role Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles "¢ Synthesis, Static Timing Analysis and LEC of SoC/Cores "¢ Full chip and block level timing closure, IO budgeting for blocks "¢ Logical equivalence check between RTL to Netlist and Netlist to Netlist "¢ Knowledge of low-power techniques including clock gating, power gating and MV designs "¢ ECO timing flow "¢ Proficient in scripting languages (TCL and Perl). Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 4+ yrs of experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications "¢ 2+ years Hardware Engineering experience or related work experience. "¢ 2+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Our vision is to transform how the world uses information to enrich life for all, Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever, For more than 45 years, Micron Technology, Inc has redefined innovation with the worlds most advanced memory and semiconductor technologies Were an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life, We are looking for Layout Design engineer at our Micron Technologys HBM Team in Hyderabad, India As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment, Role and Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support, Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design Perform layout verification like LVS/DRC/Antenna, quality check and documentation, Responsible for on-time delivery of block-level layouts with acceptable quality, Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment, Guide junior team-members in their execution of Sub block-level layouts & review their work Contribute to effective project-management, Effectively communicating with Global engineering teams to assure the success of layout project, Qualification/Requirements 8 to 15 years' experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, FinFET ) Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must, Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc , Good understanding of Analog Layout fundamentals (e-g , Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc ) Understanding layout effects on the circuit such as speed, capacitance, power and area etc , Ability to understand design constraints and implement high-quality layouts, Ability to understand design hierarchy and different architectures for Memory designs, Excellent command and problem-solving skills in physical verification of custom layout, Multiple Tape out support experience will be an added advantage, Experience in managing multiple layout projects, ensuring quality checks are taken care at all stages of layout development, Excellent verbal and written communication skills, Education BE or MTech in Electronic/VLSI Engineering All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status, About Micron Technology, Inc, We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micronand Crucialbrands Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities ? from the data center to the intelligent edge and across the client and mobile user experience, To learn more, please visit micron /careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status, To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards, Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron,

Our vision is to transform how the world uses information to enrich life for all, Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever, For more than 45 years, Micron Technology, Inc has redefined innovation with the worlds most advanced memory and semiconductor technologies Were an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life, We are looking for Layout Design engineer at our Micron Technologys HBM Team in Hyderabad, India As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment, Role and Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support, Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design Perform layout verification like LVS/DRC/Antenna, quality check and documentation, Responsible for on-time delivery of block-level layouts with acceptable quality, Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment, Guide junior team-members in their execution of Sub block-level layouts & review their work Contribute to effective project-management, Effectively communicating with Global engineering teams to assure the success of layout project, Qualification/Requirements 8 to 15 years' experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, FinFET ) Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must, Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc , Good understanding of Analog Layout fundamentals (e-g , Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc ) Understanding layout effects on the circuit such as speed, capacitance, power and area etc , Ability to understand design constraints and implement high-quality layouts, Ability to understand design hierarchy and different architectures for Memory designs, Excellent command and problem-solving skills in physical verification of custom layout, Multiple Tape out support experience will be an added advantage, Experience in managing multiple layout projects, ensuring quality checks are taken care at all stages of layout development, Excellent verbal and written communication skills, Education BE or MTech in Electronic/VLSI Engineering All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status, About Micron Technology, Inc, We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micronand Crucialbrands Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities ? from the data center to the intelligent edge and across the client and mobile user experience, To learn more, please visit micron /careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status, To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards, Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron,

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Good knowledge of Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3- 6yrs years of experience in Physical Design/Implementation Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3071100 Show more Show less

Exp level: 2 to 5 years Location: Bangalore Notice Period: Immediate joiners are preffered. Responsibilites: Design and implement analog layouts for high-performance circuits (e.g., amplifiers, ADCs, DACs, voltage regulators) using TSMC 3nm and 5nm nodes. Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) to ensure design compliance. Required Skills: Strong experience in analog layout design at advanced nodes (TSMC 3nm and 5nm). Proficiency in layout tools like Cadence Virtuoso, Synopsys IC Compiler, or similar. Understanding of layout-dependent effects (LDE) and its impact on performance. Knowledge of parasitic extraction, simulation, and optimization. Familiarity with design for manufacturability (DFM) techniques. Please email Resumes to raksha.k@acldigital.com Show more Show less

Experience of 5+ years in Physical verification and closure. Location: Bangalore NP - Immediate Main responsibility of the candidate will be around achieving a clean GDS view with below key items: Physical Verification closure for Arm CPU implementation: Should have completed multiple tape-outs with Physical Verification closure role in the past Strong understanding of DRC/LVS/PERC/Antenna/DFM and associated concepts for advanced nodes on TSMC and Samsung foundries Needs to run Physical Verification on Arm CPU designs on advanced technology nodes Needs to run fixing for DRC/LVS/PERC/Antenna/DFM on base/metal layers and give recommendation for P& R tool flow Good knowledge of advanced technology nodes like Samsung foundry (4nm/3nm) is extremely useful Show more Show less

Experience: 3 - 6 Years Notice period: Immediate Location: Bangalore & Hyderabad Responsibilities Mandatory Experience in Full Chip Timing . Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization. Tools Expertise : Proficient in Innovus , ICC2 , and Fusion Compiler for place and route, timing closure, and physical design sign-off. Physical Design : Experience in floorplanning, placement, routing, clock tree synthesis (CTS), and static timing analysis (STA). Optimization : Focus on power , performance , and area (PPA) optimization. Sign-off : Conduct DRC , LVS , and parasitic extraction for clean designs. Advanced Process Nodes : Experience with 7nm , 5nm , or lower process nodes. Cross-functional Collaboration : Work closely with design, verification, and manufacturing teams. Tape-out : Drive tape-out process and ensure high-quality designs. Qualifications : Bachelor’s or Master’s degree in Electrical Engineering, with 4+ years of experience. Preferred : Experience with DFM , DFT , and advanced packaging technologies. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Non-Volatile Engineering (NVE) Product Engineer working in the Mask Design & Tapeout Solutions team at Micron Technology, Inc., you are part of a team committed to quality, efficient NAND Memory Design through Custom Layout Design and Tapeout Management. Layout & Mask Designer In our team, we support New Design Development and own the Design Revisions through the Product Lifecycle. As an expert Mask Design Engineer, you will apply DFM, Process Input and Fab Feedback while engaging in multi-functional teams. You will be committed to driving yield improvements, building new processes and tools and mitigating reliability fails through innovative Layout Design techniques. As an owner of the Design Library, you will build, verify and manage all Design Revisions. You will also mentor and train new Engineers and assist partner teams with Design Debug. Tapeout Solutions Our team also owns and supports the Tapeout Process of all Production Reticles for NAND Memory Designs. As such, you will craft and maintain Design Edit Documentation, contribute to Design Reviews and own Reticle Compatibility definitions for Fabs. In this role, you will work with various Engineering and Manufacturing groups to prioritize projects and coordinate resources to ensure critical schedules are met. Responsibilities Include Layout Mask Design Design, Implement and Drive Layout edits needed for development, yield improvement, quality and process enablement. Run (DFM) Flows and collaborate with Design & Technology Development and to craft and implement solutions. Design Library Management & Tapeout Build, Validate and Handle New Design Libraries and Final archives. Accountable for Final EDA checks (LVS, DRC, LVL) Generate Final Data and manage post-processing tapeout flows and Validate final mask data Lead Tapeout order paperwork and Coordinate with Partner Teams to ensure alignment of needs, expectations, priorities and resources to hit schedules. Who We Are We strive for a team culture where you are empowered to develop your skills and have a meaningful impact! We believe in enabling opportunity for you to explore interests that contribute to the team and your career. We prioritize having fun and care about and support each other! Who You Are You believe in driving continuous improvement. You are an Engineer who is passionate about learning new things as well as creating and innovating. You are tenacious and motivated by new challenges. You enjoy mentoring and training others. Your Skills: 6-8+ Years Experience in Layout Design / Design Library Management & Tapeout Solutions Self-motivated and driven with a Growth Mindset Excellent problem solving and analytical skills Strong multitasking, organizational and project management skills Knowledge of Semiconductor Processing including Photolithography Strong understanding of Semiconductor Physics and VLSI techniques Strong Communication skills in written and spoken English Exposure to EDA Tools About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Physical Design Engineer - Senior / Lead Job Description: Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization. Tools Expertise : Proficient in Innovus , ICC2 , and Fusion Compiler for place and route, timing closure, and physical design sign-off. Physical Design : Experience in floorplanning, placement, routing, clock tree synthesis (CTS), and static timing analysis (STA). Optimization : Focus on power , performance , and area (PPA) optimization. Sign-off : Conduct DRC , LVS , and parasitic extraction for clean designs. Advanced Process Nodes : Experience with 7nm , 5nm , or lower process nodes. Cross-functional Collaboration : Work closely with design, verification, and manufacturing teams. Tape-out : Drive tape-out process and ensure high-quality designs. Qualifications : Bachelor’s or Master’s degree in Electrical Engineering, with 4+ years of experience. Preferred : Experience with DFM , DFT , and advanced packaging technologies. Additional Skills : Proficiency in scripting languages like TCL , Perl , or Python for automating design tasks. Excellent problem-solving skills and attention to detail. Strong communication skills and the ability to collaborate effectively in a team environment. Experience: 4 to 8 years Location: Bangalore / Hyderabad Job Title : Physical Design Engineers Mandatory skills : Fusion compiler and PNR Notice Period : 0-30 days Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Non-Volatile Engineering (NVE) Product Engineer working in the Mask Design Development team at Micron Technology, Inc., You will play a critical role in driving Design for Manufacturability (DFM) business process for new designs, ensuring high-quality mask designs are delivered earlier in the development timeline. You will work closely with cross-functional teams to develop and implement new DFM capabilities, enhancing design methodologies and tools for improved manufacturability and performance of the NAND products. Key Responsibilities Collaborate with cross-functional teams to integrate DFM best practices into the design process. Develop and enhance DFM capabilities, tools, and methodologies to improve mask design quality and efficiency. Engage with the NAND Design team to provide feedback on lessons learned and best-known methods (BKMs) from DFM and high-volume manufacturing experience. Ensure Si learning is incorporated into continuous improvement efforts for design methods and tools. Work closely with the Technology Development (TD) team to support test chips and early-stage development, including collaboration with CMOS and ESD teams. Own test chip activities, including meeting organization, reticle coordination, and layout design coordination. Build Relationships across the organization through participation in innovation forums and activities, identifying technical opportunities for improvement. Collaborate with Quality teams to engage in reliability of Reliability Sensitive Circuitry (RSC) and Design Failure Modes and Effect Analysis (DFMEA) related activities. Act as a Quality representative, driving corrective 8D, and preventive actions to enhance mask design robustness and reliability. Who We Are We strive for a team culture where you are empowered to develop your skills and have a meaningful impact! We believe in enabling opportunity for you to explore interests that contribute to the team and your career. We prioritize having fun and care about and support each other! Who You Are You believe in driving continuous improvement. You are an Engineer who is passionate about learning new things as well as creating and innovating. You are tenacious and motivated by new challenges. You enjoy mentoring and training others. Qualification & Skills Bachelor's or master’s degree in Electronics Engineering, Microelectronics, Semiconductor Physics, or a related field. 6 - 8 + Years of experience in mask design, DFM methodologies, semiconductor design and manufacturing. Strong understanding of semiconductor fabrication processes and lithography techniques. Familiarity with EDA tools for mask design (Cadence) and Verification (Calibre – DRC, LVS, Net Extraction…). Excellent problem-solving skills and ability to work in a fast-paced, collaborative environment. Effective communication skills to engage with cross-functional teams and drive improvement. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Analog Design Engineer Skills & Experience Required: 5+ years of relevant experience. Has relevant knowledge and hands on experience of SerDes design at high data rates, up to 20Gbps. Study the assigned block, analyze the circuit carefully, and work on the hand analysis. Understand the required performance, the targeted specs and trade-off between different performance metrices. Write behavioral model of the circuit blocks for system-level simulations. Simulate and verifying designed schematics using Synopsys tools using circuit simulators. Debug to find out the root cause for any performance degradation. Being capable of solving all the faced issues. Working with layout team on layout optimization. Evaluate post layout performance using extraction tools (ICV and Calibre). Understand the interface with other blocks (if any) and work with other team members to optimize the interface. Coordinate and handling top-level simulations. Develop and executing characterization plans of the designed blocks, systems, and chips. Check the design reliability (EM/IR/Aging) using available tools. Do timing models using custom static timing analysis tools. Deliver the corresponding documentation as per the design process. Excellent knowledge of design/simulation tools such as Synopsys, Cadence and/or Mentor tools or any relevant tool. Good knowledge of any EM simulation tool. Good knowledge in behavioral modeling (Verilog, Verilog AMS). Very Good knowledge of custom timing static analysis tool (Synopsys NanoTime and SiliconSmart). Job Location IndiaBangalore IndiaChennai IndiaHyderabad IndiaKolkata IndiaNoida S. KoreaSeoul Location - Bengaluru,Chennai,Kolkata,Noida

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: Analog Layout. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. ? Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from design, selection of materials, low level system software development and verification. Needs by displaying complete understanding of product vision and business requirements Develop architectural designs for the new and existing products Part Implementation of derived solution Debug and Solve critical problems during implementation Evangelize Architecture to the Project and Customer teams to achieve the final solution. Constant analysis and monitoring of the product solution Continuously improve and simplify the design, optimize cost and performance Understand market- driven business needs and objectives; technology trends and requirements to define architecture requirements and strategy Create a product-wide architectural design that ensures systems are scalable, reliable, and compatible with different deployment options Develop theme-based Proof of Concepts (POCs) in order to demonstrate the feasibility of the product idea and realise it as a viable one Analyse, propose and implement the core technology strategy for product development Conduct impact analyses of changes and new requirements on the product development effort ? Provide solutioning of RFPs received from clients and ensure overall product design assurance as per business needs Collaborate with sales, development, consulting teams to reconcile solutions to architecture Analyse technology environment, enterprise specifics, client requirements to set a product solution design framework/ architecture Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology Define and understand current state product features and identify improvements, options & tradeoffs to define target state solutions Clearly articulate, document and sell architectural targets, recommendations and reusable patterns and accordingly propose investment roadmaps Validate the solution/ prototype from technology, cost structure and customer differentiation point of view Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem Tracks industry and application trends and relates these to planning current and future IT needs Provides technical and strategic input during the product deployment and deployment Support Delivery team during the product deployment process and resolve complex issues Collaborate with delivery team to develop a product validation and performance testing plan as per the business requirements and specifications. Identifies implementation risks and potential impacts. Maintain product roadmap and provide timely inputs for product upgrades as per the market needs Competency Building and Branding Ensure completion of necessary trainings and certifications Develop Proof of Concepts (POCs), case studies, demos etc. for new growth areas based on market and customer research Develop and present a point of view of Wipro on product design and architect by writing white papers, blogs etc. Attain market referencsability and recognition through highest analyst rankings, client testimonials and partner credits Be the voice of Wipro??s Thought Leadership by speaking in forums (internal and external) Mentor developers, designers and Junior architects for their further career development and enhancement Contribute to the architecture practice by conducting selection interviews etc ? Deliver No.Performance ParameterMeasure1.Product design, engineering and implementationCSAT, quality of design/ architecture, FTR, delivery as per cost, quality and timeline, POC review and standards2.Capability development% trainings and certifications completed, mentor technical teams, Thought leadership content developed (white papers, Wipro PoVs) ? Mandatory Skills: Analog Layout. Experience>10 YEARS. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. ? Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from design, selection of materials, low level system software development and verification. Needs by displaying complete understanding of product vision and business requirements Develop architectural designs for the new and existing products Part Implementation of derived solution Debug and Solve critical problems during implementation Evangelize Architecture to the Project and Customer teams to achieve the final solution. Constant analysis and monitoring of the product solution Continuously improve and simplify the design, optimize cost and performance Understand market- driven business needs and objectives; technology trends and requirements to define architecture requirements and strategy Create a product-wide architectural design that ensures systems are scalable, reliable, and compatible with different deployment options Develop theme-based Proof of Concepts (POCs) in order to demonstrate the feasibility of the product idea and realise it as a viable one Analyse, propose and implement the core technology strategy for product development Conduct impact analyses of changes and new requirements on the product development effort ? Provide solutioning of RFPs received from clients and ensure overall product design assurance as per business needs Collaborate with sales, development, consulting teams to reconcile solutions to architecture Analyse technology environment, enterprise specifics, client requirements to set a product solution design framework/ architecture Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology Define and understand current state product features and identify improvements, options & tradeoffs to define target state solutions Clearly articulate, document and sell architectural targets, recommendations and reusable patterns and accordingly propose investment roadmaps Validate the solution/ prototype from technology, cost structure and customer differentiation point of view Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem Tracks industry and application trends and relates these to planning current and future IT needs Provides technical and strategic input during the product deployment and deployment Support Delivery team during the product deployment process and resolve complex issues Collaborate with delivery team to develop a product validation and performance testing plan as per the business requirements and specifications. Identifies implementation risks and potential impacts. Maintain product roadmap and provide timely inputs for product upgrades as per the market needs Competency Building and Branding Ensure completion of necessary trainings and certifications Develop Proof of Concepts (POCs), case studies, demos etc. for new growth areas based on market and customer research Develop and present a point of view of Wipro on product design and architect by writing white papers, blogs etc. Attain market referencsability and recognition through highest analyst rankings, client testimonials and partner credits Be the voice of Wipro??s Thought Leadership by speaking in forums (internal and external) Mentor developers, designers and Junior architects for their further career development and enhancement Contribute to the architecture practice by conducting selection interviews etc ? Deliver No.Performance ParameterMeasure1.Product design, engineering and implementationCSAT, quality of design/ architecture, FTR, delivery as per cost, quality and timeline, POC review and standards2.Capability development% trainings and certifications completed, mentor technical teams, Thought leadership content developed (white papers, Wipro PoVs) ? Mandatory Skills: Analog Layout. Experience8-10 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Experience in Mixed-Signal layout design, holding bachelors degree in electrical/Electronic Engineering. To work independently on block levels analog layout design from schematic, estimating the Area, Optimizing Floorplan, Routing and Verifications. Firsthand experience in Critical Analog Layout design of blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc., Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is a must. Understanding layout effects on the circuit such as speed, capacitance, power and area etc., Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically, and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Primary Skills Analog Layout Process or technology experienceTSMC 7nm, 5nm, 10nm,28nm , 45nm,40nm EDA Tools Layout EditorCadence Virtuoso L, XL Physical verification DRC, LVS, Calibre Secondary Skills IO layout

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. We are looking for Field Application Engineer for our custom IC Verification suite of products which are deployed across more than 400+ customers worldwide and growing exponentially. In this role, you will be an Applications Engineer who will play a critical role in our Customer Success Organization enabling the success of our customers in designing advanced chips on leading-edge process technologies. You will provide technical and engineering insight and direction to improving usability, applicability, and adoption of Solido Products involving statistical analysis, Monte Carlo, cell optimization and design sensitivity for Custom analog or foundation IPs. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest designs that customers are working on, and have the ability to influence at all levels, both internally and externally. Description Use in-depth product knowledge to provide technical expertise and support for our top customers. Diagnose, troubleshoot, and resolve complex technical issues on customer designs. Work directly with Research and Development (R&D) to develop and implement our technical roadmap, specifications, and validation for improvements and enhancements Partner with customers and Sales to identify business challenges, develop effective technical solutions, and increase utilization and retention of products on current accounts Drive business for Siemens, using technical expertise and working directly with customers at the appropriate management level to establish criteria for successful engagements Behavioural Skills Required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what"™s possible to get the job done, including creative use of unconventional solutions Key Qualifications/Experience BE/ME EE, CS, CE or related discipline and 5-6+ years of experience Experience in circuit design and debugging skills is a big plus Good understanding of Statistical fundamentals and Monte Carlo Experience of working with Virtuoso/ADE is must Understanding of yield importance for standard cell/IO/memory and custom analog designs Experience with industry standard tools like Solido Variation aware, High Sigma monte carlo, Spectre fmc is added advantage Working knowledge of any of Spice simulators like AFS, Eldo, Finesim, Prime Sim, Hspice and Spectre is mandatory Working knowledge of scripting languages like Unix Shell, python is plus #DISW #LI-EDA #LI-Hybrid We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrow"™s reality. Find out more about the Digital world of Siemens here: www.siemens.com/careers/digitalminds We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Siemens Software. Where today meets tomorrow