296 Lvs Jobs - Page 12

Exp level: 2 to 5 years Location: Bangalore Notice Period: Immediate joiners are preffered. Responsibilites: Design and implement analog layouts for high-performance circuits (e.g., amplifiers, ADCs, DACs, voltage regulators) using TSMC 3nm and 5nm nodes. Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) to ensure design compliance. Required Skills: Strong experience in analog layout design at advanced nodes (TSMC 3nm and 5nm). Proficiency in layout tools like Cadence Virtuoso, Synopsys IC Compiler, or similar. Understanding of layout-dependent effects (LDE) and its impact on performance. Knowledge of parasitic extraction, simulation, and optimization. Familiarity with design for manufacturability (DFM) techniques. Please email Resumes to raksha.k@acldigital.com Show more Show less

Experience of 5+ years in Physical verification and closure. Location: Bangalore NP - Immediate Main responsibility of the candidate will be around achieving a clean GDS view with below key items: Physical Verification closure for Arm CPU implementation: Should have completed multiple tape-outs with Physical Verification closure role in the past Strong understanding of DRC/LVS/PERC/Antenna/DFM and associated concepts for advanced nodes on TSMC and Samsung foundries Needs to run Physical Verification on Arm CPU designs on advanced technology nodes Needs to run fixing for DRC/LVS/PERC/Antenna/DFM on base/metal layers and give recommendation for P& R tool flow Good knowledge of advanced technology nodes like Samsung foundry (4nm/3nm) is extremely useful Show more Show less

Experience: 3 - 6 Years Notice period: Immediate Location: Bangalore & Hyderabad Responsibilities Mandatory Experience in Full Chip Timing . Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization. Tools Expertise : Proficient in Innovus , ICC2 , and Fusion Compiler for place and route, timing closure, and physical design sign-off. Physical Design : Experience in floorplanning, placement, routing, clock tree synthesis (CTS), and static timing analysis (STA). Optimization : Focus on power , performance , and area (PPA) optimization. Sign-off : Conduct DRC , LVS , and parasitic extraction for clean designs. Advanced Process Nodes : Experience with 7nm , 5nm , or lower process nodes. Cross-functional Collaboration : Work closely with design, verification, and manufacturing teams. Tape-out : Drive tape-out process and ensure high-quality designs. Qualifications : Bachelor’s or Master’s degree in Electrical Engineering, with 4+ years of experience. Preferred : Experience with DFM , DFT , and advanced packaging technologies. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Non-Volatile Engineering (NVE) Product Engineer working in the Mask Design & Tapeout Solutions team at Micron Technology, Inc., you are part of a team committed to quality, efficient NAND Memory Design through Custom Layout Design and Tapeout Management. Layout & Mask Designer In our team, we support New Design Development and own the Design Revisions through the Product Lifecycle. As an expert Mask Design Engineer, you will apply DFM, Process Input and Fab Feedback while engaging in multi-functional teams. You will be committed to driving yield improvements, building new processes and tools and mitigating reliability fails through innovative Layout Design techniques. As an owner of the Design Library, you will build, verify and manage all Design Revisions. You will also mentor and train new Engineers and assist partner teams with Design Debug. Tapeout Solutions Our team also owns and supports the Tapeout Process of all Production Reticles for NAND Memory Designs. As such, you will craft and maintain Design Edit Documentation, contribute to Design Reviews and own Reticle Compatibility definitions for Fabs. In this role, you will work with various Engineering and Manufacturing groups to prioritize projects and coordinate resources to ensure critical schedules are met. Responsibilities Include Layout Mask Design Design, Implement and Drive Layout edits needed for development, yield improvement, quality and process enablement. Run (DFM) Flows and collaborate with Design & Technology Development and to craft and implement solutions. Design Library Management & Tapeout Build, Validate and Handle New Design Libraries and Final archives. Accountable for Final EDA checks (LVS, DRC, LVL) Generate Final Data and manage post-processing tapeout flows and Validate final mask data Lead Tapeout order paperwork and Coordinate with Partner Teams to ensure alignment of needs, expectations, priorities and resources to hit schedules. Who We Are We strive for a team culture where you are empowered to develop your skills and have a meaningful impact! We believe in enabling opportunity for you to explore interests that contribute to the team and your career. We prioritize having fun and care about and support each other! Who You Are You believe in driving continuous improvement. You are an Engineer who is passionate about learning new things as well as creating and innovating. You are tenacious and motivated by new challenges. You enjoy mentoring and training others. Your Skills: 6-8+ Years Experience in Layout Design / Design Library Management & Tapeout Solutions Self-motivated and driven with a Growth Mindset Excellent problem solving and analytical skills Strong multitasking, organizational and project management skills Knowledge of Semiconductor Processing including Photolithography Strong understanding of Semiconductor Physics and VLSI techniques Strong Communication skills in written and spoken English Exposure to EDA Tools About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Physical Design Engineer - Senior / Lead Job Description: Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization. Tools Expertise : Proficient in Innovus , ICC2 , and Fusion Compiler for place and route, timing closure, and physical design sign-off. Physical Design : Experience in floorplanning, placement, routing, clock tree synthesis (CTS), and static timing analysis (STA). Optimization : Focus on power , performance , and area (PPA) optimization. Sign-off : Conduct DRC , LVS , and parasitic extraction for clean designs. Advanced Process Nodes : Experience with 7nm , 5nm , or lower process nodes. Cross-functional Collaboration : Work closely with design, verification, and manufacturing teams. Tape-out : Drive tape-out process and ensure high-quality designs. Qualifications : Bachelor’s or Master’s degree in Electrical Engineering, with 4+ years of experience. Preferred : Experience with DFM , DFT , and advanced packaging technologies. Additional Skills : Proficiency in scripting languages like TCL , Perl , or Python for automating design tasks. Excellent problem-solving skills and attention to detail. Strong communication skills and the ability to collaborate effectively in a team environment. Experience: 4 to 8 years Location: Bangalore / Hyderabad Job Title : Physical Design Engineers Mandatory skills : Fusion compiler and PNR Notice Period : 0-30 days Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Non-Volatile Engineering (NVE) Product Engineer working in the Mask Design Development team at Micron Technology, Inc., You will play a critical role in driving Design for Manufacturability (DFM) business process for new designs, ensuring high-quality mask designs are delivered earlier in the development timeline. You will work closely with cross-functional teams to develop and implement new DFM capabilities, enhancing design methodologies and tools for improved manufacturability and performance of the NAND products. Key Responsibilities Collaborate with cross-functional teams to integrate DFM best practices into the design process. Develop and enhance DFM capabilities, tools, and methodologies to improve mask design quality and efficiency. Engage with the NAND Design team to provide feedback on lessons learned and best-known methods (BKMs) from DFM and high-volume manufacturing experience. Ensure Si learning is incorporated into continuous improvement efforts for design methods and tools. Work closely with the Technology Development (TD) team to support test chips and early-stage development, including collaboration with CMOS and ESD teams. Own test chip activities, including meeting organization, reticle coordination, and layout design coordination. Build Relationships across the organization through participation in innovation forums and activities, identifying technical opportunities for improvement. Collaborate with Quality teams to engage in reliability of Reliability Sensitive Circuitry (RSC) and Design Failure Modes and Effect Analysis (DFMEA) related activities. Act as a Quality representative, driving corrective 8D, and preventive actions to enhance mask design robustness and reliability. Who We Are We strive for a team culture where you are empowered to develop your skills and have a meaningful impact! We believe in enabling opportunity for you to explore interests that contribute to the team and your career. We prioritize having fun and care about and support each other! Who You Are You believe in driving continuous improvement. You are an Engineer who is passionate about learning new things as well as creating and innovating. You are tenacious and motivated by new challenges. You enjoy mentoring and training others. Qualification & Skills Bachelor's or master’s degree in Electronics Engineering, Microelectronics, Semiconductor Physics, or a related field. 6 - 8 + Years of experience in mask design, DFM methodologies, semiconductor design and manufacturing. Strong understanding of semiconductor fabrication processes and lithography techniques. Familiarity with EDA tools for mask design (Cadence) and Verification (Calibre – DRC, LVS, Net Extraction…). Excellent problem-solving skills and ability to work in a fast-paced, collaborative environment. Effective communication skills to engage with cross-functional teams and drive improvement. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Analog Design Engineer Skills & Experience Required: 5+ years of relevant experience. Has relevant knowledge and hands on experience of SerDes design at high data rates, up to 20Gbps. Study the assigned block, analyze the circuit carefully, and work on the hand analysis. Understand the required performance, the targeted specs and trade-off between different performance metrices. Write behavioral model of the circuit blocks for system-level simulations. Simulate and verifying designed schematics using Synopsys tools using circuit simulators. Debug to find out the root cause for any performance degradation. Being capable of solving all the faced issues. Working with layout team on layout optimization. Evaluate post layout performance using extraction tools (ICV and Calibre). Understand the interface with other blocks (if any) and work with other team members to optimize the interface. Coordinate and handling top-level simulations. Develop and executing characterization plans of the designed blocks, systems, and chips. Check the design reliability (EM/IR/Aging) using available tools. Do timing models using custom static timing analysis tools. Deliver the corresponding documentation as per the design process. Excellent knowledge of design/simulation tools such as Synopsys, Cadence and/or Mentor tools or any relevant tool. Good knowledge of any EM simulation tool. Good knowledge in behavioral modeling (Verilog, Verilog AMS). Very Good knowledge of custom timing static analysis tool (Synopsys NanoTime and SiliconSmart). Job Location IndiaBangalore IndiaChennai IndiaHyderabad IndiaKolkata IndiaNoida S. KoreaSeoul Location - Bengaluru,Chennai,Kolkata,Noida

Job Description In This Role, Your Responsibilities Will Be: Designing system architecture, including I/O to controller assignment. Defining software concepts, configuration guidelines, and testing procedures. Implementing and testing third-party interfaces and creating and developing third-party interface protocols (e.g., Modbus, Profibus, OPC) and database / module Developing software libraries, encompassing both logic and graphics. Crafting project-specific software solutions and reusable software modules. Conducting typical software tests to ensure quality standards. Designing and developing I/O and core control modules. Implementing customized, sophisticated logic solutions. Designing user interface graphics for system monitoring. Creating internal test plans and conducting internal testing. Developing Software Factory Acceptance Test (FAT) plans and leading FAT sessions with customers and handling the associated reporting. Designing hardware-software (HW-SW) integration plans and performing coordinated testing. Identifying project risks and issues, raising to the Lead Engineer/Project Manager with proposed mitigation plans. Assisting the Senior Engineer in handling medium-to-large project execution as Area/Sub-Lead. Leading and mentoring small teams, setting clear goals and targets for team members. Mentoring and training junior engineers to help improve their skills and knowledge. Crafting and maintaining "As Built" documentation. Developing Site Acceptance Test (SAT) and conducting SAT at customer locations. Providing loop checks, startup, and commissioning support. Fixing and implementing bus interfaces (Profibus/Fieldbus). Taking full ownership of work you're doing and efficiently leading subordinates and mentoring system engineers to develop their technical development. Preparing commissioning progress reports and providing timely updates to management and customers. Supervising system handover to the customer and service teams. Resolving punch points during site commissioning. Expertise Requirements: Extensive commissioning experience, handling up to 5000 I/Os for Engineers, 10,000 I/Os for Senior Engineers, and over 10,000 I/Os for Lead Engineers. Proficient in commissioning third-party devices, including large video screens (LVS), Zone 1 HMIs, CCTV systems, Fire & Gas (F&G) systems, and Emergency Shutdown (ESD) systems. Quality Control & Assurance Implementation of EEEC IMS processes and documentation as needed throughout the project. Adheres to WA quality standards and customer regulatory guidelines. Promotes and practices a "First Time Right" approach. Ensures compliance with Good Documentation Practices (GDP) in all technical activities. Other Duties Perform other additional specific duties, when requested by the business. These will, typically, be strategic in nature but could potentially be anything that the post holder is suitably qualified and experienced to undertake. These duties may be assigned to the person under guidance of a supervisor. Who You Are: You actively promote the visibility of shared contributions toward achieving goals and build a positive collaboration with customers. In dynamic and unexpected situations, you take swift and critical action. You proactively seek mentorship from relevant sources to ensure timely and informed decision-making. You adopt the risks associated with progressing forward, even when the outcome is uncertain. You ask the right questions to accurately analyze situations. For This Role, You Will Need: 4-8 years of shown experience in process control and automation, with a strong background in DCS design and commissioning within the automation industry. Experience in DCS design and engineering projects is preferred, particularly within sectors such as Oil & Gas, Refineries, Pharmaceuticals, Chemicals, and Petrochemicals. Preferred Qualifications that Set You Apart: Bachelor's degree or equivalent experience in Instrumentation, Electronics, Electronics & Telecommunication. Proficient in Microsoft Office Suites Being open to domestic and international travel for assignments. Our Culture & Commitment to You At Emerson, we prioritize a workplace where every employee is valued, respected, and empowered to grow. We foster an environment that encourages innovation, collaboration, and diverse perspectives—because we know that great ideas come from great teams. Our commitment to ongoing career development and growing an inclusive culture ensures you have the support to thrive. Whether through mentorship, training, or leadership opportunities, we invest in your success so you can make a lasting impact. We believe diverse teams, working together are key to driving growth and delivering business results. We recognize the importance of employee wellbeing. We prioritize providing competitive benefits plans, a variety of medical insurance plans, Employee Assistance Program, employee resource groups, recognition, and much more. Our culture offers flexible time off plans, including paid parental leave (maternal and paternal), vacation and holiday leave. Show more Show less

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: Analog Layout. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. ? Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from design, selection of materials, low level system software development and verification. Needs by displaying complete understanding of product vision and business requirements Develop architectural designs for the new and existing products Part Implementation of derived solution Debug and Solve critical problems during implementation Evangelize Architecture to the Project and Customer teams to achieve the final solution. Constant analysis and monitoring of the product solution Continuously improve and simplify the design, optimize cost and performance Understand market- driven business needs and objectives; technology trends and requirements to define architecture requirements and strategy Create a product-wide architectural design that ensures systems are scalable, reliable, and compatible with different deployment options Develop theme-based Proof of Concepts (POCs) in order to demonstrate the feasibility of the product idea and realise it as a viable one Analyse, propose and implement the core technology strategy for product development Conduct impact analyses of changes and new requirements on the product development effort ? Provide solutioning of RFPs received from clients and ensure overall product design assurance as per business needs Collaborate with sales, development, consulting teams to reconcile solutions to architecture Analyse technology environment, enterprise specifics, client requirements to set a product solution design framework/ architecture Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology Define and understand current state product features and identify improvements, options & tradeoffs to define target state solutions Clearly articulate, document and sell architectural targets, recommendations and reusable patterns and accordingly propose investment roadmaps Validate the solution/ prototype from technology, cost structure and customer differentiation point of view Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem Tracks industry and application trends and relates these to planning current and future IT needs Provides technical and strategic input during the product deployment and deployment Support Delivery team during the product deployment process and resolve complex issues Collaborate with delivery team to develop a product validation and performance testing plan as per the business requirements and specifications. Identifies implementation risks and potential impacts. Maintain product roadmap and provide timely inputs for product upgrades as per the market needs Competency Building and Branding Ensure completion of necessary trainings and certifications Develop Proof of Concepts (POCs), case studies, demos etc. for new growth areas based on market and customer research Develop and present a point of view of Wipro on product design and architect by writing white papers, blogs etc. Attain market referencsability and recognition through highest analyst rankings, client testimonials and partner credits Be the voice of Wipro??s Thought Leadership by speaking in forums (internal and external) Mentor developers, designers and Junior architects for their further career development and enhancement Contribute to the architecture practice by conducting selection interviews etc ? Deliver No.Performance ParameterMeasure1.Product design, engineering and implementationCSAT, quality of design/ architecture, FTR, delivery as per cost, quality and timeline, POC review and standards2.Capability development% trainings and certifications completed, mentor technical teams, Thought leadership content developed (white papers, Wipro PoVs) ? Mandatory Skills: Analog Layout. Experience>10 YEARS. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. ? Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from design, selection of materials, low level system software development and verification. Needs by displaying complete understanding of product vision and business requirements Develop architectural designs for the new and existing products Part Implementation of derived solution Debug and Solve critical problems during implementation Evangelize Architecture to the Project and Customer teams to achieve the final solution. Constant analysis and monitoring of the product solution Continuously improve and simplify the design, optimize cost and performance Understand market- driven business needs and objectives; technology trends and requirements to define architecture requirements and strategy Create a product-wide architectural design that ensures systems are scalable, reliable, and compatible with different deployment options Develop theme-based Proof of Concepts (POCs) in order to demonstrate the feasibility of the product idea and realise it as a viable one Analyse, propose and implement the core technology strategy for product development Conduct impact analyses of changes and new requirements on the product development effort ? Provide solutioning of RFPs received from clients and ensure overall product design assurance as per business needs Collaborate with sales, development, consulting teams to reconcile solutions to architecture Analyse technology environment, enterprise specifics, client requirements to set a product solution design framework/ architecture Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology Define and understand current state product features and identify improvements, options & tradeoffs to define target state solutions Clearly articulate, document and sell architectural targets, recommendations and reusable patterns and accordingly propose investment roadmaps Validate the solution/ prototype from technology, cost structure and customer differentiation point of view Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem Tracks industry and application trends and relates these to planning current and future IT needs Provides technical and strategic input during the product deployment and deployment Support Delivery team during the product deployment process and resolve complex issues Collaborate with delivery team to develop a product validation and performance testing plan as per the business requirements and specifications. Identifies implementation risks and potential impacts. Maintain product roadmap and provide timely inputs for product upgrades as per the market needs Competency Building and Branding Ensure completion of necessary trainings and certifications Develop Proof of Concepts (POCs), case studies, demos etc. for new growth areas based on market and customer research Develop and present a point of view of Wipro on product design and architect by writing white papers, blogs etc. Attain market referencsability and recognition through highest analyst rankings, client testimonials and partner credits Be the voice of Wipro??s Thought Leadership by speaking in forums (internal and external) Mentor developers, designers and Junior architects for their further career development and enhancement Contribute to the architecture practice by conducting selection interviews etc ? Deliver No.Performance ParameterMeasure1.Product design, engineering and implementationCSAT, quality of design/ architecture, FTR, delivery as per cost, quality and timeline, POC review and standards2.Capability development% trainings and certifications completed, mentor technical teams, Thought leadership content developed (white papers, Wipro PoVs) ? Mandatory Skills: Analog Layout. Experience8-10 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Experience in Mixed-Signal layout design, holding bachelors degree in electrical/Electronic Engineering. To work independently on block levels analog layout design from schematic, estimating the Area, Optimizing Floorplan, Routing and Verifications. Firsthand experience in Critical Analog Layout design of blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc., Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is a must. Understanding layout effects on the circuit such as speed, capacitance, power and area etc., Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically, and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Primary Skills Analog Layout Process or technology experienceTSMC 7nm, 5nm, 10nm,28nm , 45nm,40nm EDA Tools Layout EditorCadence Virtuoso L, XL Physical verification DRC, LVS, Calibre Secondary Skills IO layout

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. We are looking for Field Application Engineer for our custom IC Verification suite of products which are deployed across more than 400+ customers worldwide and growing exponentially. In this role, you will be an Applications Engineer who will play a critical role in our Customer Success Organization enabling the success of our customers in designing advanced chips on leading-edge process technologies. You will provide technical and engineering insight and direction to improving usability, applicability, and adoption of Solido Products involving statistical analysis, Monte Carlo, cell optimization and design sensitivity for Custom analog or foundation IPs. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest designs that customers are working on, and have the ability to influence at all levels, both internally and externally. Description Use in-depth product knowledge to provide technical expertise and support for our top customers. Diagnose, troubleshoot, and resolve complex technical issues on customer designs. Work directly with Research and Development (R&D) to develop and implement our technical roadmap, specifications, and validation for improvements and enhancements Partner with customers and Sales to identify business challenges, develop effective technical solutions, and increase utilization and retention of products on current accounts Drive business for Siemens, using technical expertise and working directly with customers at the appropriate management level to establish criteria for successful engagements Behavioural Skills Required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what"™s possible to get the job done, including creative use of unconventional solutions Key Qualifications/Experience BE/ME EE, CS, CE or related discipline and 5-6+ years of experience Experience in circuit design and debugging skills is a big plus Good understanding of Statistical fundamentals and Monte Carlo Experience of working with Virtuoso/ADE is must Understanding of yield importance for standard cell/IO/memory and custom analog designs Experience with industry standard tools like Solido Variation aware, High Sigma monte carlo, Spectre fmc is added advantage Working knowledge of any of Spice simulators like AFS, Eldo, Finesim, Prime Sim, Hspice and Spectre is mandatory Working knowledge of scripting languages like Unix Shell, python is plus #DISW #LI-EDA #LI-Hybrid We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrow"™s reality. Find out more about the Digital world of Siemens here: www.siemens.com/careers/digitalminds We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Siemens Software. Where today meets tomorrow

locationsIndia, Bangaloreposted onPosted Today job requisition idJR0275251 Job Details: About The Role : Intel is at the forefront of the wireless communication industry, offering cutting-edge products that set the standard for performance and innovation. We are seeking a highly skilled SerDes PHY System Engineer to join our team. In this pivotal role, you will be responsible for the design and development of physical layer components for high-speed SerDes systems, ensuring their performance and reliability. Key Responsibilities: SerDes PHY DesignLead the design and development of the physical layer for SerDes systems, including transmitter and receiver architectures, equalization techniques, and signal integrity. Simulation and ValidationConduct comprehensive simulations using MATLAB and Python, along with lab testing, to validate the performance and compliance of the SerDes PHY, optimizing it for high-speed data transmission. Calibration TechniquesDevelop and implement calibration methods to enhance the performance of the SerDes PHY, ensuring high-quality data transmission. CollaborationWork closely with cross-functional teams, including digital design, hardware, and software, to ensure seamless integration of the PHY layer into the overall SerDes system. DocumentationMaintain detailed and up-to-date documentation of design specifications, test plans, and results. Problem-SolvingAddress and resolve complex technical issues related to the SerDes PHY, ensuring optimal performance. Quality AssuranceImplement quality control measures and best practices to ensure the reliability and robustness of the SerDes PHY. Qualifications: Bachelor's degree in Electrical Engineering; a Master's degree in a relevant field is preferred. Minimum of 5 years of experience in wired or wireless communication systems. Proven experience and enthusiasm for lab work, collaboration, and solution development. Prior experience in DDR/PCI/GDDR7/UCI will be added advantage. Proficiency in scripting and programming languages such as C, C#, MATLAB, and Python. Experience in silicon development and SerDes technologies is advantageous. Strong problem-solving abilities and analytical skills. Self-motivated and capable of executing tasks in uncertain environments. Demonstrated leadership skills and ability to drive initiatives in a matrix organization. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

www.Sevyamultimedia.com Layout Lead About Us We are a technology consulting company delivering best-in class Chip Design Services. Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow. With over 40+ tapeouts and expertise spanning the breadth of chip design, we offer a wide variety of Semiconductor skills Approach We support a mix of engagement models to support diverse client requirements. Engagement Models Turnkey (SoW) Engagement Staff Augmentation (T&M) Offshore Design Center Key Enablers Hands on Leadership Proven Industry Experts TSMC DCA Parternship Collaboration with Academia Message About the job Analog Layout Design Lead with 7+ years of relevant work experience You will be doing Analog Layout in advanced process technologies, serving global Semiconductor product MNC clients. What you get: Inducted in the advanced Analog VLSI projects Get an opportunity to work with clients that are world-class VLSI MNCs Skills: Hands-on knowhow in analog and mixed-signal layout techniques and experience with Cadence Layout tools (Virtuoso) and Mentor Graphics verification tools (Calibre) Experience in Custom Analog Layout (one or more) of I/O, Amplifiers/OPAMP circuits, ADCs/DACs, LDOs, Bandgaps & Bias Circuits, Temperature Sensor, Oscillators Physical Verification ( LVS, DRC, ERC, ANT with Calibre) Ability to recognize and correct problematic circuit and layout structures Knowledge of relevant device physics, matching techniques, ESD/Latchup mitigation techniques, circuit parasitic extraction & reduction, VXL compliance etc., is expected Ability to closely and independently work with Analog Designers to solve performance and area challenges Traits: Quick learner with excellent interpersonal, verbal/written communication, problem-solving, and decision-making skills Adaptable, Flexible, Global Approach/Synthesis, Creative Willing to work on customer site for deployment and support Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

www.Sevyamultimedia.com Layout Senior Manager/ Manager About Us We are a technology consulting company delivering best-in class Chip Design Services. Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow. With over 40+ tapeouts and expertise spanning the breadth of chip design, we offer a wide variety of Semiconductor skills Analog IP Design Foundation - OpAmp, Bandgap IOs - GPIO, I2C, LVDS Clocking - PLL Power - LDO PDK, Design Automation DRC/LVS/Extraction Rule deck Development PCell Development Automation Tools in Perl, Python, GoLang Approach We support a mix of engagement models to support diverse client requirements. Engagement Models Turnkey (SoW) Engagement Staff Augmentation (T&M) Offshore Design Center Key Enablers Hands on Leadership Proven Industry Experts TSMC DCA Parternship Collaboration with Academia Location: Hyderabad #### **Job Summary:** We are seeking an experienced and dynamic Layout Design Manager to lead our layout design team. The ideal candidate will have a strong background in analog-on-top chip layout for devices with high-speed IO and analog components, as well as experience in dealing with ESD/latch-up issues, bump matrix design, RDL routing, power distribution, and critical signal planning. This role requires excellent leadership skills, the ability to manage complex design projects, and a strong technical background in layout design. #### **Key Responsibilities:** - **Team Leadership:** - Lead, mentor, and manage a team of layout design engineers. - Foster a collaborative and innovative team environment. - Develop team skills through training and professional development initiatives. - **Project Management:** - Plan and estimate layout design tasks, resources, and schedules. - Track and report on project progress, ensuring timely delivery of milestones. - Coordinate with cross-functional teams, including design, verification, and packaging, to align layout design activities with project goals. - **Analog-on-Top Layout Design:** - Oversee the layout design of analog-on-top chips with high-speed IO and analog components. - Ensure designs meet performance, power, area, and manufacturability requirements. - Optimize layout for ESD and latch-up prevention, signal integrity, and noise immunity. - **Bump Matrix and RDL Routing:** - Manage the design of bump matrix and redistribution layer (RDL) routing for advanced packaging. - Ensure efficient power distribution and critical signal planning. - **ESD/Latch-Up and Power Distribution:** - Address and resolve ESD and latch-up issues in layout designs. - Design robust power distribution networks to ensure reliable chip operation. - **Critical Signal Planning:** - Plan and implement critical signal routing to minimize interference and maximize performance. - Optimize layout for signal integrity and timing closure. - **Hiring and Training:** - Participate in the hiring process to recruit top talent for the layout design team. - Provide training and mentorship to new hires and junior engineers. - **Continuous Improvement:** - Stay updated with the latest industry trends, tools, and methodologies in layout design. - Drive continuous improvement initiatives to enhance design processes and methodologies. - Implement best practices for layout design and contribute to the development of standards and processes. #### **Qualifications:** - **Education:** - Bachelors or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. - **Experience:** - 10-15 years of experience in layout design, with at least 3 years in a managerial or leadership role. - Proven experience in analog-on-top chip layout for high-speed IO and analog devices. - **Technical Skills:** - Extensive experience with ESD and latch-up prevention techniques. - Proficiency in bump matrix design and RDL routing. - Strong knowledge of power distribution networks and critical signal planning. - Familiarity with CAD tools (e.g., Cadence Virtuoso, Mentor Graphics) for layout design. - Experience with physical verification (DRC, LVS) and parasitic extraction. - **Soft Skills:** - Excellent leadership and team management abilities. - Strong problem-solving and analytical skills. - Effective communication and interpersonal skills. - Ability to work in a fast-paced, dynamic environment and manage multiple projects simultaneously. #### **Preferred Qualifications:** - Experience with advanced node technologies (e.g., FinFET, SOI). - Knowledge of reliability testing and failure analysis for analog and high-speed IO circuits. - Familiarity with scripting languages (e.g., Python, Perl) for automation. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

www.Sevyamultimedia.com Layout Lead About Us We are a technology consulting company delivering best-in class Chip Design Services. Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow. With over 40+ tapeouts and expertise spanning the breadth of chip design, we offer a wide variety of Semiconductor skills Approach We support a mix of engagement models to support diverse client requirements. Engagement Models Turnkey (SoW) Engagement Staff Augmentation (T&M) Offshore Design Center Key Enablers Hands on Leadership Proven Industry Experts TSMC DCA Parternship Collaboration with Academia Message About the job Analog Layout Design engineer with 3-7+ years of relevant work experience You will be doing Analog Layout in advanced process technologies, serving global Semiconductor product MNC clients. What you get: Inducted in the advanced Analog VLSI projects Get an opportunity to work with clients that are world-class VLSI MNCs Skills: Hands-on knowhow in analog and mixed-signal layout techniques and experience with Cadence Layout tools (Virtuoso) and Mentor Graphics verification tools (Calibre) Experience in Custom Analog Layout (one or more) of I/O, Amplifiers/OPAMP circuits, ADCs/DACs, LDOs, Bandgaps & Bias Circuits, Temperature Sensor, Oscillators Physical Verification ( LVS, DRC, ERC, ANT with Calibre) Ability to recognize and correct problematic circuit and layout structures Knowledge of relevant device physics, matching techniques, ESD/Latchup mitigation techniques, circuit parasitic extraction & reduction, VXL compliance etc., is expected Ability to closely and independently work with Analog Designers to solve performance and area challenges Traits: Quick learner with excellent interpersonal, verbal/written communication, problem-solving, and decision-making skills Adaptable, Flexible, Global Approach/Synthesis, Creative Willing to work on customer site for deployment and support Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills 3+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 12+ years Hardware Engineering experience or related work experience. 12+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Synopsys is seeking a creative, ambitious, and talented engineer to fill a full-time Analog CAD Support Engineer position in Noida/Bengaluru/Hyderabad/Pune. This role offers stimulating, challenging, and rewarding work within an excellent environment, providing positive career development opportunities. We are looking for someone who excels in teamwork, understands requirements, and thinks creatively to find solutions. While following established procedures is crucial, having a critical perspective and making informed decisions daily is equally important. The ideal candidate will be responsible and passionate about supporting R&D and improving the design process through automation to enhance quality and productivity. Responsibilities: Enable, support, and debug transistor-level flows and processes.Design, develop, troubleshoot, and debug software tools and flows for the development of integrated circuits.Support a global design team, debug CAD issues, interface with foundries, configure the CAD environment, and design flows.Develop routines and utility programs to aid in the design of integrated circuits.Build productive internal and external working relationships. Requirements: A relevant degree in electronic/microelectronic engineering.5+ years of relevant experience.Strong desire to learn and explore new technologies, demonstrating good analysis and problem-solving skills.Ability to exercise judgment within defined procedures and practices to determine appropriate action.Good knowledge of hardware integrated circuits.UNIX/Linux user knowledge.Proficiency with at least one programming language.Proficiency with scripting languages to automate processes.Good English communication skills.Capability to produce adequate technical documentation. Preferred Qualifications: Experience with the VLSI domain, including familiarity with DRC/LVS extraction, simulation, and EMIR.Experience with Cadence, Custom Designer EDA tools.Experience in data management and job scheduling tools like LSF/GRID Engine.Experience in Python, TCL, or Shell scripting.IC design experience (analog or digital). We design and verify advanced silicon chips for our customers. Our goal is to build faster chips, and we are the best in the world at doing so. We also create the processes and models necessary to manufacture these chips. By working with us, our customers can improve their chips in terms of power, cost, and performance, saving time by shortening their project schedules. At Synopsys, we are involved in groundbreaking technologies that shape the way we live and work, including self-driving cars, artificial intelligence, the cloud, 5G, and the Internet of Things. As a company, we lead the way in developing advanced chip design and software security technologies that power these innovations. If you are passionate about innovation like we are, we would love to meet you. We value inclusion and diversity. At Synopsys, we treat all job applicants equally, regardless of their race, color, religion, nationality, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Strong expertise in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Well versed with Tcl/Perl Scripting Experience of working as part of a larger team and working towards project milestones and deadlines; Handle technical deliverables with a small team of engineers. Strong problem-solving skills and good communication skills. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Bachelor's/Master’s degree in Electrical/Electronic Engineering from reputed institution 2-10 years of experience in Physical Design/Implementation Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063953